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authorChris Zankel <chris@zankel.net>2008-02-12 13:11:45 -0500
committerChris Zankel <chris@zankel.net>2008-02-13 20:08:18 -0500
commit0b2c3afdaaaa3e577300b2235df43eb8af00020b (patch)
treea19e12791a9d109f61f1edce731f50589302d04d /include/asm-xtensa/processor.h
parent70e137eb48f62e59dfa5e06d0d01f123e9464f9a (diff)
[XTENSA] Fix icache flush for cache aliasing
Set the execution bit in the temporary TLB when we flush the instruction cache. Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'include/asm-xtensa/processor.h')
0 files changed, 0 insertions, 0 deletions