diff options
author | Chris Zankel <czankel@tensilica.com> | 2005-06-24 01:01:26 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-24 03:05:22 -0400 |
commit | 9a8fd5589902153a134111ed7a40f9cca1f83254 (patch) | |
tree | 6f7a06de25bdf0b2d94623794c2cbbc66b5a77f6 /include/asm-xtensa/io.h | |
parent | 3f65ce4d141e435e54c20ed2379d983d362a2cb5 (diff) |
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6
The attached patches provides part 6 of an architecture implementation for the
Tensilica Xtensa CPU series.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/io.h')
-rw-r--r-- | include/asm-xtensa/io.h | 197 |
1 files changed, 197 insertions, 0 deletions
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h new file mode 100644 index 000000000000..2c471c42ecfc --- /dev/null +++ b/include/asm-xtensa/io.h | |||
@@ -0,0 +1,197 @@ | |||
1 | /* | ||
2 | * linux/include/asm-xtensa/io.h | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | ||
9 | */ | ||
10 | |||
11 | #ifndef _XTENSA_IO_H | ||
12 | #define _XTENSA_IO_H | ||
13 | |||
14 | #ifdef __KERNEL__ | ||
15 | #include <linux/config.h> | ||
16 | #include <asm/byteorder.h> | ||
17 | |||
18 | #include <linux/types.h> | ||
19 | #include <asm/fixmap.h> | ||
20 | |||
21 | #define _IO_BASE 0 | ||
22 | |||
23 | |||
24 | /* | ||
25 | * swap functions to change byte order from little-endian to big-endian and | ||
26 | * vice versa. | ||
27 | */ | ||
28 | |||
29 | static inline unsigned short _swapw (unsigned short v) | ||
30 | { | ||
31 | return (v << 8) | (v >> 8); | ||
32 | } | ||
33 | |||
34 | static inline unsigned int _swapl (unsigned int v) | ||
35 | { | ||
36 | return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24); | ||
37 | } | ||
38 | |||
39 | /* | ||
40 | * Change virtual addresses to physical addresses and vv. | ||
41 | * These are trivial on the 1:1 Linux/Xtensa mapping | ||
42 | */ | ||
43 | |||
44 | extern inline unsigned long virt_to_phys(volatile void * address) | ||
45 | { | ||
46 | return PHYSADDR((unsigned long)address); | ||
47 | } | ||
48 | |||
49 | extern inline void * phys_to_virt(unsigned long address) | ||
50 | { | ||
51 | return (void*) CACHED_ADDR(address); | ||
52 | } | ||
53 | |||
54 | /* | ||
55 | * IO bus memory addresses are also 1:1 with the physical address | ||
56 | */ | ||
57 | |||
58 | extern inline unsigned long virt_to_bus(volatile void * address) | ||
59 | { | ||
60 | return PHYSADDR((unsigned long)address); | ||
61 | } | ||
62 | |||
63 | extern inline void * bus_to_virt (unsigned long address) | ||
64 | { | ||
65 | return (void *) CACHED_ADDR(address); | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * Change "struct page" to physical address. | ||
70 | */ | ||
71 | |||
72 | extern inline void *ioremap(unsigned long offset, unsigned long size) | ||
73 | { | ||
74 | return (void *) CACHED_ADDR_IO(offset); | ||
75 | } | ||
76 | |||
77 | extern inline void *ioremap_nocache(unsigned long offset, unsigned long size) | ||
78 | { | ||
79 | return (void *) BYPASS_ADDR_IO(offset); | ||
80 | } | ||
81 | |||
82 | extern inline void iounmap(void *addr) | ||
83 | { | ||
84 | } | ||
85 | |||
86 | /* | ||
87 | * Generic I/O | ||
88 | */ | ||
89 | |||
90 | #define readb(addr) \ | ||
91 | ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) | ||
92 | #define readw(addr) \ | ||
93 | ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; }) | ||
94 | #define readl(addr) \ | ||
95 | ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; }) | ||
96 | #define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b)) | ||
97 | #define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b)) | ||
98 | #define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b)) | ||
99 | |||
100 | static inline __u8 __raw_readb(const volatile void __iomem *addr) | ||
101 | { | ||
102 | return *(__force volatile __u8 *)(addr); | ||
103 | } | ||
104 | static inline __u16 __raw_readw(const volatile void __iomem *addr) | ||
105 | { | ||
106 | return *(__force volatile __u16 *)(addr); | ||
107 | } | ||
108 | static inline __u32 __raw_readl(const volatile void __iomem *addr) | ||
109 | { | ||
110 | return *(__force volatile __u32 *)(addr); | ||
111 | } | ||
112 | static inline void __raw_writeb(__u8 b, volatile void __iomem *addr) | ||
113 | { | ||
114 | *(__force volatile __u8 *)(addr) = b; | ||
115 | } | ||
116 | static inline void __raw_writew(__u16 b, volatile void __iomem *addr) | ||
117 | { | ||
118 | *(__force volatile __u16 *)(addr) = b; | ||
119 | } | ||
120 | static inline void __raw_writel(__u32 b, volatile void __iomem *addr) | ||
121 | { | ||
122 | *(__force volatile __u32 *)(addr) = b; | ||
123 | } | ||
124 | |||
125 | |||
126 | |||
127 | |||
128 | /* These are the definitions for the x86 IO instructions | ||
129 | * inb/inw/inl/outb/outw/outl, the "string" versions | ||
130 | * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions | ||
131 | * inb_p/inw_p/... | ||
132 | * The macros don't do byte-swapping. | ||
133 | */ | ||
134 | |||
135 | #define inb(port) readb((u8 *)((port)+_IO_BASE)) | ||
136 | #define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)+_IO_BASE)) | ||
137 | #define inw(port) readw((u16 *)((port)+_IO_BASE)) | ||
138 | #define outw(val, port) writew((val),(u16 *)((unsigned long)(port)+_IO_BASE)) | ||
139 | #define inl(port) readl((u32 *)((port)+_IO_BASE)) | ||
140 | #define outl(val, port) writel((val),(u32 *)((unsigned long)(port))) | ||
141 | |||
142 | #define inb_p(port) inb((port)) | ||
143 | #define outb_p(val, port) outb((val), (port)) | ||
144 | #define inw_p(port) inw((port)) | ||
145 | #define outw_p(val, port) outw((val), (port)) | ||
146 | #define inl_p(port) inl((port)) | ||
147 | #define outl_p(val, port) outl((val), (port)) | ||
148 | |||
149 | extern void insb (unsigned long port, void *dst, unsigned long count); | ||
150 | extern void insw (unsigned long port, void *dst, unsigned long count); | ||
151 | extern void insl (unsigned long port, void *dst, unsigned long count); | ||
152 | extern void outsb (unsigned long port, const void *src, unsigned long count); | ||
153 | extern void outsw (unsigned long port, const void *src, unsigned long count); | ||
154 | extern void outsl (unsigned long port, const void *src, unsigned long count); | ||
155 | |||
156 | #define IO_SPACE_LIMIT ~0 | ||
157 | |||
158 | #define memset_io(a,b,c) memset((void *)(a),(b),(c)) | ||
159 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) | ||
160 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) | ||
161 | |||
162 | /* At this point the Xtensa doesn't provide byte swap instructions */ | ||
163 | |||
164 | #ifdef __XTENSA_EB__ | ||
165 | # define in_8(addr) (*(u8*)(addr)) | ||
166 | # define in_le16(addr) _swapw(*(u16*)(addr)) | ||
167 | # define in_le32(addr) _swapl(*(u32*)(addr)) | ||
168 | # define out_8(b, addr) *(u8*)(addr) = (b) | ||
169 | # define out_le16(b, addr) *(u16*)(addr) = _swapw(b) | ||
170 | # define out_le32(b, addr) *(u32*)(addr) = _swapl(b) | ||
171 | #elif defined(__XTENSA_EL__) | ||
172 | # define in_8(addr) (*(u8*)(addr)) | ||
173 | # define in_le16(addr) (*(u16*)(addr)) | ||
174 | # define in_le32(addr) (*(u32*)(addr)) | ||
175 | # define out_8(b, addr) *(u8*)(addr) = (b) | ||
176 | # define out_le16(b, addr) *(u16*)(addr) = (b) | ||
177 | # define out_le32(b, addr) *(u32*)(addr) = (b) | ||
178 | #else | ||
179 | # error processor byte order undefined! | ||
180 | #endif | ||
181 | |||
182 | |||
183 | /* | ||
184 | * * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
185 | * * access | ||
186 | * */ | ||
187 | #define xlate_dev_mem_ptr(p) __va(p) | ||
188 | |||
189 | /* | ||
190 | * * Convert a virtual cached pointer to an uncached pointer | ||
191 | * */ | ||
192 | #define xlate_dev_kmem_ptr(p) p | ||
193 | |||
194 | |||
195 | #endif /* __KERNEL__ */ | ||
196 | |||
197 | #endif /* _XTENSA_IO_H */ | ||