[XTENSA] Add support for configurable registers and coprocessors

The Xtensa architecture allows to define custom instructions and
registers. Registers that are bound to a coprocessor are only
accessible if the corresponding enable bit is set, which allows
to implement a 'lazy' context switch mechanism. Other registers
needs to be saved and restore at the time of the context switch
or during interrupt handling.

This patch adds support for these additional states:

- save and restore registers that are used by the compiler upon
  interrupt entry and exit.
- context switch additional registers unbound to any coprocessor
- 'lazy' context switch of registers bound to a coprocessor
- ptrace interface to provide access to additional registers
- update configuration files in include/asm-xtensa/variant-fsf

Signed-off-by: Chris Zankel <chris@zankel.net>

1 files changed, 15 insertions, 0 deletions

diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h
index 86479b86c02e..11103e07d028 100644
--- a/include/asm-xtensa/elf.h
+++ b/include/asm-xtensa/elf.h
@@ -173,6 +173,21 @@ extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
        _r->areg[12]=0; _r->areg[13]=0;   _r->areg[14]=0; _r->areg[15]=0; \
   } while (0)
 
+typedef struct {
+        xtregs_opt_t    opt;
+        xtregs_user_t   user;
+#if XTENSA_HAVE_COPROCESSORS
+        xtregs_cp0_t    cp0;
+        xtregs_cp1_t    cp1;
+        xtregs_cp2_t    cp2;
+        xtregs_cp3_t    cp3;
+        xtregs_cp4_t    cp4;
+        xtregs_cp5_t    cp5;
+        xtregs_cp6_t    cp6;
+        xtregs_cp7_t    cp7;
+#endif
+} elf_xtregs_t;
+
 #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
 
 struct task_struct;