diff options
| author | Andi Kleen <ak@suse.de> | 2005-09-12 12:49:24 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-12 13:50:57 -0400 |
| commit | 059bf0f6c33058680e4381f17d554baaa4f45d68 (patch) | |
| tree | 39828a86a1bcd0db6047f369e618b61cb79bc39b /include/asm-x86_64 | |
| parent | 55679edb19f5ee1dcb0147afe2f198a10ef963f0 (diff) | |
[PATCH] x86-64: Merge msr.c with i386 version
The only difference was the inline assembly, so move that into
asm/msr.h and merge with the i386 version.
This adds some missing sysfs support code to x86-64.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-x86_64')
| -rw-r--r-- | include/asm-x86_64/msr.h | 39 |
1 files changed, 27 insertions, 12 deletions
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h index 15a6ef7cf3d3..4d727f3f5550 100644 --- a/include/asm-x86_64/msr.h +++ b/include/asm-x86_64/msr.h | |||
| @@ -29,22 +29,37 @@ | |||
| 29 | #define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32) | 29 | #define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32) |
| 30 | 30 | ||
| 31 | /* wrmsr with exception handling */ | 31 | /* wrmsr with exception handling */ |
| 32 | #define wrmsr_safe(msr,a,b) ({ int ret__; \ | 32 | #define wrmsr_safe(msr,a,b) ({ int ret__; \ |
| 33 | asm volatile("2: wrmsr ; xorl %0,%0\n" \ | 33 | asm volatile("2: wrmsr ; xorl %0,%0\n" \ |
| 34 | "1:\n\t" \ | 34 | "1:\n\t" \ |
| 35 | ".section .fixup,\"ax\"\n\t" \ | 35 | ".section .fixup,\"ax\"\n\t" \ |
| 36 | "3: movl %4,%0 ; jmp 1b\n\t" \ | 36 | "3: movl %4,%0 ; jmp 1b\n\t" \ |
| 37 | ".previous\n\t" \ | 37 | ".previous\n\t" \ |
| 38 | ".section __ex_table,\"a\"\n" \ | 38 | ".section __ex_table,\"a\"\n" \ |
| 39 | " .align 8\n\t" \ | 39 | " .align 8\n\t" \ |
| 40 | " .quad 2b,3b\n\t" \ | 40 | " .quad 2b,3b\n\t" \ |
| 41 | ".previous" \ | 41 | ".previous" \ |
| 42 | : "=a" (ret__) \ | 42 | : "=a" (ret__) \ |
| 43 | : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\ | 43 | : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \ |
| 44 | ret__; }) | 44 | ret__; }) |
| 45 | 45 | ||
| 46 | #define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32)) | 46 | #define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32)) |
| 47 | 47 | ||
| 48 | #define rdmsr_safe(msr,a,b) \ | ||
| 49 | ({ int ret__; \ | ||
| 50 | asm volatile ("1: rdmsr\n" \ | ||
| 51 | "2:\n" \ | ||
| 52 | ".section .fixup,\"ax\"\n" \ | ||
| 53 | "3: movl %4,%0\n" \ | ||
| 54 | " jmp 2b\n" \ | ||
| 55 | ".previous\n" \ | ||
| 56 | ".section __ex_table,\"a\"\n" \ | ||
| 57 | " .align 8\n" \ | ||
| 58 | " .quad 1b,3b\n" \ | ||
| 59 | ".previous":"=&bDS" (ret__), "=a"(a), "=d"(b)\ | ||
| 60 | :"c"(msr), "i"(-EIO), "0"(0)); \ | ||
| 61 | ret__; }) | ||
| 62 | |||
| 48 | #define rdtsc(low,high) \ | 63 | #define rdtsc(low,high) \ |
| 49 | __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) | 64 | __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) |
| 50 | 65 | ||