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authorLaurent Vivier <Laurent.Vivier@bull.net>2006-12-06 20:14:06 -0500
committerAndi Kleen <andi@basil.nowhere.org>2006-12-06 20:14:06 -0500
commitb34e90b8f0f30151349134f87b5dc6ef75a5218c (patch)
tree201c7cb4e3303dcf00547748c9c86a48d4cf45cb /include/asm-x86_64/rio.h
parent58db85482743f5e3495d168c641c60ce1d3dfb06 (diff)
[PATCH] Calgary: use BIOS supplied BBARs and topology information
Find the BBAR register address of each Calgary using the "Extended BIOS Data Area" rather than calculating it ourselves. Also get the bus topology (what PHB each bus is on) from Calgary rather than calculating it ourselves. This patch fixes http://bugzilla.kernel.org/show_bug.cgi?id=7407. Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Jon Mason <jdmason@kudzu.us> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'include/asm-x86_64/rio.h')
-rw-r--r--include/asm-x86_64/rio.h76
1 files changed, 76 insertions, 0 deletions
diff --git a/include/asm-x86_64/rio.h b/include/asm-x86_64/rio.h
new file mode 100644
index 000000000000..1f315c39d76e
--- /dev/null
+++ b/include/asm-x86_64/rio.h
@@ -0,0 +1,76 @@
1/*
2 * Derived from include/asm-i386/mach-summit/mach_mpparse.h
3 * and include/asm-i386/mach-default/bios_ebda.h
4 *
5 * Author: Laurent Vivier <Laurent.Vivier@bull.net>
6 *
7 */
8
9#ifndef __ASM_RIO_H
10#define __ASM_RIO_H
11
12#define RIO_TABLE_VERSION 3
13
14struct rio_table_hdr {
15 u8 version; /* Version number of this data structure */
16 u8 num_scal_dev; /* # of Scalability devices */
17 u8 num_rio_dev; /* # of RIO I/O devices */
18} __attribute__((packed));
19
20struct scal_detail {
21 u8 node_id; /* Scalability Node ID */
22 u32 CBAR; /* Address of 1MB register space */
23 u8 port0node; /* Node ID port connected to: 0xFF=None */
24 u8 port0port; /* Port num port connected to: 0,1,2, or */
25 /* 0xFF=None */
26 u8 port1node; /* Node ID port connected to: 0xFF = None */
27 u8 port1port; /* Port num port connected to: 0,1,2, or */
28 /* 0xFF=None */
29 u8 port2node; /* Node ID port connected to: 0xFF = None */
30 u8 port2port; /* Port num port connected to: 0,1,2, or */
31 /* 0xFF=None */
32 u8 chassis_num; /* 1 based Chassis number (1 = boot node) */
33} __attribute__((packed));
34
35struct rio_detail {
36 u8 node_id; /* RIO Node ID */
37 u32 BBAR; /* Address of 1MB register space */
38 u8 type; /* Type of device */
39 u8 owner_id; /* Node ID of Hurricane that owns this */
40 /* node */
41 u8 port0node; /* Node ID port connected to: 0xFF=None */
42 u8 port0port; /* Port num port connected to: 0,1,2, or */
43 /* 0xFF=None */
44 u8 port1node; /* Node ID port connected to: 0xFF=None */
45 u8 port1port; /* Port num port connected to: 0,1,2, or */
46 /* 0xFF=None */
47 u8 first_slot; /* Lowest slot number below this Calgary */
48 u8 status; /* Bit 0 = 1 : the XAPIC is used */
49 /* = 0 : the XAPIC is not used, ie: */
50 /* ints fwded to another XAPIC */
51 /* Bits1:7 Reserved */
52 u8 WP_index; /* instance index - lower ones have */
53 /* lower slot numbers/PCI bus numbers */
54 u8 chassis_num; /* 1 based Chassis number */
55} __attribute__((packed));
56
57enum {
58 HURR_SCALABILTY = 0, /* Hurricane Scalability info */
59 HURR_RIOIB = 2, /* Hurricane RIOIB info */
60 COMPAT_CALGARY = 4, /* Compatibility Calgary */
61 ALT_CALGARY = 5, /* Second Planar Calgary */
62};
63
64/*
65 * there is a real-mode segmented pointer pointing to the
66 * 4K EBDA area at 0x40E.
67 */
68
69static inline unsigned long get_bios_ebda(void)
70{
71 unsigned long address= *(unsigned short *)phys_to_virt(0x40Eul);
72 address <<= 4;
73 return address;
74}
75
76#endif /* __ASM_RIO_H */