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authorAndi Kleen <ak@suse.de>2005-04-16 18:25:19 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:25:19 -0400
commita8ab26fe5bfeef43bdcde5182ca051ae0647607e (patch)
tree456f92b42111f83a4568b27efd863f20ffabbe3c /include/asm-x86_64/msr.h
parentebfcaa96fccc01301a577c5c56a5f00543cf167e (diff)
[PATCH] x86_64: Switch SMP bootup over to new CPU hotplug state machine
This will allow hotplug CPU in the future and in general cleans up a lot of crufty code. It also should plug some races that the old hackish way introduces. Remove one old race workaround in NMI watchdog setup that is not needed anymore. I removed the old total sum of bogomips reporting code. The brag value of BogoMips has been greatly devalued in the last years on the open market. Real CPU hotplug will need some more work, but the infrastructure for it is there now. One drawback: the new TSC sync algorithm is less accurate than before. The old way of zeroing TSCs is too intrusive to do later. Instead the TSC of the BP is duplicated now, which is less accurate. akpm: - sync_tsc_bp_init seems to have the sense of `init' inverted. - SPIN_LOCK_UNLOCKED is deprecated - use DEFINE_SPINLOCK. Cc: <rusty@rustcorp.com.au> Cc: <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-x86_64/msr.h')
-rw-r--r--include/asm-x86_64/msr.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h
index 66f0be191ab4..513e52c71821 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86_64/msr.h
@@ -163,6 +163,7 @@ extern inline unsigned int cpuid_edx(unsigned int op)
163#define EFER_NX (1<<_EFER_NX) 163#define EFER_NX (1<<_EFER_NX)
164 164
165/* Intel MSRs. Some also available on other CPUs */ 165/* Intel MSRs. Some also available on other CPUs */
166#define MSR_IA32_TSC 0x10
166#define MSR_IA32_PLATFORM_ID 0x17 167#define MSR_IA32_PLATFORM_ID 0x17
167 168
168#define MSR_IA32_PERFCTR0 0xc1 169#define MSR_IA32_PERFCTR0 0xc1