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authorWink Saville <wink@saville.com>2006-12-06 20:14:11 -0500
committerAndi Kleen <andi@basil.nowhere.org>2006-12-06 20:14:11 -0500
commitc7a3392e9e53e43c44a971de3dd480a8e2788e75 (patch)
treefc3f232e723eb29dcb48f5e6b9568af58fac0c25 /include/asm-x86_64/msr.h
parent86bd58bf4c383fde4e99b83ce917b091a072040d (diff)
[PATCH] x86-64: Fix comments for MSR_FS_BASE and MSR_GS_BASE.
The comments for MSR_FS_BASE & MSR_GS_BASE were transposed. Signed-off-by: Wink Saville <wink@saville.com> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'include/asm-x86_64/msr.h')
-rw-r--r--include/asm-x86_64/msr.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h
index a745c5008a60..952783d35c7b 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86_64/msr.h
@@ -169,8 +169,8 @@ static inline unsigned int cpuid_edx(unsigned int op)
169#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ 169#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */
170#define MSR_CSTAR 0xc0000083 /* compatibility mode SYSCALL target */ 170#define MSR_CSTAR 0xc0000083 /* compatibility mode SYSCALL target */
171#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */ 171#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
172#define MSR_FS_BASE 0xc0000100 /* 64bit GS base */ 172#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
173#define MSR_GS_BASE 0xc0000101 /* 64bit FS base */ 173#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
174#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow (or USER_GS from kernel) */ 174#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow (or USER_GS from kernel) */
175/* EFER bits: */ 175/* EFER bits: */
176#define _EFER_SCE 0 /* SYSCALL/SYSRET */ 176#define _EFER_SCE 0 /* SYSCALL/SYSRET */