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authorDavid Woodhouse <dwmw2@infradead.org>2006-05-03 08:30:35 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2006-05-03 08:30:35 -0400
commitedc4ff7c08e9885c40e60c4fb39fa42cc91a0602 (patch)
treef375d28043dd4457428a841167dc93d760ba9a46 /include/asm-x86_64/cpufeature.h
parentcbb9a56177b16294ed347ba7fcb1c66c8adb5dc4 (diff)
parente17df688f7064dae1417ce425dd1e4b71d24d63b (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include/asm-x86_64/cpufeature.h')
-rw-r--r--include/asm-x86_64/cpufeature.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h
index 76bb6193ae91..662964b74e34 100644
--- a/include/asm-x86_64/cpufeature.h
+++ b/include/asm-x86_64/cpufeature.h
@@ -64,6 +64,7 @@
64#define X86_FEATURE_REP_GOOD (3*32+ 4) /* rep microcode works well on this CPU */ 64#define X86_FEATURE_REP_GOOD (3*32+ 4) /* rep microcode works well on this CPU */
65#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */ 65#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */
66#define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */ 66#define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */
67#define X86_FEATURE_FXSAVE_LEAK (3*32+7) /* FIP/FOP/FDP leaks through FXSAVE */
67 68
68/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 69/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
69#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ 70#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */