diff options
author | Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | 2006-06-26 07:59:59 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 13:48:22 -0400 |
commit | 0080e667550db5ae8c9318181500c413b99ff164 (patch) | |
tree | 3d6d162f0017aaa7c6049e785bbcdfc18dbc23ae /include/asm-x86_64/cpufeature.h | |
parent | e77deacb7b078156fcadf27b838a4ce1a65eda04 (diff) |
[PATCH] x86_64: i386/x86-64 Add nmi watchdog support for new Intel CPUs
Intel now has support for Architectural Performance Monitoring Counters
( Refer to IA-32 Intel Architecture Software Developer's Manual
http://www.intel.com/design/pentium4/manuals/253669.htm ). This
feature is present starting from Intel Core Duo and Intel Core Solo processors.
What this means is, the performance monitoring counters and some performance
monitoring events are now defined in an architectural way (using cpuid).
And there will be no need to check for family/model etc for these architectural
events.
Below is the patch to use this performance counters in nmi watchdog driver.
Patch handles both i386 and x86-64 kernels.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-x86_64/cpufeature.h')
-rw-r--r-- | include/asm-x86_64/cpufeature.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h index fbf5a19edbb3..ee792faaca01 100644 --- a/include/asm-x86_64/cpufeature.h +++ b/include/asm-x86_64/cpufeature.h | |||
@@ -67,7 +67,7 @@ | |||
67 | #define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */ | 67 | #define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */ |
68 | #define X86_FEATURE_FXSAVE_LEAK (3*32+7) /* FIP/FOP/FDP leaks through FXSAVE */ | 68 | #define X86_FEATURE_FXSAVE_LEAK (3*32+7) /* FIP/FOP/FDP leaks through FXSAVE */ |
69 | #define X86_FEATURE_UP (3*32+8) /* SMP kernel running on UP */ | 69 | #define X86_FEATURE_UP (3*32+8) /* SMP kernel running on UP */ |
70 | 70 | #define X86_FEATURE_ARCH_PERFMON (3*32+9) /* Intel Architectural PerfMon */ | |
71 | 71 | ||
72 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | 72 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ |
73 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ | 73 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ |