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authorYinghai Lu <yhlu.kernel@gmail.com>2008-08-19 23:50:03 -0400
committerIngo Molnar <mingo@elte.hu>2008-10-16 10:52:08 -0400
commit71f521bbaf375b685aeea20c6b0ed8600cd6edfe (patch)
treea18b8e8284ff7a68c341de8b1342866b9821ae7f /include/asm-x86
parenta84488c213a8cfc29200344a6fb6357d48c8ed85 (diff)
x86, irq: get nr_irqs from madt
Until now, NR_IRQS was derived from black magic defines that had to be "large enough" to both accomodate NR_CPUS and MAX_NR_IO_APICs. This resulted in a way too large irq_desc[] array on most x86 systems. Especially with larger CPU masks, the size of irq_desc can spiral out of control quickly. So be smarter about it and use precise allocation instead: determine the default maximum possible IRQ number from the ACPI MADT. Use a minimum limit of at least 32 IRQs for broken BIOSes. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86')
-rw-r--r--include/asm-x86/mpspec.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86/mpspec.h b/include/asm-x86/mpspec.h
index be2241a818f1..a0748021250b 100644
--- a/include/asm-x86/mpspec.h
+++ b/include/asm-x86/mpspec.h
@@ -60,6 +60,7 @@ extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
60 u32 gsi); 60 u32 gsi);
61extern void mp_config_acpi_legacy_irqs(void); 61extern void mp_config_acpi_legacy_irqs(void);
62extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low); 62extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
63extern int get_nr_irqs_via_madt(void);
63#ifdef CONFIG_X86_IO_APIC 64#ifdef CONFIG_X86_IO_APIC
64extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, 65extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
65 u32 gsi, int triggering, int polarity); 66 u32 gsi, int triggering, int polarity);