KVM: Move arch dependent files to new directory arch/x86/kvm/

This paves the way for multiple architecture support.  Note that while
ioapic.c could potentially be shared with ia64, it is also moved.

Signed-off-by: Avi Kivity <avi@qumranet.com>

2 files changed, 787 insertions, 0 deletions

diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h
new file mode 100644
index 000000000000..28940e1a9713
--- /dev/null
+++ b/include/asm-x86/kvm_host.h
@@ -0,0 +1,601 @@
+#/*
+ * Kernel-based Virtual Machine driver for Linux
+ *
+ * This header defines architecture specific interfaces, x86 version
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ *
+ */
+
+#ifndef ASM_KVM_HOST_H
+#define ASM_KVM_HOST_H
+
+#include <linux/types.h>
+#include <linux/mm.h>
+
+#include <linux/kvm.h>
+#include <linux/kvm_para.h>
+#include <linux/kvm_types.h>
+
+#include <asm/desc.h>
+
+#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
+#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
+#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL)
+
+#define KVM_GUEST_CR0_MASK \
+        (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
+         | X86_CR0_NW | X86_CR0_CD)
+#define KVM_VM_CR0_ALWAYS_ON \
+        (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
+         | X86_CR0_MP)
+#define KVM_GUEST_CR4_MASK \
+        (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
+#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
+#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
+
+#define INVALID_PAGE (~(hpa_t)0)
+#define UNMAPPED_GVA (~(gpa_t)0)
+
+#define DE_VECTOR 0
+#define UD_VECTOR 6
+#define NM_VECTOR 7
+#define DF_VECTOR 8
+#define TS_VECTOR 10
+#define NP_VECTOR 11
+#define SS_VECTOR 12
+#define GP_VECTOR 13
+#define PF_VECTOR 14
+
+#define SELECTOR_TI_MASK (1 << 2)
+#define SELECTOR_RPL_MASK 0x03
+
+#define IOPL_SHIFT 12
+
+#define KVM_ALIAS_SLOTS 4
+
+#define KVM_PERMILLE_MMU_PAGES 20
+#define KVM_MIN_ALLOC_MMU_PAGES 64
+#define KVM_NUM_MMU_PAGES 1024
+#define KVM_MIN_FREE_MMU_PAGES 5
+#define KVM_REFILL_PAGES 25
+#define KVM_MAX_CPUID_ENTRIES 40
+
+extern spinlock_t kvm_lock;
+extern struct list_head vm_list;
+
+struct kvm_vcpu;
+struct kvm;
+
+enum {
+        VCPU_REGS_RAX = 0,
+        VCPU_REGS_RCX = 1,
+        VCPU_REGS_RDX = 2,
+        VCPU_REGS_RBX = 3,
+        VCPU_REGS_RSP = 4,
+        VCPU_REGS_RBP = 5,
+        VCPU_REGS_RSI = 6,
+        VCPU_REGS_RDI = 7,
+#ifdef CONFIG_X86_64
+        VCPU_REGS_R8 = 8,
+        VCPU_REGS_R9 = 9,
+        VCPU_REGS_R10 = 10,
+        VCPU_REGS_R11 = 11,
+        VCPU_REGS_R12 = 12,
+        VCPU_REGS_R13 = 13,
+        VCPU_REGS_R14 = 14,
+        VCPU_REGS_R15 = 15,
+#endif
+        NR_VCPU_REGS
+};
+
+enum {
+        VCPU_SREG_CS,
+        VCPU_SREG_DS,
+        VCPU_SREG_ES,
+        VCPU_SREG_FS,
+        VCPU_SREG_GS,
+        VCPU_SREG_SS,
+        VCPU_SREG_TR,
+        VCPU_SREG_LDTR,
+};
+
+#include <asm/kvm_x86_emulate.h>
+
+#define KVM_NR_MEM_OBJS 40
+
+/*
+ * We don't want allocation failures within the mmu code, so we preallocate
+ * enough memory for a single page fault in a cache.
+ */
+struct kvm_mmu_memory_cache {
+        int nobjs;
+        void *objects[KVM_NR_MEM_OBJS];
+};
+
+#define NR_PTE_CHAIN_ENTRIES 5
+
+struct kvm_pte_chain {
+        u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
+        struct hlist_node link;
+};
+
+/*
+ * kvm_mmu_page_role, below, is defined as:
+ *
+ *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
+ *   bits 4:7 - page table level for this shadow (1-4)
+ *   bits 8:9 - page table quadrant for 2-level guests
+ *   bit   16 - "metaphysical" - gfn is not a real page (huge page/real mode)
+ *   bits 17:19 - common access permissions for all ptes in this shadow page
+ */
+union kvm_mmu_page_role {
+        unsigned word;
+        struct {
+                unsigned glevels : 4;
+                unsigned level : 4;
+                unsigned quadrant : 2;
+                unsigned pad_for_nice_hex_output : 6;
+                unsigned metaphysical : 1;
+                unsigned access : 3;
+        };
+};
+
+struct kvm_mmu_page {
+        struct list_head link;
+        struct hlist_node hash_link;
+
+        /*
+         * The following two entries are used to key the shadow page in the
+         * hash table.
+         */
+        gfn_t gfn;
+        union kvm_mmu_page_role role;
+
+        u64 *spt;
+        /* hold the gfn of each spte inside spt */
+        gfn_t *gfns;
+        unsigned long slot_bitmap; /* One bit set per slot which has memory
+                                    * in this shadow page.
+                                    */
+        int multimapped;         /* More than one parent_pte? */
+        int root_count;          /* Currently serving as active root */
+        union {
+                u64 *parent_pte;               /* !multimapped */
+                struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
+        };
+};
+
+/*
+ * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
+ * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
+ * mode.
+ */
+struct kvm_mmu {
+        void (*new_cr3)(struct kvm_vcpu *vcpu);
+        int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
+        void (*free)(struct kvm_vcpu *vcpu);
+        gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
+        void (*prefetch_page)(struct kvm_vcpu *vcpu,
+                              struct kvm_mmu_page *page);
+        hpa_t root_hpa;
+        int root_level;
+        int shadow_root_level;
+
+        u64 *pae_root;
+};
+
+struct kvm_vcpu_arch {
+        u64 host_tsc;
+        int interrupt_window_open;
+        unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
+        DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
+        unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
+        unsigned long rip;      /* needs vcpu_load_rsp_rip() */
+
+        unsigned long cr0;
+        unsigned long cr2;
+        unsigned long cr3;
+        unsigned long cr4;
+        unsigned long cr8;
+        u64 pdptrs[4]; /* pae */
+        u64 shadow_efer;
+        u64 apic_base;
+        struct kvm_lapic *apic;    /* kernel irqchip context */
+#define VCPU_MP_STATE_RUNNABLE          0
+#define VCPU_MP_STATE_UNINITIALIZED     1
+#define VCPU_MP_STATE_INIT_RECEIVED     2
+#define VCPU_MP_STATE_SIPI_RECEIVED     3
+#define VCPU_MP_STATE_HALTED            4
+        int mp_state;
+        int sipi_vector;
+        u64 ia32_misc_enable_msr;
+
+        struct kvm_mmu mmu;
+
+        struct kvm_mmu_memory_cache mmu_pte_chain_cache;
+        struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
+        struct kvm_mmu_memory_cache mmu_page_cache;
+        struct kvm_mmu_memory_cache mmu_page_header_cache;
+
+        gfn_t last_pt_write_gfn;
+        int   last_pt_write_count;
+        u64  *last_pte_updated;
+
+        struct i387_fxsave_struct host_fx_image;
+        struct i387_fxsave_struct guest_fx_image;
+
+        gva_t mmio_fault_cr2;
+        struct kvm_pio_request pio;
+        void *pio_data;
+
+        struct kvm_queued_exception {
+                bool pending;
+                bool has_error_code;
+                u8 nr;
+                u32 error_code;
+        } exception;
+
+        struct {
+                int active;
+                u8 save_iopl;
+                struct kvm_save_segment {
+                        u16 selector;
+                        unsigned long base;
+                        u32 limit;
+                        u32 ar;
+                } tr, es, ds, fs, gs;
+        } rmode;
+        int halt_request; /* real mode on Intel only */
+
+        int cpuid_nent;
+        struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
+        /* emulate context */
+
+        struct x86_emulate_ctxt emulate_ctxt;
+};
+
+struct kvm_mem_alias {
+        gfn_t base_gfn;
+        unsigned long npages;
+        gfn_t target_gfn;
+};
+
+struct kvm_arch{
+        int naliases;
+        struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
+
+        unsigned int n_free_mmu_pages;
+        unsigned int n_requested_mmu_pages;
+        unsigned int n_alloc_mmu_pages;
+        struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
+        /*
+         * Hash table of struct kvm_mmu_page.
+         */
+        struct list_head active_mmu_pages;
+        struct kvm_pic *vpic;
+        struct kvm_ioapic *vioapic;
+
+        int round_robin_prev_vcpu;
+        unsigned int tss_addr;
+        struct page *apic_access_page;
+};
+
+struct kvm_vm_stat {
+        u32 mmu_shadow_zapped;
+        u32 mmu_pte_write;
+        u32 mmu_pte_updated;
+        u32 mmu_pde_zapped;
+        u32 mmu_flooded;
+        u32 mmu_recycled;
+        u32 remote_tlb_flush;
+};
+
+struct kvm_vcpu_stat {
+        u32 pf_fixed;
+        u32 pf_guest;
+        u32 tlb_flush;
+        u32 invlpg;
+
+        u32 exits;
+        u32 io_exits;
+        u32 mmio_exits;
+        u32 signal_exits;
+        u32 irq_window_exits;
+        u32 halt_exits;
+        u32 halt_wakeup;
+        u32 request_irq_exits;
+        u32 irq_exits;
+        u32 host_state_reload;
+        u32 efer_reload;
+        u32 fpu_reload;
+        u32 insn_emulation;
+        u32 insn_emulation_fail;
+};
+
+struct descriptor_table {
+        u16 limit;
+        unsigned long base;
+} __attribute__((packed));
+
+struct kvm_x86_ops {
+        int (*cpu_has_kvm_support)(void);          /* __init */
+        int (*disabled_by_bios)(void);             /* __init */
+        void (*hardware_enable)(void *dummy);      /* __init */
+        void (*hardware_disable)(void *dummy);
+        void (*check_processor_compatibility)(void *rtn);
+        int (*hardware_setup)(void);               /* __init */
+        void (*hardware_unsetup)(void);            /* __exit */
+
+        /* Create, but do not attach this VCPU */
+        struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
+        void (*vcpu_free)(struct kvm_vcpu *vcpu);
+        int (*vcpu_reset)(struct kvm_vcpu *vcpu);
+
+        void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
+        void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
+        void (*vcpu_put)(struct kvm_vcpu *vcpu);
+        void (*vcpu_decache)(struct kvm_vcpu *vcpu);
+
+        int (*set_guest_debug)(struct kvm_vcpu *vcpu,
+                               struct kvm_debug_guest *dbg);
+        void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
+        int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
+        int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
+        u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
+        void (*get_segment)(struct kvm_vcpu *vcpu,
+                            struct kvm_segment *var, int seg);
+        void (*set_segment)(struct kvm_vcpu *vcpu,
+                            struct kvm_segment *var, int seg);
+        void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
+        void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
+        void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
+        void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
+        void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
+        void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
+        void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
+        void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
+        void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
+        void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
+        unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
+        void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
+                       int *exception);
+        void (*cache_regs)(struct kvm_vcpu *vcpu);
+        void (*decache_regs)(struct kvm_vcpu *vcpu);
+        unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
+        void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
+
+        void (*tlb_flush)(struct kvm_vcpu *vcpu);
+
+        void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
+        int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
+        void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
+        void (*patch_hypercall)(struct kvm_vcpu *vcpu,
+                                unsigned char *hypercall_addr);
+        int (*get_irq)(struct kvm_vcpu *vcpu);
+        void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
+        void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
+                                bool has_error_code, u32 error_code);
+        bool (*exception_injected)(struct kvm_vcpu *vcpu);
+        void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
+        void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
+                                       struct kvm_run *run);
+
+        int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
+};
+
+extern struct kvm_x86_ops *kvm_x86_ops;
+
+int kvm_mmu_module_init(void);
+void kvm_mmu_module_exit(void);
+
+void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
+int kvm_mmu_create(struct kvm_vcpu *vcpu);
+int kvm_mmu_setup(struct kvm_vcpu *vcpu);
+void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
+
+int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
+void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
+void kvm_mmu_zap_all(struct kvm *kvm);
+unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
+void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
+
+enum emulation_result {
+        EMULATE_DONE,       /* no further processing */
+        EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
+        EMULATE_FAIL,         /* can't emulate this instruction */
+};
+
+int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
+                        unsigned long cr2, u16 error_code, int no_decode);
+void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
+void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
+void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
+void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
+                   unsigned long *rflags);
+
+unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
+void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
+                     unsigned long *rflags);
+int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
+int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
+
+struct x86_emulate_ctxt;
+
+int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
+                     int size, unsigned port);
+int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
+                           int size, unsigned long count, int down,
+                            gva_t address, int rep, unsigned port);
+void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
+int kvm_emulate_halt(struct kvm_vcpu *vcpu);
+int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
+int emulate_clts(struct kvm_vcpu *vcpu);
+int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
+                    unsigned long *dest);
+int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
+                    unsigned long value);
+
+void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
+void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
+void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
+void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
+unsigned long get_cr8(struct kvm_vcpu *vcpu);
+void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
+void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
+
+int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
+int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
+
+void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
+void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
+void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
+                           u32 error_code);
+
+void fx_init(struct kvm_vcpu *vcpu);
+
+int emulator_read_std(unsigned long addr,
+                      void *val,
+                      unsigned int bytes,
+                      struct kvm_vcpu *vcpu);
+int emulator_write_emulated(unsigned long addr,
+                            const void *val,
+                            unsigned int bytes,
+                            struct kvm_vcpu *vcpu);
+
+unsigned long segment_base(u16 selector);
+
+void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
+void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
+                       const u8 *new, int bytes);
+int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
+void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
+int kvm_mmu_load(struct kvm_vcpu *vcpu);
+void kvm_mmu_unload(struct kvm_vcpu *vcpu);
+
+int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
+
+int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
+
+int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
+
+int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
+int complete_pio(struct kvm_vcpu *vcpu);
+
+static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
+{
+        struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
+
+        return (struct kvm_mmu_page *)page_private(page);
+}
+
+static inline u16 read_fs(void)
+{
+        u16 seg;
+        asm("mov %%fs, %0" : "=g"(seg));
+        return seg;
+}
+
+static inline u16 read_gs(void)
+{
+        u16 seg;
+        asm("mov %%gs, %0" : "=g"(seg));
+        return seg;
+}
+
+static inline u16 read_ldt(void)
+{
+        u16 ldt;
+        asm("sldt %0" : "=g"(ldt));
+        return ldt;
+}
+
+static inline void load_fs(u16 sel)
+{
+        asm("mov %0, %%fs" : : "rm"(sel));
+}
+
+static inline void load_gs(u16 sel)
+{
+        asm("mov %0, %%gs" : : "rm"(sel));
+}
+
+#ifndef load_ldt
+static inline void load_ldt(u16 sel)
+{
+        asm("lldt %0" : : "rm"(sel));
+}
+#endif
+
+static inline void get_idt(struct descriptor_table *table)
+{
+        asm("sidt %0" : "=m"(*table));
+}
+
+static inline void get_gdt(struct descriptor_table *table)
+{
+        asm("sgdt %0" : "=m"(*table));
+}
+
+static inline unsigned long read_tr_base(void)
+{
+        u16 tr;
+        asm("str %0" : "=g"(tr));
+        return segment_base(tr);
+}
+
+#ifdef CONFIG_X86_64
+static inline unsigned long read_msr(unsigned long msr)
+{
+        u64 value;
+
+        rdmsrl(msr, value);
+        return value;
+}
+#endif
+
+static inline void fx_save(struct i387_fxsave_struct *image)
+{
+        asm("fxsave (%0)":: "r" (image));
+}
+
+static inline void fx_restore(struct i387_fxsave_struct *image)
+{
+        asm("fxrstor (%0)":: "r" (image));
+}
+
+static inline void fpu_init(void)
+{
+        asm("finit");
+}
+
+static inline u32 get_rdx_init_val(void)
+{
+        return 0x600; /* P6 family */
+}
+
+static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
+{
+        kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
+}
+
+#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
+#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
+#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
+#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
+#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
+#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
+#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
+#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
+#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"
+
+#define MSR_IA32_TIME_STAMP_COUNTER             0x010
+
+#define TSS_IOPB_BASE_OFFSET 0x66
+#define TSS_BASE_SIZE 0x68
+#define TSS_IOPB_SIZE (65536 / 8)
+#define TSS_REDIRECTION_SIZE (256 / 8)
+#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
+
+#endif
diff --git a/include/asm-x86/kvm_x86_emulate.h b/include/asm-x86/kvm_x86_emulate.h
new file mode 100644
index 000000000000..7db91b9bdcd4
--- /dev/null
+++ b/include/asm-x86/kvm_x86_emulate.h
@@ -0,0 +1,186 @@
+/******************************************************************************
+ * x86_emulate.h
+ *
+ * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
+ *
+ * Copyright (c) 2005 Keir Fraser
+ *
+ * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
+ */
+
+#ifndef __X86_EMULATE_H__
+#define __X86_EMULATE_H__
+
+struct x86_emulate_ctxt;
+
+/*
+ * x86_emulate_ops:
+ *
+ * These operations represent the instruction emulator's interface to memory.
+ * There are two categories of operation: those that act on ordinary memory
+ * regions (*_std), and those that act on memory regions known to require
+ * special treatment or emulation (*_emulated).
+ *
+ * The emulator assumes that an instruction accesses only one 'emulated memory'
+ * location, that this location is the given linear faulting address (cr2), and
+ * that this is one of the instruction's data operands. Instruction fetches and
+ * stack operations are assumed never to access emulated memory. The emulator
+ * automatically deduces which operand of a string-move operation is accessing
+ * emulated memory, and assumes that the other operand accesses normal memory.
+ *
+ * NOTES:
+ *  1. The emulator isn't very smart about emulated vs. standard memory.
+ *     'Emulated memory' access addresses should be checked for sanity.
+ *     'Normal memory' accesses may fault, and the caller must arrange to
+ *     detect and handle reentrancy into the emulator via recursive faults.
+ *     Accesses may be unaligned and may cross page boundaries.
+ *  2. If the access fails (cannot emulate, or a standard access faults) then
+ *     it is up to the memop to propagate the fault to the guest VM via
+ *     some out-of-band mechanism, unknown to the emulator. The memop signals
+ *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
+ *     then immediately bail.
+ *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
+ *     cmpxchg8b_emulated need support 8-byte accesses.
+ *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
+ */
+/* Access completed successfully: continue emulation as normal. */
+#define X86EMUL_CONTINUE        0
+/* Access is unhandleable: bail from emulation and return error to caller. */
+#define X86EMUL_UNHANDLEABLE    1
+/* Terminate emulation but return success to the caller. */
+#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
+#define X86EMUL_RETRY_INSTR     2 /* retry the instruction for some reason */
+#define X86EMUL_CMPXCHG_FAILED  2 /* cmpxchg did not see expected value */
+struct x86_emulate_ops {
+        /*
+         * read_std: Read bytes of standard (non-emulated/special) memory.
+         *           Used for instruction fetch, stack operations, and others.
+         *  @addr:  [IN ] Linear address from which to read.
+         *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
+         *  @bytes: [IN ] Number of bytes to read from memory.
+         */
+        int (*read_std)(unsigned long addr, void *val,
+                        unsigned int bytes, struct kvm_vcpu *vcpu);
+
+        /*
+         * read_emulated: Read bytes from emulated/special memory area.
+         *  @addr:  [IN ] Linear address from which to read.
+         *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
+         *  @bytes: [IN ] Number of bytes to read from memory.
+         */
+        int (*read_emulated) (unsigned long addr,
+                              void *val,
+                              unsigned int bytes,
+                              struct kvm_vcpu *vcpu);
+
+        /*
+         * write_emulated: Read bytes from emulated/special memory area.
+         *  @addr:  [IN ] Linear address to which to write.
+         *  @val:   [IN ] Value to write to memory (low-order bytes used as
+         *                required).
+         *  @bytes: [IN ] Number of bytes to write to memory.
+         */
+        int (*write_emulated) (unsigned long addr,
+                               const void *val,
+                               unsigned int bytes,
+                               struct kvm_vcpu *vcpu);
+
+        /*
+         * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
+         *                   emulated/special memory area.
+         *  @addr:  [IN ] Linear address to access.
+         *  @old:   [IN ] Value expected to be current at @addr.
+         *  @new:   [IN ] Value to write to @addr.
+         *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
+         */
+        int (*cmpxchg_emulated) (unsigned long addr,
+                                 const void *old,
+                                 const void *new,
+                                 unsigned int bytes,
+                                 struct kvm_vcpu *vcpu);
+
+};
+
+/* Type, address-of, and value of an instruction's operand. */
+struct operand {
+        enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type;
+        unsigned int bytes;
+        unsigned long val, orig_val, *ptr;
+};
+
+struct fetch_cache {
+        u8 data[15];
+        unsigned long start;
+        unsigned long end;
+};
+
+struct decode_cache {
+        u8 twobyte;
+        u8 b;
+        u8 lock_prefix;
+        u8 rep_prefix;
+        u8 op_bytes;
+        u8 ad_bytes;
+        u8 rex_prefix;
+        struct operand src;
+        struct operand dst;
+        unsigned long *override_base;
+        unsigned int d;
+        unsigned long regs[NR_VCPU_REGS];
+        unsigned long eip;
+        /* modrm */
+        u8 modrm;
+        u8 modrm_mod;
+        u8 modrm_reg;
+        u8 modrm_rm;
+        u8 use_modrm_ea;
+        unsigned long modrm_ea;
+        unsigned long modrm_val;
+        struct fetch_cache fetch;
+};
+
+struct x86_emulate_ctxt {
+        /* Register state before/after emulation. */
+        struct kvm_vcpu *vcpu;
+
+        /* Linear faulting address (if emulating a page-faulting instruction). */
+        unsigned long eflags;
+
+        /* Emulated execution mode, represented by an X86EMUL_MODE value. */
+        int mode;
+
+        unsigned long cs_base;
+        unsigned long ds_base;
+        unsigned long es_base;
+        unsigned long ss_base;
+        unsigned long gs_base;
+        unsigned long fs_base;
+
+        /* decode cache */
+
+        struct decode_cache decode;
+};
+
+/* Repeat String Operation Prefix */
+#define REPE_PREFIX  1
+#define REPNE_PREFIX    2
+
+/* Execution mode, passed to the emulator. */
+#define X86EMUL_MODE_REAL     0 /* Real mode.             */
+#define X86EMUL_MODE_PROT16   2 /* 16-bit protected mode. */
+#define X86EMUL_MODE_PROT32   4 /* 32-bit protected mode. */
+#define X86EMUL_MODE_PROT64   8 /* 64-bit (long) mode.    */
+
+/* Host execution mode. */
+#if defined(__i386__)
+#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
+#elif defined(CONFIG_X86_64)
+#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
+#endif
+
+int x86_decode_insn(struct x86_emulate_ctxt *ctxt,
+                    struct x86_emulate_ops *ops);
+int x86_emulate_insn(struct x86_emulate_ctxt *ctxt,
+                     struct x86_emulate_ops *ops);
+
+#endif                          /* __X86_EMULATE_H__ */