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authorShaohua Li <shaohua.li@intel.com>2008-08-20 22:46:06 -0400
committerIngo Molnar <mingo@elte.hu>2008-08-21 07:47:45 -0400
commitd75586ad01e6c5a30e7337fb87d61e03556a1ecb (patch)
tree71fa07acb4b408e51a72b2c0630c2a620196caf4 /include/asm-x86
parentcacf890694a36124ceddce44ff4c7b02d372ce7c (diff)
x86, pageattr: introduce APIs to change pageattr of a page array
Add array interface APIs of pageattr. page based cache flush is quite slow for a lot of pages. If pages are more than 1024 (4M), the patch will use a wbinvd(). We have a simple test here (run a 3d game - open arena), nearly all agp memory allocation are small (< 1M), so suppose this will not impact runtime performance. Signed-off-by: Dave Airlie <airlied@gmail.com> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86')
-rw-r--r--include/asm-x86/cacheflush.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h
index f4c0ab50d2c2..0a5f71817b3e 100644
--- a/include/asm-x86/cacheflush.h
+++ b/include/asm-x86/cacheflush.h
@@ -66,6 +66,9 @@ int set_memory_rw(unsigned long addr, int numpages);
66int set_memory_np(unsigned long addr, int numpages); 66int set_memory_np(unsigned long addr, int numpages);
67int set_memory_4k(unsigned long addr, int numpages); 67int set_memory_4k(unsigned long addr, int numpages);
68 68
69int set_memory_array_uc(unsigned long *addr, int addrinarray);
70int set_memory_array_wb(unsigned long *addr, int addrinarray);
71
69/* 72/*
70 * For legacy compatibility with the old APIs, a few functions 73 * For legacy compatibility with the old APIs, a few functions
71 * are provided that work on a "struct page". 74 * are provided that work on a "struct page".