diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2008-01-30 07:30:26 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:30:26 -0500 |
commit | 6ce60b07e670e800c4c5cfe984ed5188e7a64135 (patch) | |
tree | 108c493c98bc8afa42e246c9494d59543556c8c4 /include/asm-x86 | |
parent | 4ec08da02f0fda16fbc8dfa040568facaa576790 (diff) |
x86: unify mc146818rtc.h - prepare for sharing rtc code
Unify mc146818rtc.h by adding the rtc_cmos_read/write functions to
time_64.c. This is a preparatory patch to finaly share the rtc code,
which is unsurprisingly similar.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86')
-rw-r--r-- | include/asm-x86/mc146818rtc.h | 98 | ||||
-rw-r--r-- | include/asm-x86/mc146818rtc_32.h | 97 | ||||
-rw-r--r-- | include/asm-x86/mc146818rtc_64.h | 29 |
3 files changed, 95 insertions, 129 deletions
diff --git a/include/asm-x86/mc146818rtc.h b/include/asm-x86/mc146818rtc.h index 5c2bb66caf17..9d39436df231 100644 --- a/include/asm-x86/mc146818rtc.h +++ b/include/asm-x86/mc146818rtc.h | |||
@@ -1,5 +1,97 @@ | |||
1 | #ifdef CONFIG_X86_32 | 1 | /* |
2 | # include "mc146818rtc_32.h" | 2 | * Machine dependent access functions for RTC registers. |
3 | */ | ||
4 | #ifndef _ASM_MC146818RTC_H | ||
5 | #define _ASM_MC146818RTC_H | ||
6 | |||
7 | #include <asm/io.h> | ||
8 | #include <asm/system.h> | ||
9 | #include <asm/processor.h> | ||
10 | #include <linux/mc146818rtc.h> | ||
11 | |||
12 | #ifndef RTC_PORT | ||
13 | #define RTC_PORT(x) (0x70 + (x)) | ||
14 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ | ||
15 | #endif | ||
16 | |||
17 | #if defined(CONFIG_X86_32) && defined(__HAVE_ARCH_CMPXCHG) | ||
18 | /* | ||
19 | * This lock provides nmi access to the CMOS/RTC registers. It has some | ||
20 | * special properties. It is owned by a CPU and stores the index register | ||
21 | * currently being accessed (if owned). The idea here is that it works | ||
22 | * like a normal lock (normally). However, in an NMI, the NMI code will | ||
23 | * first check to see if its CPU owns the lock, meaning that the NMI | ||
24 | * interrupted during the read/write of the device. If it does, it goes ahead | ||
25 | * and performs the access and then restores the index register. If it does | ||
26 | * not, it locks normally. | ||
27 | * | ||
28 | * Note that since we are working with NMIs, we need this lock even in | ||
29 | * a non-SMP machine just to mark that the lock is owned. | ||
30 | * | ||
31 | * This only works with compare-and-swap. There is no other way to | ||
32 | * atomically claim the lock and set the owner. | ||
33 | */ | ||
34 | #include <linux/smp.h> | ||
35 | extern volatile unsigned long cmos_lock; | ||
36 | |||
37 | /* | ||
38 | * All of these below must be called with interrupts off, preempt | ||
39 | * disabled, etc. | ||
40 | */ | ||
41 | |||
42 | static inline void lock_cmos(unsigned char reg) | ||
43 | { | ||
44 | unsigned long new; | ||
45 | new = ((smp_processor_id()+1) << 8) | reg; | ||
46 | for (;;) { | ||
47 | if (cmos_lock) { | ||
48 | cpu_relax(); | ||
49 | continue; | ||
50 | } | ||
51 | if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0) | ||
52 | return; | ||
53 | } | ||
54 | } | ||
55 | |||
56 | static inline void unlock_cmos(void) | ||
57 | { | ||
58 | cmos_lock = 0; | ||
59 | } | ||
60 | static inline int do_i_have_lock_cmos(void) | ||
61 | { | ||
62 | return (cmos_lock >> 8) == (smp_processor_id()+1); | ||
63 | } | ||
64 | static inline unsigned char current_lock_cmos_reg(void) | ||
65 | { | ||
66 | return cmos_lock & 0xff; | ||
67 | } | ||
68 | #define lock_cmos_prefix(reg) \ | ||
69 | do { \ | ||
70 | unsigned long cmos_flags; \ | ||
71 | local_irq_save(cmos_flags); \ | ||
72 | lock_cmos(reg) | ||
73 | #define lock_cmos_suffix(reg) \ | ||
74 | unlock_cmos(); \ | ||
75 | local_irq_restore(cmos_flags); \ | ||
76 | } while (0) | ||
3 | #else | 77 | #else |
4 | # include "mc146818rtc_64.h" | 78 | #define lock_cmos_prefix(reg) do {} while (0) |
79 | #define lock_cmos_suffix(reg) do {} while (0) | ||
80 | #define lock_cmos(reg) | ||
81 | #define unlock_cmos() | ||
82 | #define do_i_have_lock_cmos() 0 | ||
83 | #define current_lock_cmos_reg() 0 | ||
5 | #endif | 84 | #endif |
85 | |||
86 | /* | ||
87 | * The yet supported machines all access the RTC index register via | ||
88 | * an ISA port access but the way to access the date register differs ... | ||
89 | */ | ||
90 | #define CMOS_READ(addr) rtc_cmos_read(addr) | ||
91 | #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr) | ||
92 | unsigned char rtc_cmos_read(unsigned char addr); | ||
93 | void rtc_cmos_write(unsigned char val, unsigned char addr); | ||
94 | |||
95 | #define RTC_IRQ 8 | ||
96 | |||
97 | #endif /* _ASM_MC146818RTC_H */ | ||
diff --git a/include/asm-x86/mc146818rtc_32.h b/include/asm-x86/mc146818rtc_32.h deleted file mode 100644 index 1613b42eaf58..000000000000 --- a/include/asm-x86/mc146818rtc_32.h +++ /dev/null | |||
@@ -1,97 +0,0 @@ | |||
1 | /* | ||
2 | * Machine dependent access functions for RTC registers. | ||
3 | */ | ||
4 | #ifndef _ASM_MC146818RTC_H | ||
5 | #define _ASM_MC146818RTC_H | ||
6 | |||
7 | #include <asm/io.h> | ||
8 | #include <asm/system.h> | ||
9 | #include <asm/processor.h> | ||
10 | #include <linux/mc146818rtc.h> | ||
11 | |||
12 | #ifndef RTC_PORT | ||
13 | #define RTC_PORT(x) (0x70 + (x)) | ||
14 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ | ||
15 | #endif | ||
16 | |||
17 | #ifdef __HAVE_ARCH_CMPXCHG | ||
18 | /* | ||
19 | * This lock provides nmi access to the CMOS/RTC registers. It has some | ||
20 | * special properties. It is owned by a CPU and stores the index register | ||
21 | * currently being accessed (if owned). The idea here is that it works | ||
22 | * like a normal lock (normally). However, in an NMI, the NMI code will | ||
23 | * first check to see if its CPU owns the lock, meaning that the NMI | ||
24 | * interrupted during the read/write of the device. If it does, it goes ahead | ||
25 | * and performs the access and then restores the index register. If it does | ||
26 | * not, it locks normally. | ||
27 | * | ||
28 | * Note that since we are working with NMIs, we need this lock even in | ||
29 | * a non-SMP machine just to mark that the lock is owned. | ||
30 | * | ||
31 | * This only works with compare-and-swap. There is no other way to | ||
32 | * atomically claim the lock and set the owner. | ||
33 | */ | ||
34 | #include <linux/smp.h> | ||
35 | extern volatile unsigned long cmos_lock; | ||
36 | |||
37 | /* | ||
38 | * All of these below must be called with interrupts off, preempt | ||
39 | * disabled, etc. | ||
40 | */ | ||
41 | |||
42 | static inline void lock_cmos(unsigned char reg) | ||
43 | { | ||
44 | unsigned long new; | ||
45 | new = ((smp_processor_id()+1) << 8) | reg; | ||
46 | for (;;) { | ||
47 | if (cmos_lock) { | ||
48 | cpu_relax(); | ||
49 | continue; | ||
50 | } | ||
51 | if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0) | ||
52 | return; | ||
53 | } | ||
54 | } | ||
55 | |||
56 | static inline void unlock_cmos(void) | ||
57 | { | ||
58 | cmos_lock = 0; | ||
59 | } | ||
60 | static inline int do_i_have_lock_cmos(void) | ||
61 | { | ||
62 | return (cmos_lock >> 8) == (smp_processor_id()+1); | ||
63 | } | ||
64 | static inline unsigned char current_lock_cmos_reg(void) | ||
65 | { | ||
66 | return cmos_lock & 0xff; | ||
67 | } | ||
68 | #define lock_cmos_prefix(reg) \ | ||
69 | do { \ | ||
70 | unsigned long cmos_flags; \ | ||
71 | local_irq_save(cmos_flags); \ | ||
72 | lock_cmos(reg) | ||
73 | #define lock_cmos_suffix(reg) \ | ||
74 | unlock_cmos(); \ | ||
75 | local_irq_restore(cmos_flags); \ | ||
76 | } while (0) | ||
77 | #else | ||
78 | #define lock_cmos_prefix(reg) do {} while (0) | ||
79 | #define lock_cmos_suffix(reg) do {} while (0) | ||
80 | #define lock_cmos(reg) | ||
81 | #define unlock_cmos() | ||
82 | #define do_i_have_lock_cmos() 0 | ||
83 | #define current_lock_cmos_reg() 0 | ||
84 | #endif | ||
85 | |||
86 | /* | ||
87 | * The yet supported machines all access the RTC index register via | ||
88 | * an ISA port access but the way to access the date register differs ... | ||
89 | */ | ||
90 | #define CMOS_READ(addr) rtc_cmos_read(addr) | ||
91 | #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr) | ||
92 | unsigned char rtc_cmos_read(unsigned char addr); | ||
93 | void rtc_cmos_write(unsigned char val, unsigned char addr); | ||
94 | |||
95 | #define RTC_IRQ 8 | ||
96 | |||
97 | #endif /* _ASM_MC146818RTC_H */ | ||
diff --git a/include/asm-x86/mc146818rtc_64.h b/include/asm-x86/mc146818rtc_64.h deleted file mode 100644 index d6e3009430c1..000000000000 --- a/include/asm-x86/mc146818rtc_64.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * Machine dependent access functions for RTC registers. | ||
3 | */ | ||
4 | #ifndef _ASM_MC146818RTC_H | ||
5 | #define _ASM_MC146818RTC_H | ||
6 | |||
7 | #include <asm/io.h> | ||
8 | |||
9 | #ifndef RTC_PORT | ||
10 | #define RTC_PORT(x) (0x70 + (x)) | ||
11 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ | ||
12 | #endif | ||
13 | |||
14 | /* | ||
15 | * The yet supported machines all access the RTC index register via | ||
16 | * an ISA port access but the way to access the date register differs ... | ||
17 | */ | ||
18 | #define CMOS_READ(addr) ({ \ | ||
19 | outb_p((addr),RTC_PORT(0)); \ | ||
20 | inb_p(RTC_PORT(1)); \ | ||
21 | }) | ||
22 | #define CMOS_WRITE(val, addr) ({ \ | ||
23 | outb_p((addr),RTC_PORT(0)); \ | ||
24 | outb_p((val),RTC_PORT(1)); \ | ||
25 | }) | ||
26 | |||
27 | #define RTC_IRQ 8 | ||
28 | |||
29 | #endif /* _ASM_MC146818RTC_H */ | ||