diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-07-10 09:04:13 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-07-10 12:55:34 -0400 |
commit | d8d1bc73f0ccb60f4d6056333b8fcb3140772c21 (patch) | |
tree | 7fd15b6ee5c584db7639a40b97570b411cefb06e /include/asm-x86 | |
parent | 808fc878d373c338f138529c284df5f86ab3cc55 (diff) |
x86, VisWS: turn into generic arch, eliminate include/asm-x86/mach-visws/mach_apic.h
now that include/asm-x86/mach-visws/mach_apic.h equals
to include/asm-x86/mach-default/mach_apic.h, simply start
using the generic one.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86')
-rw-r--r-- | include/asm-x86/mach-visws/mach_apic.h | 142 |
1 files changed, 1 insertions, 141 deletions
diff --git a/include/asm-x86/mach-visws/mach_apic.h b/include/asm-x86/mach-visws/mach_apic.h index 0b2cde5e1b74..6943e7a1d0e6 100644 --- a/include/asm-x86/mach-visws/mach_apic.h +++ b/include/asm-x86/mach-visws/mach_apic.h | |||
@@ -1,141 +1 @@ | |||
1 | #ifndef __ASM_MACH_APIC_H | #include "../mach-default/mach_apic.h" | |
2 | #define __ASM_MACH_APIC_H | ||
3 | |||
4 | #ifdef CONFIG_X86_LOCAL_APIC | ||
5 | |||
6 | #include <mach_apicdef.h> | ||
7 | #include <asm/smp.h> | ||
8 | |||
9 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
10 | |||
11 | static inline cpumask_t target_cpus(void) | ||
12 | { | ||
13 | #ifdef CONFIG_SMP | ||
14 | return cpu_online_map; | ||
15 | #else | ||
16 | return cpumask_of_cpu(0); | ||
17 | #endif | ||
18 | } | ||
19 | |||
20 | #define NO_BALANCE_IRQ (0) | ||
21 | #define esr_disable (0) | ||
22 | |||
23 | #ifdef CONFIG_X86_64 | ||
24 | #include <asm/genapic.h> | ||
25 | #define INT_DELIVERY_MODE (genapic->int_delivery_mode) | ||
26 | #define INT_DEST_MODE (genapic->int_dest_mode) | ||
27 | #define TARGET_CPUS (genapic->target_cpus()) | ||
28 | #define apic_id_registered (genapic->apic_id_registered) | ||
29 | #define init_apic_ldr (genapic->init_apic_ldr) | ||
30 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) | ||
31 | #define phys_pkg_id (genapic->phys_pkg_id) | ||
32 | #define vector_allocation_domain (genapic->vector_allocation_domain) | ||
33 | extern void setup_apic_routing(void); | ||
34 | #else | ||
35 | #define INT_DELIVERY_MODE dest_LowestPrio | ||
36 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ | ||
37 | #define TARGET_CPUS (target_cpus()) | ||
38 | /* | ||
39 | * Set up the logical destination ID. | ||
40 | * | ||
41 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
42 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
43 | * document number 292116). So here it goes... | ||
44 | */ | ||
45 | static inline void init_apic_ldr(void) | ||
46 | { | ||
47 | unsigned long val; | ||
48 | |||
49 | apic_write_around(APIC_DFR, APIC_DFR_VALUE); | ||
50 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
51 | val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); | ||
52 | apic_write_around(APIC_LDR, val); | ||
53 | } | ||
54 | |||
55 | static inline int apic_id_registered(void) | ||
56 | { | ||
57 | return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map); | ||
58 | } | ||
59 | |||
60 | static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) | ||
61 | { | ||
62 | return cpus_addr(cpumask)[0]; | ||
63 | } | ||
64 | |||
65 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
66 | { | ||
67 | return cpuid_apic >> index_msb; | ||
68 | } | ||
69 | |||
70 | static inline void setup_apic_routing(void) | ||
71 | { | ||
72 | #ifdef CONFIG_X86_IO_APIC | ||
73 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | ||
74 | "Flat", nr_ioapics); | ||
75 | #endif | ||
76 | } | ||
77 | |||
78 | static inline int apicid_to_node(int logical_apicid) | ||
79 | { | ||
80 | #ifdef CONFIG_SMP | ||
81 | return apicid_2_node[hard_smp_processor_id()]; | ||
82 | #else | ||
83 | return 0; | ||
84 | #endif | ||
85 | } | ||
86 | #endif | ||
87 | |||
88 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
89 | { | ||
90 | return physid_isset(apicid, bitmap); | ||
91 | } | ||
92 | |||
93 | static inline unsigned long check_apicid_present(int bit) | ||
94 | { | ||
95 | return physid_isset(bit, phys_cpu_present_map); | ||
96 | } | ||
97 | |||
98 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
99 | { | ||
100 | return phys_map; | ||
101 | } | ||
102 | |||
103 | static inline int multi_timer_check(int apic, int irq) | ||
104 | { | ||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | /* Mapping from cpu number to logical apicid */ | ||
109 | static inline int cpu_to_logical_apicid(int cpu) | ||
110 | { | ||
111 | return 1 << cpu; | ||
112 | } | ||
113 | |||
114 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
115 | { | ||
116 | if (mps_cpu < NR_CPUS && cpu_present(mps_cpu)) | ||
117 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
118 | else | ||
119 | return BAD_APICID; | ||
120 | } | ||
121 | |||
122 | static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) | ||
123 | { | ||
124 | return physid_mask_of_physid(phys_apicid); | ||
125 | } | ||
126 | |||
127 | static inline void setup_portio_remap(void) | ||
128 | { | ||
129 | } | ||
130 | |||
131 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
132 | { | ||
133 | return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); | ||
134 | } | ||
135 | |||
136 | static inline void enable_apic_mode(void) | ||
137 | { | ||
138 | } | ||
139 | |||
140 | #endif /* CONFIG_X86_LOCAL_APIC */ | ||
141 | #endif /* __ASM_MACH_APIC_H */ | ||