diff options
| author | Shannon Nelson <shannon.nelson@intel.com> | 2007-10-16 04:27:42 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 12:43:09 -0400 |
| commit | 2ed6dc34f9ed39bb8e4c81ea1056f0ba56315841 (patch) | |
| tree | e3f6ca7961f9c4e34453d06e584c0bc98ec630d7 /include/asm-x86 | |
| parent | 7589670f37736bcc119ebfbd69aafea6d585d1d4 (diff) | |
I/OAT: Add DCA services
Add code to connect to the DCA driver and provide cpu tags for use by
drivers that would like to use Direct Cache Access hints.
[Adrian Bunk] Several Kconfig cleanup items
[Andrew Morten, Chris Leech] Fix for using cpu_physical_id() even when
built for uni-processor
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-x86')
| -rw-r--r-- | include/asm-x86/cpufeature_32.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86/cpufeature_32.h b/include/asm-x86/cpufeature_32.h index 7b3aa28ebc6e..f17e688dfb05 100644 --- a/include/asm-x86/cpufeature_32.h +++ b/include/asm-x86/cpufeature_32.h | |||
| @@ -92,6 +92,7 @@ | |||
| 92 | #define X86_FEATURE_CID (4*32+10) /* Context ID */ | 92 | #define X86_FEATURE_CID (4*32+10) /* Context ID */ |
| 93 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ | 93 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ |
| 94 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ | 94 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ |
| 95 | #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */ | ||
| 95 | 96 | ||
| 96 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ | 97 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ |
| 97 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ | 98 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ |