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authorNick Piggin <npiggin@suse.de>2007-10-12 21:06:55 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-12 21:41:21 -0400
commit4071c718555d955a35e9651f77086096ad87d498 (patch)
tree5189a9995143892a8ef7ecfc04c11c1d546bc21b /include/asm-x86/system_64.h
parentdf1bdc0667eb3132fe60b3562347ca9133694ee0 (diff)
x86: fix IO write barrier
wmb() on x86 must always include a barrier, because stores can go out of order in many cases when dealing with devices (eg. WC memory). Signed-off-by: Nick Piggin <npiggin@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-x86/system_64.h')
-rw-r--r--include/asm-x86/system_64.h6
1 files changed, 1 insertions, 5 deletions
diff --git a/include/asm-x86/system_64.h b/include/asm-x86/system_64.h
index 02175aa1d16a..eff730b11926 100644
--- a/include/asm-x86/system_64.h
+++ b/include/asm-x86/system_64.h
@@ -159,12 +159,8 @@ static inline void write_cr8(unsigned long val)
159 */ 159 */
160#define mb() asm volatile("mfence":::"memory") 160#define mb() asm volatile("mfence":::"memory")
161#define rmb() asm volatile("lfence":::"memory") 161#define rmb() asm volatile("lfence":::"memory")
162
163#ifdef CONFIG_UNORDERED_IO
164#define wmb() asm volatile("sfence" ::: "memory") 162#define wmb() asm volatile("sfence" ::: "memory")
165#else 163
166#define wmb() asm volatile("" ::: "memory")
167#endif
168#define read_barrier_depends() do {} while(0) 164#define read_barrier_depends() do {} while(0)
169#define set_mb(var, value) do { (void) xchg(&var, value); } while (0) 165#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
170 166