diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2008-01-30 07:30:34 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:30:34 -0500 |
commit | cf244e30f5b50763cbe85f7de30923d12999e38d (patch) | |
tree | eec188d1e806960981d8c537b698ae20c219afcc /include/asm-x86/spinlock_32.h | |
parent | 3b23ed84ec34f04f54f7d5b1e35f258d64a7a5fb (diff) |
x86: spinlock_32/64 substitute types and instructions
Use _slock_t for the spinlock data types and replace the instructions
by string defines, which makes the code of 32/64 bit versions more
or less identical.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/spinlock_32.h')
-rw-r--r-- | include/asm-x86/spinlock_32.h | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/include/asm-x86/spinlock_32.h b/include/asm-x86/spinlock_32.h index 4ef626d53682..2de9b8b89903 100644 --- a/include/asm-x86/spinlock_32.h +++ b/include/asm-x86/spinlock_32.h | |||
@@ -17,20 +17,27 @@ | |||
17 | * (the type definitions are in asm/spinlock_types.h) | 17 | * (the type definitions are in asm/spinlock_types.h) |
18 | */ | 18 | */ |
19 | 19 | ||
20 | typedef char _slock_t; | ||
21 | #define LOCK_INS_DEC "decb" | ||
22 | #define LOCK_INS_XCH "xchgb" | ||
23 | #define LOCK_INS_MOV "movb" | ||
24 | #define LOCK_INS_CMP "cmpb" | ||
25 | #define LOCK_PTR_REG "a" | ||
26 | |||
20 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) | 27 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) |
21 | { | 28 | { |
22 | return *(volatile signed char *)(&(lock)->slock) <= 0; | 29 | return *(volatile _slock_t *)(&(lock)->slock) <= 0; |
23 | } | 30 | } |
24 | 31 | ||
25 | static inline void __raw_spin_lock(raw_spinlock_t *lock) | 32 | static inline void __raw_spin_lock(raw_spinlock_t *lock) |
26 | { | 33 | { |
27 | asm volatile( | 34 | asm volatile( |
28 | "\n1:\t" | 35 | "\n1:\t" |
29 | LOCK_PREFIX " ; decb %0\n\t" | 36 | LOCK_PREFIX " ; " LOCK_INS_DEC " %0\n\t" |
30 | "jns 3f\n" | 37 | "jns 3f\n" |
31 | "2:\t" | 38 | "2:\t" |
32 | "rep;nop\n\t" | 39 | "rep;nop\n\t" |
33 | "cmpb $0,%0\n\t" | 40 | LOCK_INS_CMP " $0,%0\n\t" |
34 | "jle 2b\n\t" | 41 | "jle 2b\n\t" |
35 | "jmp 1b\n" | 42 | "jmp 1b\n" |
36 | "3:\n\t" | 43 | "3:\n\t" |
@@ -51,25 +58,25 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, | |||
51 | { | 58 | { |
52 | asm volatile( | 59 | asm volatile( |
53 | "\n1:\t" | 60 | "\n1:\t" |
54 | LOCK_PREFIX " ; decb %[slock]\n\t" | 61 | LOCK_PREFIX " ; " LOCK_INS_DEC " %[slock]\n\t" |
55 | "jns 5f\n" | 62 | "jns 5f\n" |
56 | "testl $0x200, %[flags]\n\t" | 63 | "testl $0x200, %[flags]\n\t" |
57 | "jz 4f\n\t" | 64 | "jz 4f\n\t" |
58 | STI_STRING "\n" | 65 | STI_STRING "\n" |
59 | "3:\t" | 66 | "3:\t" |
60 | "rep;nop\n\t" | 67 | "rep;nop\n\t" |
61 | "cmpb $0, %[slock]\n\t" | 68 | LOCK_INS_CMP " $0, %[slock]\n\t" |
62 | "jle 3b\n\t" | 69 | "jle 3b\n\t" |
63 | CLI_STRING "\n\t" | 70 | CLI_STRING "\n\t" |
64 | "jmp 1b\n" | 71 | "jmp 1b\n" |
65 | "4:\t" | 72 | "4:\t" |
66 | "rep;nop\n\t" | 73 | "rep;nop\n\t" |
67 | "cmpb $0, %[slock]\n\t" | 74 | LOCK_INS_CMP " $0, %[slock]\n\t" |
68 | "jg 1b\n\t" | 75 | "jg 1b\n\t" |
69 | "jmp 4b\n" | 76 | "jmp 4b\n" |
70 | "5:\n\t" | 77 | "5:\n\t" |
71 | : [slock] "+m" (lock->slock) | 78 | : [slock] "+m" (lock->slock) |
72 | : [flags] "r" (flags) | 79 | : [flags] "r" ((u32)flags) |
73 | CLI_STI_INPUT_ARGS | 80 | CLI_STI_INPUT_ARGS |
74 | : "memory" CLI_STI_CLOBBERS); | 81 | : "memory" CLI_STI_CLOBBERS); |
75 | } | 82 | } |
@@ -77,10 +84,10 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, | |||
77 | 84 | ||
78 | static inline int __raw_spin_trylock(raw_spinlock_t *lock) | 85 | static inline int __raw_spin_trylock(raw_spinlock_t *lock) |
79 | { | 86 | { |
80 | signed char oldval; | 87 | _slock_t oldval; |
81 | 88 | ||
82 | asm volatile( | 89 | asm volatile( |
83 | "xchgb %b0,%1" | 90 | LOCK_INS_XCH " %0,%1" |
84 | :"=q" (oldval), "+m" (lock->slock) | 91 | :"=q" (oldval), "+m" (lock->slock) |
85 | :"0" (0) : "memory"); | 92 | :"0" (0) : "memory"); |
86 | 93 | ||
@@ -98,7 +105,7 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock) | |||
98 | 105 | ||
99 | static inline void __raw_spin_unlock(raw_spinlock_t *lock) | 106 | static inline void __raw_spin_unlock(raw_spinlock_t *lock) |
100 | { | 107 | { |
101 | asm volatile("movb $1,%0" : "=m" (lock->slock) :: "memory"); | 108 | asm volatile(LOCK_INS_MOV " $1,%0" : "=m" (lock->slock) :: "memory"); |
102 | } | 109 | } |
103 | 110 | ||
104 | #else | 111 | #else |
@@ -150,7 +157,7 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) | |||
150 | "jns 1f\n" | 157 | "jns 1f\n" |
151 | "call __read_lock_failed\n\t" | 158 | "call __read_lock_failed\n\t" |
152 | "1:\n" | 159 | "1:\n" |
153 | ::"a" (rw) : "memory"); | 160 | ::LOCK_PTR_REG (rw) : "memory"); |
154 | } | 161 | } |
155 | 162 | ||
156 | static inline void __raw_write_lock(raw_rwlock_t *rw) | 163 | static inline void __raw_write_lock(raw_rwlock_t *rw) |
@@ -159,7 +166,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) | |||
159 | "jz 1f\n" | 166 | "jz 1f\n" |
160 | "call __write_lock_failed\n\t" | 167 | "call __write_lock_failed\n\t" |
161 | "1:\n" | 168 | "1:\n" |
162 | ::"a" (rw), "i" (RW_LOCK_BIAS) : "memory"); | 169 | ::LOCK_PTR_REG (rw), "i" (RW_LOCK_BIAS) : "memory"); |
163 | } | 170 | } |
164 | 171 | ||
165 | static inline int __raw_read_trylock(raw_rwlock_t *lock) | 172 | static inline int __raw_read_trylock(raw_rwlock_t *lock) |