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authorMike Travis <travis@sgi.com>2007-10-16 04:24:04 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 12:42:50 -0400
commit083576112940fda783d716fd5ccc744f81667b2f (patch)
tree226139e7cb9863c91d1e2a1ac0babb0db94f3d11 /include/asm-x86/smp_64.h
parentcc84634f29d5a92932400a2d52ca17dee2c8a462 (diff)
x86: Convert cpu_core_map to be a per cpu variable
This is from an earlier message from 'Christoph Lameter': cpu_core_map is currently an array defined using NR_CPUS. This means that we overallocate since we will rarely really use maximum configured cpu. If we put the cpu_core_map into the per cpu area then it will be allocated for each processor as it comes online. This means that the core map cannot be accessed until the per cpu area has been allocated. Xen does a weird thing here looping over all processors and zeroing the masks that are not yet allocated and that will be zeroed when they are allocated. I commented the code out. Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Mike Travis <travis@sgi.com> Cc: Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-x86/smp_64.h')
-rw-r--r--include/asm-x86/smp_64.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/include/asm-x86/smp_64.h b/include/asm-x86/smp_64.h
index 3f303d2365ed..65f844864415 100644
--- a/include/asm-x86/smp_64.h
+++ b/include/asm-x86/smp_64.h
@@ -39,7 +39,12 @@ extern int smp_num_siblings;
39extern void smp_send_reschedule(int cpu); 39extern void smp_send_reschedule(int cpu);
40 40
41extern cpumask_t cpu_sibling_map[NR_CPUS]; 41extern cpumask_t cpu_sibling_map[NR_CPUS];
42extern cpumask_t cpu_core_map[NR_CPUS]; 42/*
43 * cpu_core_map lives in a per cpu area
44 *
45 * extern cpumask_t cpu_core_map[NR_CPUS];
46 */
47DECLARE_PER_CPU(cpumask_t, cpu_core_map);
43extern u8 cpu_llc_id[NR_CPUS]; 48extern u8 cpu_llc_id[NR_CPUS];
44 49
45#define SMP_TRAMPOLINE_BASE 0x6000 50#define SMP_TRAMPOLINE_BASE 0x6000