diff options
author | Jan Beulich <jbeulich@novell.com> | 2007-10-17 12:04:41 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@inhelltoy.tec.linutronix.de> | 2007-10-17 14:17:04 -0400 |
commit | 32c464f5d9701db45bc1673288594e664065388e (patch) | |
tree | 342e6e8be44bcdc5bdc3ddd0cbf1ba15a0340602 /include/asm-x86/processor_64.h | |
parent | c861eff88c92d98ee661cf0d2fa978611edeaceb (diff) |
x86: multi-byte single instruction NOPs
Add support for and use the multi-byte NOPs recently documented to be
available on all PentiumPro and later processors.
This patch only applies cleanly on top of the "x86: misc.
constifications" patch sent earlier.
[ tglx: arch/x86 adaptation ]
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/kernel/alternative.c | 23 ++++++++++++++++++++++-
include/asm-x86/processor_32.h | 22 ++++++++++++++++++++++
include/asm-x86/processor_64.h | 22 ++++++++++++++++++++++
3 files changed, 66 insertions(+), 1 deletion(-)
Diffstat (limited to 'include/asm-x86/processor_64.h')
-rw-r--r-- | include/asm-x86/processor_64.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/include/asm-x86/processor_64.h b/include/asm-x86/processor_64.h index 2f12eb6e46b0..f422becbddd9 100644 --- a/include/asm-x86/processor_64.h +++ b/include/asm-x86/processor_64.h | |||
@@ -334,6 +334,16 @@ struct extended_sigtable { | |||
334 | }; | 334 | }; |
335 | 335 | ||
336 | 336 | ||
337 | #if defined(CONFIG_MPSC) || defined(CONFIG_MCORE2) | ||
338 | #define ASM_NOP1 P6_NOP1 | ||
339 | #define ASM_NOP2 P6_NOP2 | ||
340 | #define ASM_NOP3 P6_NOP3 | ||
341 | #define ASM_NOP4 P6_NOP4 | ||
342 | #define ASM_NOP5 P6_NOP5 | ||
343 | #define ASM_NOP6 P6_NOP6 | ||
344 | #define ASM_NOP7 P6_NOP7 | ||
345 | #define ASM_NOP8 P6_NOP8 | ||
346 | #else | ||
337 | #define ASM_NOP1 K8_NOP1 | 347 | #define ASM_NOP1 K8_NOP1 |
338 | #define ASM_NOP2 K8_NOP2 | 348 | #define ASM_NOP2 K8_NOP2 |
339 | #define ASM_NOP3 K8_NOP3 | 349 | #define ASM_NOP3 K8_NOP3 |
@@ -342,6 +352,7 @@ struct extended_sigtable { | |||
342 | #define ASM_NOP6 K8_NOP6 | 352 | #define ASM_NOP6 K8_NOP6 |
343 | #define ASM_NOP7 K8_NOP7 | 353 | #define ASM_NOP7 K8_NOP7 |
344 | #define ASM_NOP8 K8_NOP8 | 354 | #define ASM_NOP8 K8_NOP8 |
355 | #endif | ||
345 | 356 | ||
346 | /* Opteron nops */ | 357 | /* Opteron nops */ |
347 | #define K8_NOP1 ".byte 0x90\n" | 358 | #define K8_NOP1 ".byte 0x90\n" |
@@ -353,6 +364,17 @@ struct extended_sigtable { | |||
353 | #define K8_NOP7 K8_NOP4 K8_NOP3 | 364 | #define K8_NOP7 K8_NOP4 K8_NOP3 |
354 | #define K8_NOP8 K8_NOP4 K8_NOP4 | 365 | #define K8_NOP8 K8_NOP4 K8_NOP4 |
355 | 366 | ||
367 | /* P6 nops */ | ||
368 | /* uses eax dependencies (Intel-recommended choice) */ | ||
369 | #define P6_NOP1 ".byte 0x90\n" | ||
370 | #define P6_NOP2 ".byte 0x66,0x90\n" | ||
371 | #define P6_NOP3 ".byte 0x0f,0x1f,0x00\n" | ||
372 | #define P6_NOP4 ".byte 0x0f,0x1f,0x40,0\n" | ||
373 | #define P6_NOP5 ".byte 0x0f,0x1f,0x44,0x00,0\n" | ||
374 | #define P6_NOP6 ".byte 0x66,0x0f,0x1f,0x44,0x00,0\n" | ||
375 | #define P6_NOP7 ".byte 0x0f,0x1f,0x80,0,0,0,0\n" | ||
376 | #define P6_NOP8 ".byte 0x0f,0x1f,0x84,0x00,0,0,0,0\n" | ||
377 | |||
356 | #define ASM_NOP_MAX 8 | 378 | #define ASM_NOP_MAX 8 |
357 | 379 | ||
358 | /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */ | 380 | /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */ |