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authorH. Peter Anvin <hpa@zytor.com>2008-09-04 11:08:42 -0400
committerH. Peter Anvin <hpa@zytor.com>2008-09-04 11:08:42 -0400
commit7203781c98ad9147564d327de6f6513ad8fc0f4e (patch)
tree5c29a2a04a626bf08a0d56fd8a0068b3c92ad284 /include/asm-x86/processor.h
parent671eef85a3e885dff4ce210d8774ad50a91d5967 (diff)
parentaf2e1f276ff08f17192411ea3b71c13a758dfe12 (diff)
Merge branch 'x86/cpu' into x86/core
Conflicts: arch/x86/kernel/cpu/feature_names.c include/asm-x86/cpufeature.h
Diffstat (limited to 'include/asm-x86/processor.h')
-rw-r--r--include/asm-x86/processor.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 6d5648945ebf..10471cfab145 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -732,6 +732,29 @@ extern unsigned long boot_option_idle_override;
732extern unsigned long idle_halt; 732extern unsigned long idle_halt;
733extern unsigned long idle_nomwait; 733extern unsigned long idle_nomwait;
734 734
735/*
736 * on systems with caches, caches must be flashed as the absolute
737 * last instruction before going into a suspended halt. Otherwise,
738 * dirty data can linger in the cache and become stale on resume,
739 * leading to strange errors.
740 *
741 * perform a variety of operations to guarantee that the compiler
742 * will not reorder instructions. wbinvd itself is serializing
743 * so the processor will not reorder.
744 *
745 * Systems without cache can just go into halt.
746 */
747static inline void wbinvd_halt(void)
748{
749 mb();
750 /* check for clflush to determine if wbinvd is legal */
751 if (cpu_has_clflush)
752 asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
753 else
754 while (1)
755 halt();
756}
757
735extern void enable_sep_cpu(void); 758extern void enable_sep_cpu(void);
736extern int sysenter_setup(void); 759extern int sysenter_setup(void);
737 760