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authorH. Peter Anvin <hpa@zytor.com>2008-09-04 12:04:45 -0400
committerH. Peter Anvin <hpa@zytor.com>2008-09-04 12:04:45 -0400
commitfe47784ba5cbb6b713c013e046859946789b45e4 (patch)
tree6384958d55e29be0d2eb8ae78fa437c10636d8d6 /include/asm-x86/processor.h
parent83b8e28b14d63db928cb39e5c5ed2a548246bd71 (diff)
parentaf2e1f276ff08f17192411ea3b71c13a758dfe12 (diff)
Merge branch 'x86/cpu' into x86/xsave
Conflicts: arch/x86/kernel/cpu/feature_names.c include/asm-x86/cpufeature.h
Diffstat (limited to 'include/asm-x86/processor.h')
-rw-r--r--include/asm-x86/processor.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index eb4bd8c07730..61c3d3005dc9 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -746,6 +746,29 @@ extern unsigned long boot_option_idle_override;
746extern unsigned long idle_halt; 746extern unsigned long idle_halt;
747extern unsigned long idle_nomwait; 747extern unsigned long idle_nomwait;
748 748
749/*
750 * on systems with caches, caches must be flashed as the absolute
751 * last instruction before going into a suspended halt. Otherwise,
752 * dirty data can linger in the cache and become stale on resume,
753 * leading to strange errors.
754 *
755 * perform a variety of operations to guarantee that the compiler
756 * will not reorder instructions. wbinvd itself is serializing
757 * so the processor will not reorder.
758 *
759 * Systems without cache can just go into halt.
760 */
761static inline void wbinvd_halt(void)
762{
763 mb();
764 /* check for clflush to determine if wbinvd is legal */
765 if (cpu_has_clflush)
766 asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
767 else
768 while (1)
769 halt();
770}
771
749extern void enable_sep_cpu(void); 772extern void enable_sep_cpu(void);
750extern int sysenter_setup(void); 773extern int sysenter_setup(void);
751 774