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authorIngo Molnar <mingo@elte.hu>2008-04-17 11:40:45 -0400
committerIngo Molnar <mingo@elte.hu>2008-04-17 11:40:45 -0400
commit00d1c5e05736f947687be27706bda01cec104e57 (patch)
treeb5690b58de35efa2f928d1daaf24b21650ebc8a0 /include/asm-x86/pgtable_64.h
parentfe770bf0310d90b3b033c19044d45b7de5f2041c (diff)
x86: add gbpages switches
These new controls toggle experimental support for a new CPU feature, the straightforward extension of largepages from the pmd level to the pud level, which allows 1GB (kernel) TLBs instead of 2MB TLBs. Turn it off by default, as this code has not been tested well enough yet. Use the CONFIG_DIRECT_GBPAGES=y .config option or gbpages on the boot line can be used to enable it. If enabled in the .config then nogbpages boot option disables it. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/pgtable_64.h')
-rw-r--r--include/asm-x86/pgtable_64.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
index 01d2359e7a34..6ef09914acbe 100644
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -239,6 +239,8 @@ static inline int pud_large(pud_t pte)
239 239
240#define update_mmu_cache(vma,address,pte) do { } while (0) 240#define update_mmu_cache(vma,address,pte) do { } while (0)
241 241
242extern int direct_gbpages;
243
242/* Encode and de-code a swap entry */ 244/* Encode and de-code a swap entry */
243#define __swp_type(x) (((x).val >> 1) & 0x3f) 245#define __swp_type(x) (((x).val >> 1) & 0x3f)
244#define __swp_offset(x) ((x).val >> 8) 246#define __swp_offset(x) ((x).val >> 8)