x86: fix compat-vdso

Jeff Chua reported that this patch:

> -#define PTE_IDENT_ATTR  0x007          /* PRESENT+RW+USER */
> -#define PDE_IDENT_ATTR  0x067          /* PRESENT+RW+USER+DIRTY+ACCESSED */
> +#define PTE_IDENT_ATTR  0x003          /* PRESENT+RW */
> +#define PDE_IDENT_ATTR  0x063          /* PRESENT+RW+DIRTY+ACCESSED */

broke kernels with CONFIG_COMPAT_VDSO set with this init segfault:

init[1]: segfault at ffffe01c up b7f0dc28 sp bfc26628 error 5 in ld-2.7.90.so[b7f0b000+1c000]

Include USER bit in the PDE_IDENT_ATTR only, as the protection bits
are combined from the PDE and PTE entries. This will allow the high
mapped VDSO page in the case of CONFIG_COMPAT_VDSO to be user
readable.

Reported-by: Jeff Chua <jeff.chua.linux@gmail.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Tested-by: Jeff Chua <jeff.chua.linux@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 6 insertions, 1 deletions

diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index ed932453ef26..e9f10af50f49 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -138,8 +138,13 @@
 #ifdef CONFIG_X86_64
 #define __PAGE_KERNEL_IDENT_LARGE_EXEC  __PAGE_KERNEL_LARGE_EXEC
 #else
+/*
+ * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
+ * bits are combined, this will alow user to access the high address mapped
+ * VDSO in the presence of CONFIG_COMPAT_VDSO
+ */
 #define PTE_IDENT_ATTR   0x003          /* PRESENT+RW */
-#define PDE_IDENT_ATTR   0x063          /* PRESENT+RW+DIRTY+ACCESSED */
+#define PDE_IDENT_ATTR   0x067          /* PRESENT+RW+USER+DIRTY+ACCESSED */
 #define PGD_IDENT_ATTR   0x001          /* PRESENT (no other attributes) */
 #endif