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authorJeremy Fitzhardinge <jeremy@goop.org>2008-01-30 07:32:58 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:32:58 -0500
commit4891645e764d2e181b834509a689fcd12e890c10 (patch)
treef347227c2d5a5b112bca8fe76b149ccc5157ef84 /include/asm-x86/pgtable-3level.h
parent8405b122ad0dd75354b3bfed4de9a96514fd40cb (diff)
x86: unify paravirt pagetable accessors
Put all the defines for mapping pagetable operations to their native versions (for the non-paravirt case) into one place. Make the corresponding changes to paravirt.h. The tricky part here is that when a pagetable entry can't be updated atomically (ie, 32-bit PAE), we need special handlers for pte_clear, set_pte_atomic and set_pte_present. However, the other two modes don't need special handling for these, and can use a common set_pte(_at) path. [ mingo@elte.hu: fixes ] Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/pgtable-3level.h')
-rw-r--r--include/asm-x86/pgtable-3level.h15
1 files changed, 0 insertions, 15 deletions
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
index a123e687112f..5af7a44ed902 100644
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -39,11 +39,6 @@ static inline void native_set_pte(pte_t *ptep, pte_t pte)
39 smp_wmb(); 39 smp_wmb();
40 ptep->pte_low = pte.pte_low; 40 ptep->pte_low = pte.pte_low;
41} 41}
42static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
43 pte_t *ptep , pte_t pte)
44{
45 native_set_pte(ptep, pte);
46}
47 42
48/* 43/*
49 * Since this is only called on user PTEs, and the page fault handler 44 * Since this is only called on user PTEs, and the page fault handler
@@ -94,16 +89,6 @@ static inline void native_pmd_clear(pmd_t *pmd)
94 *(tmp + 1) = 0; 89 *(tmp + 1) = 0;
95} 90}
96 91
97#ifndef CONFIG_PARAVIRT
98#define set_pte(ptep, pte) native_set_pte(ptep, pte)
99#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
100#define set_pte_present(mm, addr, ptep, pte) native_set_pte_present(mm, addr, ptep, pte)
101#define set_pte_atomic(ptep, pte) native_set_pte_atomic(ptep, pte)
102#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
103#define set_pud(pudp, pud) native_set_pud(pudp, pud)
104#define pmd_clear(pmd) native_pmd_clear(pmd)
105#endif
106
107/* 92/*
108 * Pentium-II erratum A13: in PAE mode we explicitly have to flush 93 * Pentium-II erratum A13: in PAE mode we explicitly have to flush
109 * the TLB via cr3 if the top-level pgd is changed... 94 * the TLB via cr3 if the top-level pgd is changed...