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| author | David S. Miller <davem@davemloft.net> | 2008-09-16 17:11:43 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-09-16 17:11:43 -0400 |
| commit | 2e57572a50a4de41c6cbc879a4866a312d4cd316 (patch) | |
| tree | c4f58ec96c06642c4b415b881d3f0a3b673d5b44 /include/asm-x86/msr.h | |
| parent | 9b2e43ae4e9609f80034dfe8de895045cac52d77 (diff) | |
| parent | f948cc6ab9e61a8e88d70ee9aafc690e6d26f92c (diff) | |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
Conflicts:
arch/sparc64/kernel/pci_psycho.c
Diffstat (limited to 'include/asm-x86/msr.h')
| -rw-r--r-- | include/asm-x86/msr.h | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h index ca110ee73f07..2362cfda1fbc 100644 --- a/include/asm-x86/msr.h +++ b/include/asm-x86/msr.h | |||
| @@ -52,14 +52,14 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr, | |||
| 52 | { | 52 | { |
| 53 | DECLARE_ARGS(val, low, high); | 53 | DECLARE_ARGS(val, low, high); |
| 54 | 54 | ||
| 55 | asm volatile("2: rdmsr ; xor %0,%0\n" | 55 | asm volatile("2: rdmsr ; xor %[err],%[err]\n" |
| 56 | "1:\n\t" | 56 | "1:\n\t" |
| 57 | ".section .fixup,\"ax\"\n\t" | 57 | ".section .fixup,\"ax\"\n\t" |
| 58 | "3: mov %3,%0 ; jmp 1b\n\t" | 58 | "3: mov %[fault],%[err] ; jmp 1b\n\t" |
| 59 | ".previous\n\t" | 59 | ".previous\n\t" |
| 60 | _ASM_EXTABLE(2b, 3b) | 60 | _ASM_EXTABLE(2b, 3b) |
| 61 | : "=r" (*err), EAX_EDX_RET(val, low, high) | 61 | : [err] "=r" (*err), EAX_EDX_RET(val, low, high) |
| 62 | : "c" (msr), "i" (-EFAULT)); | 62 | : "c" (msr), [fault] "i" (-EFAULT)); |
| 63 | return EAX_EDX_VAL(val, low, high); | 63 | return EAX_EDX_VAL(val, low, high); |
| 64 | } | 64 | } |
| 65 | 65 | ||
| @@ -73,15 +73,15 @@ static inline int native_write_msr_safe(unsigned int msr, | |||
| 73 | unsigned low, unsigned high) | 73 | unsigned low, unsigned high) |
| 74 | { | 74 | { |
| 75 | int err; | 75 | int err; |
| 76 | asm volatile("2: wrmsr ; xor %0,%0\n" | 76 | asm volatile("2: wrmsr ; xor %[err],%[err]\n" |
| 77 | "1:\n\t" | 77 | "1:\n\t" |
| 78 | ".section .fixup,\"ax\"\n\t" | 78 | ".section .fixup,\"ax\"\n\t" |
| 79 | "3: mov %4,%0 ; jmp 1b\n\t" | 79 | "3: mov %[fault],%[err] ; jmp 1b\n\t" |
| 80 | ".previous\n\t" | 80 | ".previous\n\t" |
| 81 | _ASM_EXTABLE(2b, 3b) | 81 | _ASM_EXTABLE(2b, 3b) |
| 82 | : "=a" (err) | 82 | : [err] "=a" (err) |
| 83 | : "c" (msr), "0" (low), "d" (high), | 83 | : "c" (msr), "0" (low), "d" (high), |
| 84 | "i" (-EFAULT) | 84 | [fault] "i" (-EFAULT) |
| 85 | : "memory"); | 85 | : "memory"); |
| 86 | return err; | 86 | return err; |
| 87 | } | 87 | } |
| @@ -192,19 +192,20 @@ do { \ | |||
| 192 | #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0) | 192 | #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0) |
| 193 | 193 | ||
| 194 | #ifdef CONFIG_SMP | 194 | #ifdef CONFIG_SMP |
| 195 | void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); | 195 | int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); |
| 196 | void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); | 196 | int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); |
| 197 | int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); | 197 | int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); |
| 198 | |||
| 199 | int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); | 198 | int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); |
| 200 | #else /* CONFIG_SMP */ | 199 | #else /* CONFIG_SMP */ |
| 201 | static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) | 200 | static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) |
| 202 | { | 201 | { |
| 203 | rdmsr(msr_no, *l, *h); | 202 | rdmsr(msr_no, *l, *h); |
| 203 | return 0; | ||
| 204 | } | 204 | } |
| 205 | static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) | 205 | static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) |
| 206 | { | 206 | { |
| 207 | wrmsr(msr_no, l, h); | 207 | wrmsr(msr_no, l, h); |
| 208 | return 0; | ||
| 208 | } | 209 | } |
| 209 | static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, | 210 | static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, |
| 210 | u32 *l, u32 *h) | 211 | u32 *l, u32 *h) |