diff options
author | David Woodhouse <David.Woodhouse@intel.com> | 2008-10-13 12:13:56 -0400 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2008-10-13 12:13:56 -0400 |
commit | e758936e02700ff88a0b08b722a3847b95283ef2 (patch) | |
tree | 50c919bef1b459a778b85159d5929de95b6c4a01 /include/asm-x86/msr.h | |
parent | 239cfbde1f5843c4a24199f117d5f67f637d72d5 (diff) | |
parent | 4480f15b3306f43bbb0310d461142b4e897ca45b (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
include/asm-x86/statfs.h
Diffstat (limited to 'include/asm-x86/msr.h')
-rw-r--r-- | include/asm-x86/msr.h | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h index 2362cfda1fbc..530af1f6389e 100644 --- a/include/asm-x86/msr.h +++ b/include/asm-x86/msr.h | |||
@@ -1,5 +1,5 @@ | |||
1 | #ifndef __ASM_X86_MSR_H_ | 1 | #ifndef ASM_X86__MSR_H |
2 | #define __ASM_X86_MSR_H_ | 2 | #define ASM_X86__MSR_H |
3 | 3 | ||
4 | #include <asm/msr-index.h> | 4 | #include <asm/msr-index.h> |
5 | 5 | ||
@@ -63,6 +63,22 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr, | |||
63 | return EAX_EDX_VAL(val, low, high); | 63 | return EAX_EDX_VAL(val, low, high); |
64 | } | 64 | } |
65 | 65 | ||
66 | static inline unsigned long long native_read_msr_amd_safe(unsigned int msr, | ||
67 | int *err) | ||
68 | { | ||
69 | DECLARE_ARGS(val, low, high); | ||
70 | |||
71 | asm volatile("2: rdmsr ; xor %0,%0\n" | ||
72 | "1:\n\t" | ||
73 | ".section .fixup,\"ax\"\n\t" | ||
74 | "3: mov %3,%0 ; jmp 1b\n\t" | ||
75 | ".previous\n\t" | ||
76 | _ASM_EXTABLE(2b, 3b) | ||
77 | : "=r" (*err), EAX_EDX_RET(val, low, high) | ||
78 | : "c" (msr), "D" (0x9c5a203a), "i" (-EFAULT)); | ||
79 | return EAX_EDX_VAL(val, low, high); | ||
80 | } | ||
81 | |||
66 | static inline void native_write_msr(unsigned int msr, | 82 | static inline void native_write_msr(unsigned int msr, |
67 | unsigned low, unsigned high) | 83 | unsigned low, unsigned high) |
68 | { | 84 | { |
@@ -158,6 +174,13 @@ static inline int rdmsrl_safe(unsigned msr, unsigned long long *p) | |||
158 | *p = native_read_msr_safe(msr, &err); | 174 | *p = native_read_msr_safe(msr, &err); |
159 | return err; | 175 | return err; |
160 | } | 176 | } |
177 | static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) | ||
178 | { | ||
179 | int err; | ||
180 | |||
181 | *p = native_read_msr_amd_safe(msr, &err); | ||
182 | return err; | ||
183 | } | ||
161 | 184 | ||
162 | #define rdtscl(low) \ | 185 | #define rdtscl(low) \ |
163 | ((low) = (u32)native_read_tsc()) | 186 | ((low) = (u32)native_read_tsc()) |
@@ -221,4 +244,4 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) | |||
221 | #endif /* __KERNEL__ */ | 244 | #endif /* __KERNEL__ */ |
222 | 245 | ||
223 | 246 | ||
224 | #endif | 247 | #endif /* ASM_X86__MSR_H */ |