x86: PAT infrastructure patch

Sets up pat_init() infrastructure.

PAT MSR has following setting.
	PAT
	|PCD
	||PWT
	|||
	000 WB		_PAGE_CACHE_WB
	001 WC		_PAGE_CACHE_WC
	010 UC-		_PAGE_CACHE_UC_MINUS
	011 UC		_PAGE_CACHE_UC

We are effectively changing WT from boot time setting to WC.
UC_MINUS is used to provide backward compatibility to existing /dev/mem
users(X).

reserve_memtype and free_memtype are new interfaces for maintaining alias-free
mapping. It is currently implemented in a simple way with a linked list and
not optimized. reserve and free tracks the effective memory type, as a result
of PAT and MTRR setting rather than what is actually requested in PAT.

pat_init piggy backs on mtrr_init as the rules for setting both pat and mtrr
are same.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 2 insertions, 0 deletions

diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h
index 3ed97144c07b..af4e07f661b8 100644
--- a/include/asm-x86/msr-index.h
+++ b/include/asm-x86/msr-index.h
@@ -57,6 +57,8 @@
 #define MSR_MTRRfix4K_F8000             0x0000026f
 #define MSR_MTRRdefType                 0x000002ff
 
+#define MSR_IA32_CR_PAT                 0x00000277
+
 #define MSR_IA32_DEBUGCTLMSR            0x000001d9
 #define MSR_IA32_LASTBRANCHFROMIP       0x000001db
 #define MSR_IA32_LASTBRANCHTOIP         0x000001dc