diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-16 18:36:00 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-16 18:36:00 -0400 |
commit | 08d19f51f05a68ce89a289320ce4ed96e757df72 (patch) | |
tree | 31c5d718d0aeaff5083fe533cd6e1f9fbbe846bb /include/asm-x86/msr-index.h | |
parent | 1c95e1b69073cff5ff179e592fa1a1e182c78a17 (diff) | |
parent | 2381ad241d0bea1253a37f314b270848067640bb (diff) |
Merge branch 'kvm-updates/2.6.28' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm
* 'kvm-updates/2.6.28' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm: (134 commits)
KVM: ia64: Add intel iommu support for guests.
KVM: ia64: add directed mmio range support for kvm guests
KVM: ia64: Make pmt table be able to hold physical mmio entries.
KVM: Move irqchip_in_kernel() from ioapic.h to irq.h
KVM: Separate irq ack notification out of arch/x86/kvm/irq.c
KVM: Change is_mmio_pfn to kvm_is_mmio_pfn, and make it common for all archs
KVM: Move device assignment logic to common code
KVM: Device Assignment: Move vtd.c from arch/x86/kvm/ to virt/kvm/
KVM: VMX: enable invlpg exiting if EPT is disabled
KVM: x86: Silence various LAPIC-related host kernel messages
KVM: Device Assignment: Map mmio pages into VT-d page table
KVM: PIC: enhance IPI avoidance
KVM: MMU: add "oos_shadow" parameter to disable oos
KVM: MMU: speed up mmu_unsync_walk
KVM: MMU: out of sync shadow core
KVM: MMU: mmu_convert_notrap helper
KVM: MMU: awareness of new kvm_mmu_zap_page behaviour
KVM: MMU: mmu_parent_walk
KVM: x86: trap invlpg
KVM: MMU: sync roots on mmu reload
...
Diffstat (limited to 'include/asm-x86/msr-index.h')
-rw-r--r-- | include/asm-x86/msr-index.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h index 0bb43301a202..dabd10f0bbee 100644 --- a/include/asm-x86/msr-index.h +++ b/include/asm-x86/msr-index.h | |||
@@ -178,6 +178,9 @@ | |||
178 | #define MSR_IA32_EBL_CR_POWERON 0x0000002a | 178 | #define MSR_IA32_EBL_CR_POWERON 0x0000002a |
179 | #define MSR_IA32_FEATURE_CONTROL 0x0000003a | 179 | #define MSR_IA32_FEATURE_CONTROL 0x0000003a |
180 | 180 | ||
181 | #define FEATURE_CONTROL_LOCKED (1<<0) | ||
182 | #define FEATURE_CONTROL_VMXON_ENABLED (1<<2) | ||
183 | |||
181 | #define MSR_IA32_APICBASE 0x0000001b | 184 | #define MSR_IA32_APICBASE 0x0000001b |
182 | #define MSR_IA32_APICBASE_BSP (1<<8) | 185 | #define MSR_IA32_APICBASE_BSP (1<<8) |
183 | #define MSR_IA32_APICBASE_ENABLE (1<<11) | 186 | #define MSR_IA32_APICBASE_ENABLE (1<<11) |