diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2008-01-30 07:30:35 -0500 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:30:35 -0500 |
commit | c2805aa1d8ae51c7582d2ccbd736afa545cf5cc4 (patch) | |
tree | 90ecc8370d0118300646f357a8e8d34a06df448a /include/asm-x86/mpspec_64.h | |
parent | 64883ab0e3386d72112a9091d886352a7b4b8bf6 (diff) |
x86: merge mpspec variants
The delta is now minimal. Merge them
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/mpspec_64.h')
-rw-r--r-- | include/asm-x86/mpspec_64.h | 79 |
1 files changed, 0 insertions, 79 deletions
diff --git a/include/asm-x86/mpspec_64.h b/include/asm-x86/mpspec_64.h deleted file mode 100644 index 16eab20667cd..000000000000 --- a/include/asm-x86/mpspec_64.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | #ifndef __ASM_MPSPEC_H | ||
2 | #define __ASM_MPSPEC_H | ||
3 | |||
4 | #include <asm/mpspec_def.h> | ||
5 | |||
6 | #define MAX_MP_BUSSES 256 | ||
7 | /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ | ||
8 | #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) | ||
9 | extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); | ||
10 | |||
11 | extern int mp_bus_id_to_pci_bus[MAX_MP_BUSSES]; | ||
12 | |||
13 | extern unsigned int boot_cpu_physical_apicid; | ||
14 | extern int smp_found_config; | ||
15 | extern int nr_ioapics; | ||
16 | extern int mp_irq_entries; | ||
17 | extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; | ||
18 | extern int mpc_default_type; | ||
19 | extern unsigned long mp_lapic_addr; | ||
20 | |||
21 | extern void find_smp_config (void); | ||
22 | extern void get_smp_config (void); | ||
23 | |||
24 | #ifdef CONFIG_ACPI | ||
25 | extern void mp_register_lapic (u8 id, u8 enabled); | ||
26 | extern void mp_register_lapic_address (u64 address); | ||
27 | extern void mp_register_ioapic (u8 id, u32 address, u32 gsi_base); | ||
28 | extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, | ||
29 | u32 gsi); | ||
30 | extern void mp_config_acpi_legacy_irqs (void); | ||
31 | extern int mp_register_gsi (u32 gsi, int edge_level, int active_high_low); | ||
32 | #endif /* CONFIG_ACPI */ | ||
33 | |||
34 | #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS) | ||
35 | |||
36 | struct physid_mask | ||
37 | { | ||
38 | unsigned long mask[PHYSID_ARRAY_SIZE]; | ||
39 | }; | ||
40 | |||
41 | typedef struct physid_mask physid_mask_t; | ||
42 | |||
43 | #define physid_set(physid, map) set_bit(physid, (map).mask) | ||
44 | #define physid_clear(physid, map) clear_bit(physid, (map).mask) | ||
45 | #define physid_isset(physid, map) test_bit(physid, (map).mask) | ||
46 | #define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask) | ||
47 | |||
48 | #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS) | ||
49 | #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS) | ||
50 | #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS) | ||
51 | #define physids_complement(dst, src) bitmap_complement((dst).mask, (src).mask, MAX_APICS) | ||
52 | #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS) | ||
53 | #define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS) | ||
54 | #define physids_weight(map) bitmap_weight((map).mask, MAX_APICS) | ||
55 | #define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS) | ||
56 | #define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS) | ||
57 | #define physids_coerce(map) ((map).mask[0]) | ||
58 | |||
59 | #define physids_promote(physids) \ | ||
60 | ({ \ | ||
61 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ | ||
62 | __physid_mask.mask[0] = physids; \ | ||
63 | __physid_mask; \ | ||
64 | }) | ||
65 | |||
66 | #define physid_mask_of_physid(physid) \ | ||
67 | ({ \ | ||
68 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ | ||
69 | physid_set(physid, __physid_mask); \ | ||
70 | __physid_mask; \ | ||
71 | }) | ||
72 | |||
73 | #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } | ||
74 | #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } | ||
75 | |||
76 | extern physid_mask_t phys_cpu_present_map; | ||
77 | |||
78 | #endif | ||
79 | |||