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authorAl Viro <viro@zeniv.linux.org.uk>2008-08-17 21:05:42 -0400
committerH. Peter Anvin <hpa@zytor.com>2008-10-23 01:55:20 -0400
commitbb8985586b7a906e116db835c64773b7a7d51663 (patch)
treede93ae58e88cc563d95cc124a73f3930594c6100 /include/asm-x86/mach-default
parent8ede0bdb63305d3353efd97e9af6210afb05734e (diff)
x86, um: ... and asm-x86 move
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'include/asm-x86/mach-default')
-rw-r--r--include/asm-x86/mach-default/apm.h73
-rw-r--r--include/asm-x86/mach-default/do_timer.h16
-rw-r--r--include/asm-x86/mach-default/entry_arch.h36
-rw-r--r--include/asm-x86/mach-default/mach_apic.h156
-rw-r--r--include/asm-x86/mach-default/mach_apicdef.h24
-rw-r--r--include/asm-x86/mach-default/mach_ipi.h64
-rw-r--r--include/asm-x86/mach-default/mach_mpparse.h17
-rw-r--r--include/asm-x86/mach-default/mach_mpspec.h12
-rw-r--r--include/asm-x86/mach-default/mach_timer.h48
-rw-r--r--include/asm-x86/mach-default/mach_traps.h33
-rw-r--r--include/asm-x86/mach-default/mach_wakecpu.h42
-rw-r--r--include/asm-x86/mach-default/pci-functions.h19
-rw-r--r--include/asm-x86/mach-default/setup_arch.h3
-rw-r--r--include/asm-x86/mach-default/smpboot_hooks.h59
14 files changed, 0 insertions, 602 deletions
diff --git a/include/asm-x86/mach-default/apm.h b/include/asm-x86/mach-default/apm.h
deleted file mode 100644
index 2aa61b54fbd5..000000000000
--- a/include/asm-x86/mach-default/apm.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * Machine specific APM BIOS functions for generic.
3 * Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp>
4 */
5
6#ifndef ASM_X86__MACH_DEFAULT__APM_H
7#define ASM_X86__MACH_DEFAULT__APM_H
8
9#ifdef APM_ZERO_SEGS
10# define APM_DO_ZERO_SEGS \
11 "pushl %%ds\n\t" \
12 "pushl %%es\n\t" \
13 "xorl %%edx, %%edx\n\t" \
14 "mov %%dx, %%ds\n\t" \
15 "mov %%dx, %%es\n\t" \
16 "mov %%dx, %%fs\n\t" \
17 "mov %%dx, %%gs\n\t"
18# define APM_DO_POP_SEGS \
19 "popl %%es\n\t" \
20 "popl %%ds\n\t"
21#else
22# define APM_DO_ZERO_SEGS
23# define APM_DO_POP_SEGS
24#endif
25
26static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in,
27 u32 *eax, u32 *ebx, u32 *ecx,
28 u32 *edx, u32 *esi)
29{
30 /*
31 * N.B. We do NOT need a cld after the BIOS call
32 * because we always save and restore the flags.
33 */
34 __asm__ __volatile__(APM_DO_ZERO_SEGS
35 "pushl %%edi\n\t"
36 "pushl %%ebp\n\t"
37 "lcall *%%cs:apm_bios_entry\n\t"
38 "setc %%al\n\t"
39 "popl %%ebp\n\t"
40 "popl %%edi\n\t"
41 APM_DO_POP_SEGS
42 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx),
43 "=S" (*esi)
44 : "a" (func), "b" (ebx_in), "c" (ecx_in)
45 : "memory", "cc");
46}
47
48static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
49 u32 ecx_in, u32 *eax)
50{
51 int cx, dx, si;
52 u8 error;
53
54 /*
55 * N.B. We do NOT need a cld after the BIOS call
56 * because we always save and restore the flags.
57 */
58 __asm__ __volatile__(APM_DO_ZERO_SEGS
59 "pushl %%edi\n\t"
60 "pushl %%ebp\n\t"
61 "lcall *%%cs:apm_bios_entry\n\t"
62 "setc %%bl\n\t"
63 "popl %%ebp\n\t"
64 "popl %%edi\n\t"
65 APM_DO_POP_SEGS
66 : "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx),
67 "=S" (si)
68 : "a" (func), "b" (ebx_in), "c" (ecx_in)
69 : "memory", "cc");
70 return error;
71}
72
73#endif /* ASM_X86__MACH_DEFAULT__APM_H */
diff --git a/include/asm-x86/mach-default/do_timer.h b/include/asm-x86/mach-default/do_timer.h
deleted file mode 100644
index 23ecda0b28a0..000000000000
--- a/include/asm-x86/mach-default/do_timer.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* defines for inline arch setup functions */
2#include <linux/clockchips.h>
3
4#include <asm/i8259.h>
5#include <asm/i8253.h>
6
7/**
8 * do_timer_interrupt_hook - hook into timer tick
9 *
10 * Call the pit clock event handler. see asm/i8253.h
11 **/
12
13static inline void do_timer_interrupt_hook(void)
14{
15 global_clock_event->event_handler(global_clock_event);
16}
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h
deleted file mode 100644
index 6b1add8e31dd..000000000000
--- a/include/asm-x86/mach-default/entry_arch.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * This file is designed to contain the BUILD_INTERRUPT specifications for
3 * all of the extra named interrupt vectors used by the architecture.
4 * Usually this is the Inter Process Interrupts (IPIs)
5 */
6
7/*
8 * The following vectors are part of the Linux architecture, there
9 * is no hardware IRQ pin equivalent for them, they are triggered
10 * through the ICC by us (IPIs)
11 */
12#ifdef CONFIG_X86_SMP
13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
17BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
18#endif
19
20/*
21 * every pentium local APIC has two 'local interrupts', with a
22 * soft-definable vector attached to both interrupts, one of
23 * which is a timer interrupt, the other one is error counter
24 * overflow. Linux uses the local APIC timer interrupt to get
25 * a much simpler SMP time architecture:
26 */
27#ifdef CONFIG_X86_LOCAL_APIC
28BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
29BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
30BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
31
32#ifdef CONFIG_X86_MCE_P4THERMAL
33BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
34#endif
35
36#endif
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
deleted file mode 100644
index 3c66f2cdaec1..000000000000
--- a/include/asm-x86/mach-default/mach_apic.h
+++ /dev/null
@@ -1,156 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_APIC_H
2#define ASM_X86__MACH_DEFAULT__MACH_APIC_H
3
4#ifdef CONFIG_X86_LOCAL_APIC
5
6#include <mach_apicdef.h>
7#include <asm/smp.h>
8
9#define APIC_DFR_VALUE (APIC_DFR_FLAT)
10
11static inline cpumask_t target_cpus(void)
12{
13#ifdef CONFIG_SMP
14 return cpu_online_map;
15#else
16 return cpumask_of_cpu(0);
17#endif
18}
19
20#define NO_BALANCE_IRQ (0)
21#define esr_disable (0)
22
23#ifdef CONFIG_X86_64
24#include <asm/genapic.h>
25#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
26#define INT_DEST_MODE (genapic->int_dest_mode)
27#define TARGET_CPUS (genapic->target_cpus())
28#define apic_id_registered (genapic->apic_id_registered)
29#define init_apic_ldr (genapic->init_apic_ldr)
30#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
31#define phys_pkg_id (genapic->phys_pkg_id)
32#define vector_allocation_domain (genapic->vector_allocation_domain)
33#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
34#define send_IPI_self (genapic->send_IPI_self)
35extern void setup_apic_routing(void);
36#else
37#define INT_DELIVERY_MODE dest_LowestPrio
38#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
39#define TARGET_CPUS (target_cpus())
40/*
41 * Set up the logical destination ID.
42 *
43 * Intel recommends to set DFR, LDR and TPR before enabling
44 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
45 * document number 292116). So here it goes...
46 */
47static inline void init_apic_ldr(void)
48{
49 unsigned long val;
50
51 apic_write(APIC_DFR, APIC_DFR_VALUE);
52 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
53 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
54 apic_write(APIC_LDR, val);
55}
56
57static inline int apic_id_registered(void)
58{
59 return physid_isset(read_apic_id(), phys_cpu_present_map);
60}
61
62static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
63{
64 return cpus_addr(cpumask)[0];
65}
66
67static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
68{
69 return cpuid_apic >> index_msb;
70}
71
72static inline void setup_apic_routing(void)
73{
74#ifdef CONFIG_X86_IO_APIC
75 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
76 "Flat", nr_ioapics);
77#endif
78}
79
80static inline int apicid_to_node(int logical_apicid)
81{
82#ifdef CONFIG_SMP
83 return apicid_2_node[hard_smp_processor_id()];
84#else
85 return 0;
86#endif
87}
88
89static inline cpumask_t vector_allocation_domain(int cpu)
90{
91 /* Careful. Some cpus do not strictly honor the set of cpus
92 * specified in the interrupt destination when using lowest
93 * priority interrupt delivery mode.
94 *
95 * In particular there was a hyperthreading cpu observed to
96 * deliver interrupts to the wrong hyperthread when only one
97 * hyperthread was specified in the interrupt desitination.
98 */
99 cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
100 return domain;
101}
102#endif
103
104static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
105{
106 return physid_isset(apicid, bitmap);
107}
108
109static inline unsigned long check_apicid_present(int bit)
110{
111 return physid_isset(bit, phys_cpu_present_map);
112}
113
114static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
115{
116 return phys_map;
117}
118
119static inline int multi_timer_check(int apic, int irq)
120{
121 return 0;
122}
123
124/* Mapping from cpu number to logical apicid */
125static inline int cpu_to_logical_apicid(int cpu)
126{
127 return 1 << cpu;
128}
129
130static inline int cpu_present_to_apicid(int mps_cpu)
131{
132 if (mps_cpu < NR_CPUS && cpu_present(mps_cpu))
133 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
134 else
135 return BAD_APICID;
136}
137
138static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
139{
140 return physid_mask_of_physid(phys_apicid);
141}
142
143static inline void setup_portio_remap(void)
144{
145}
146
147static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
148{
149 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
150}
151
152static inline void enable_apic_mode(void)
153{
154}
155#endif /* CONFIG_X86_LOCAL_APIC */
156#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */
diff --git a/include/asm-x86/mach-default/mach_apicdef.h b/include/asm-x86/mach-default/mach_apicdef.h
deleted file mode 100644
index 0c2d41c41b20..000000000000
--- a/include/asm-x86/mach-default/mach_apicdef.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_APICDEF_H
2#define ASM_X86__MACH_DEFAULT__MACH_APICDEF_H
3
4#include <asm/apic.h>
5
6#ifdef CONFIG_X86_64
7#define APIC_ID_MASK (genapic->apic_id_mask)
8#define GET_APIC_ID(x) (genapic->get_apic_id(x))
9#define SET_APIC_ID(x) (genapic->set_apic_id(x))
10#else
11#define APIC_ID_MASK (0xF<<24)
12static inline unsigned get_apic_id(unsigned long x)
13{
14 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
15 if (APIC_XAPIC(ver))
16 return (((x)>>24)&0xFF);
17 else
18 return (((x)>>24)&0xF);
19}
20
21#define GET_APIC_ID(x) get_apic_id(x)
22#endif
23
24#endif /* ASM_X86__MACH_DEFAULT__MACH_APICDEF_H */
diff --git a/include/asm-x86/mach-default/mach_ipi.h b/include/asm-x86/mach-default/mach_ipi.h
deleted file mode 100644
index 674bc7e50c35..000000000000
--- a/include/asm-x86/mach-default/mach_ipi.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_IPI_H
2#define ASM_X86__MACH_DEFAULT__MACH_IPI_H
3
4/* Avoid include hell */
5#define NMI_VECTOR 0x02
6
7void send_IPI_mask_bitmask(cpumask_t mask, int vector);
8void __send_IPI_shortcut(unsigned int shortcut, int vector);
9
10extern int no_broadcast;
11
12#ifdef CONFIG_X86_64
13#include <asm/genapic.h>
14#define send_IPI_mask (genapic->send_IPI_mask)
15#else
16static inline void send_IPI_mask(cpumask_t mask, int vector)
17{
18 send_IPI_mask_bitmask(mask, vector);
19}
20#endif
21
22static inline void __local_send_IPI_allbutself(int vector)
23{
24 if (no_broadcast || vector == NMI_VECTOR) {
25 cpumask_t mask = cpu_online_map;
26
27 cpu_clear(smp_processor_id(), mask);
28 send_IPI_mask(mask, vector);
29 } else
30 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
31}
32
33static inline void __local_send_IPI_all(int vector)
34{
35 if (no_broadcast || vector == NMI_VECTOR)
36 send_IPI_mask(cpu_online_map, vector);
37 else
38 __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
39}
40
41#ifdef CONFIG_X86_64
42#define send_IPI_allbutself (genapic->send_IPI_allbutself)
43#define send_IPI_all (genapic->send_IPI_all)
44#else
45static inline void send_IPI_allbutself(int vector)
46{
47 /*
48 * if there are no other CPUs in the system then we get an APIC send
49 * error if we try to broadcast, thus avoid sending IPIs in this case.
50 */
51 if (!(num_online_cpus() > 1))
52 return;
53
54 __local_send_IPI_allbutself(vector);
55 return;
56}
57
58static inline void send_IPI_all(int vector)
59{
60 __local_send_IPI_all(vector);
61}
62#endif
63
64#endif /* ASM_X86__MACH_DEFAULT__MACH_IPI_H */
diff --git a/include/asm-x86/mach-default/mach_mpparse.h b/include/asm-x86/mach-default/mach_mpparse.h
deleted file mode 100644
index 9c381f2815ac..000000000000
--- a/include/asm-x86/mach-default/mach_mpparse.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H
2#define ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H
3
4static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
5 char *productid)
6{
7 return 0;
8}
9
10/* Hook from generic ACPI tables.c */
11static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
12{
13 return 0;
14}
15
16
17#endif /* ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H */
diff --git a/include/asm-x86/mach-default/mach_mpspec.h b/include/asm-x86/mach-default/mach_mpspec.h
deleted file mode 100644
index d77646f011f1..000000000000
--- a/include/asm-x86/mach-default/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H
2#define ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H
3
4#define MAX_IRQ_SOURCES 256
5
6#if CONFIG_BASE_SMALL == 0
7#define MAX_MP_BUSSES 256
8#else
9#define MAX_MP_BUSSES 32
10#endif
11
12#endif /* ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H */
diff --git a/include/asm-x86/mach-default/mach_timer.h b/include/asm-x86/mach-default/mach_timer.h
deleted file mode 100644
index 990b15833834..000000000000
--- a/include/asm-x86/mach-default/mach_timer.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Machine specific calibrate_tsc() for generic.
3 * Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp>
4 */
5/* ------ Calibrate the TSC -------
6 * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset().
7 * Too much 64-bit arithmetic here to do this cleanly in C, and for
8 * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
9 * output busy loop as low as possible. We avoid reading the CTC registers
10 * directly because of the awkward 8-bit access mechanism of the 82C54
11 * device.
12 */
13#ifndef ASM_X86__MACH_DEFAULT__MACH_TIMER_H
14#define ASM_X86__MACH_DEFAULT__MACH_TIMER_H
15
16#define CALIBRATE_TIME_MSEC 30 /* 30 msecs */
17#define CALIBRATE_LATCH \
18 ((CLOCK_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000)
19
20static inline void mach_prepare_counter(void)
21{
22 /* Set the Gate high, disable speaker */
23 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
24
25 /*
26 * Now let's take care of CTC channel 2
27 *
28 * Set the Gate high, program CTC channel 2 for mode 0,
29 * (interrupt on terminal count mode), binary count,
30 * load 5 * LATCH count, (LSB and MSB) to begin countdown.
31 *
32 * Some devices need a delay here.
33 */
34 outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */
35 outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */
36 outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */
37}
38
39static inline void mach_countup(unsigned long *count_p)
40{
41 unsigned long count = 0;
42 do {
43 count++;
44 } while ((inb_p(0x61) & 0x20) == 0);
45 *count_p = count;
46}
47
48#endif /* ASM_X86__MACH_DEFAULT__MACH_TIMER_H */
diff --git a/include/asm-x86/mach-default/mach_traps.h b/include/asm-x86/mach-default/mach_traps.h
deleted file mode 100644
index ff8778f26b84..000000000000
--- a/include/asm-x86/mach-default/mach_traps.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * Machine specific NMI handling for generic.
3 * Split out from traps.c by Osamu Tomita <tomita@cinet.co.jp>
4 */
5#ifndef ASM_X86__MACH_DEFAULT__MACH_TRAPS_H
6#define ASM_X86__MACH_DEFAULT__MACH_TRAPS_H
7
8#include <asm/mc146818rtc.h>
9
10static inline unsigned char get_nmi_reason(void)
11{
12 return inb(0x61);
13}
14
15static inline void reassert_nmi(void)
16{
17 int old_reg = -1;
18
19 if (do_i_have_lock_cmos())
20 old_reg = current_lock_cmos_reg();
21 else
22 lock_cmos(0); /* register doesn't matter here */
23 outb(0x8f, 0x70);
24 inb(0x71); /* dummy */
25 outb(0x0f, 0x70);
26 inb(0x71); /* dummy */
27 if (old_reg >= 0)
28 outb(old_reg, 0x70);
29 else
30 unlock_cmos();
31}
32
33#endif /* ASM_X86__MACH_DEFAULT__MACH_TRAPS_H */
diff --git a/include/asm-x86/mach-default/mach_wakecpu.h b/include/asm-x86/mach-default/mach_wakecpu.h
deleted file mode 100644
index 361b810f5160..000000000000
--- a/include/asm-x86/mach-default/mach_wakecpu.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H
2#define ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H
3
4/*
5 * This file copes with machines that wakeup secondary CPUs by the
6 * INIT, INIT, STARTUP sequence.
7 */
8
9#define WAKE_SECONDARY_VIA_INIT
10
11#define TRAMPOLINE_LOW phys_to_virt(0x467)
12#define TRAMPOLINE_HIGH phys_to_virt(0x469)
13
14#define boot_cpu_apicid boot_cpu_physical_apicid
15
16static inline void wait_for_init_deassert(atomic_t *deassert)
17{
18 while (!atomic_read(deassert))
19 cpu_relax();
20 return;
21}
22
23/* Nothing to do for most platforms, since cleared by the INIT cycle */
24static inline void smp_callin_clear_local_apic(void)
25{
26}
27
28static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
29{
30}
31
32static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
33{
34}
35
36#if APIC_DEBUG
37 #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
38#else
39 #define inquire_remote_apic(apicid) {}
40#endif
41
42#endif /* ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H */
diff --git a/include/asm-x86/mach-default/pci-functions.h b/include/asm-x86/mach-default/pci-functions.h
deleted file mode 100644
index ed0bab427354..000000000000
--- a/include/asm-x86/mach-default/pci-functions.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * PCI BIOS function numbering for conventional PCI BIOS
3 * systems
4 */
5
6#define PCIBIOS_PCI_FUNCTION_ID 0xb1XX
7#define PCIBIOS_PCI_BIOS_PRESENT 0xb101
8#define PCIBIOS_FIND_PCI_DEVICE 0xb102
9#define PCIBIOS_FIND_PCI_CLASS_CODE 0xb103
10#define PCIBIOS_GENERATE_SPECIAL_CYCLE 0xb106
11#define PCIBIOS_READ_CONFIG_BYTE 0xb108
12#define PCIBIOS_READ_CONFIG_WORD 0xb109
13#define PCIBIOS_READ_CONFIG_DWORD 0xb10a
14#define PCIBIOS_WRITE_CONFIG_BYTE 0xb10b
15#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c
16#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d
17#define PCIBIOS_GET_ROUTING_OPTIONS 0xb10e
18#define PCIBIOS_SET_PCI_HW_INT 0xb10f
19
diff --git a/include/asm-x86/mach-default/setup_arch.h b/include/asm-x86/mach-default/setup_arch.h
deleted file mode 100644
index 38846208b548..000000000000
--- a/include/asm-x86/mach-default/setup_arch.h
+++ /dev/null
@@ -1,3 +0,0 @@
1/* Hook to call BIOS initialisation function */
2
3/* no action for generic */
diff --git a/include/asm-x86/mach-default/smpboot_hooks.h b/include/asm-x86/mach-default/smpboot_hooks.h
deleted file mode 100644
index dbab36d64d48..000000000000
--- a/include/asm-x86/mach-default/smpboot_hooks.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
2 * which needs to alter them. */
3
4static inline void smpboot_clear_io_apic_irqs(void)
5{
6#ifdef CONFIG_X86_IO_APIC
7 io_apic_irqs = 0;
8#endif
9}
10
11static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
12{
13 CMOS_WRITE(0xa, 0xf);
14 local_flush_tlb();
15 pr_debug("1.\n");
16 *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4;
17 pr_debug("2.\n");
18 *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf;
19 pr_debug("3.\n");
20}
21
22static inline void smpboot_restore_warm_reset_vector(void)
23{
24 /*
25 * Install writable page 0 entry to set BIOS data area.
26 */
27 local_flush_tlb();
28
29 /*
30 * Paranoid: Set warm reset code and vector here back
31 * to default values.
32 */
33 CMOS_WRITE(0, 0xf);
34
35 *((volatile long *) phys_to_virt(0x467)) = 0;
36}
37
38static inline void __init smpboot_setup_io_apic(void)
39{
40#ifdef CONFIG_X86_IO_APIC
41 /*
42 * Here we can be sure that there is an IO-APIC in the system. Let's
43 * go and set it up:
44 */
45 if (!skip_ioapic_setup && nr_ioapics)
46 setup_IO_APIC();
47 else {
48 nr_ioapics = 0;
49 localise_nmi_watchdog();
50 }
51#endif
52}
53
54static inline void smpboot_clear_io_apic(void)
55{
56#ifdef CONFIG_X86_IO_APIC
57 nr_ioapics = 0;
58#endif
59}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-15 05:26:32 -0500