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authorLinus Torvalds <torvalds@linux-foundation.org>2008-05-27 12:47:13 -0400
committerIngo Molnar <mingo@elte.hu>2008-06-02 06:29:31 -0400
commitc1f64a58003fd2efaa725a857e269a15f765791a (patch)
tree68a09bddb1c16fbcc748df41ddca4edb4442cb56 /include/asm-x86/io_64.h
parent1beee8dc8cf58e3f605bd7b34d7a39939be7d8d2 (diff)
x86: MMIO and gcc re-ordering issue
On Tue, 27 May 2008, Linus Torvalds wrote: > > Expecting people to fix up all drivers is simply not going to happen. And > serializing things shouldn't be *that* expensive. People who cannot take > the expense can continue to use the magic __raw_writel() etc stuff. Of course, for non-x86, you kind of have to expect drivers to be well-behaved, so non-x86 can probably avoid this simply because there are less relevant drivers involved. Here's a UNTESTED patch for x86 that may or may not compile and work, and which serializes (on a compiler level) the IO accesses against regular memory accesses. __read[bwlq]()/__write[bwlq]() are not serialized with a :"memory" barrier, although since they still use "asm volatile" I suspect that i practice they are probably serial too. Did not look very closely at any generated code (only did a trivial test to see that the code looks *roughly* correct). Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/io_64.h')
-rw-r--r--include/asm-x86/io_64.h71
1 files changed, 0 insertions, 71 deletions
diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h
index 0930bedf9e4d..ddd8058a5026 100644
--- a/include/asm-x86/io_64.h
+++ b/include/asm-x86/io_64.h
@@ -204,77 +204,6 @@ extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
204#define virt_to_bus virt_to_phys 204#define virt_to_bus virt_to_phys
205#define bus_to_virt phys_to_virt 205#define bus_to_virt phys_to_virt
206 206
207/*
208 * readX/writeX() are used to access memory mapped devices. On some
209 * architectures the memory mapped IO stuff needs to be accessed
210 * differently. On the x86 architecture, we just read/write the
211 * memory location directly.
212 */
213
214static inline __u8 __readb(const volatile void __iomem *addr)
215{
216 return *(__force volatile __u8 *)addr;
217}
218
219static inline __u16 __readw(const volatile void __iomem *addr)
220{
221 return *(__force volatile __u16 *)addr;
222}
223
224static __always_inline __u32 __readl(const volatile void __iomem *addr)
225{
226 return *(__force volatile __u32 *)addr;
227}
228
229static inline __u64 __readq(const volatile void __iomem *addr)
230{
231 return *(__force volatile __u64 *)addr;
232}
233
234#define readb(x) __readb(x)
235#define readw(x) __readw(x)
236#define readl(x) __readl(x)
237#define readq(x) __readq(x)
238#define readb_relaxed(a) readb(a)
239#define readw_relaxed(a) readw(a)
240#define readl_relaxed(a) readl(a)
241#define readq_relaxed(a) readq(a)
242#define __raw_readb readb
243#define __raw_readw readw
244#define __raw_readl readl
245#define __raw_readq readq
246
247#define mmiowb()
248
249static inline void __writel(__u32 b, volatile void __iomem *addr)
250{
251 *(__force volatile __u32 *)addr = b;
252}
253
254static inline void __writeq(__u64 b, volatile void __iomem *addr)
255{
256 *(__force volatile __u64 *)addr = b;
257}
258
259static inline void __writeb(__u8 b, volatile void __iomem *addr)
260{
261 *(__force volatile __u8 *)addr = b;
262}
263
264static inline void __writew(__u16 b, volatile void __iomem *addr)
265{
266 *(__force volatile __u16 *)addr = b;
267}
268
269#define writeq(val, addr) __writeq((val), (addr))
270#define writel(val, addr) __writel((val), (addr))
271#define writew(val, addr) __writew((val), (addr))
272#define writeb(val, addr) __writeb((val), (addr))
273#define __raw_writeb writeb
274#define __raw_writew writew
275#define __raw_writel writel
276#define __raw_writeq writeq
277
278void __memcpy_fromio(void *, unsigned long, unsigned); 207void __memcpy_fromio(void *, unsigned long, unsigned);
279void __memcpy_toio(unsigned long, const void *, unsigned); 208void __memcpy_toio(unsigned long, const void *, unsigned);
280 209