x86: align to clflush size

Do it instead of using the conservative approach we're currently
doing. This is the way x86_64 does, and this patch makes this piece
of code the same between them, ready to be integrated.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

1 files changed, 1 insertions, 1 deletions

diff --git a/include/asm-x86/dma-mapping_32.h b/include/asm-x86/dma-mapping_32.h
index fd7246dddad4..d0512c9251b7 100644
--- a/include/asm-x86/dma-mapping_32.h
+++ b/include/asm-x86/dma-mapping_32.h
@@ -21,7 +21,7 @@ dma_get_cache_alignment(void)
 {
         /* no easy way to get cache size on all x86, so return the
          * maximum possible, to be safe */
-        return (1 << INTERNODE_CACHE_SHIFT);
+        return boot_cpu_data.x86_clflush_size;
 }
 
 #define dma_is_consistent(d, h) (1)