diff options
author | Glauber de Oliveira Costa <gcosta@redhat.com> | 2008-01-30 07:31:14 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:31:14 -0500 |
commit | 54cd0eac7286b83ef1a657d2dddd74e0556209e7 (patch) | |
tree | aed1dfd42c1e66dff168387d9539e98dbe64c098 /include/asm-x86/desc_32.h | |
parent | cc6978528cbd475d952e0eb5073375839dfb600e (diff) |
x86: unify paravirt pieces of descriptor handling
With the types used to access descriptors in x86_64 and i386
now being the same, the code that effectively handles them can
now be easily shared. This patch moves the paravirt part of
desc_32.h into desc.h, and then, we get paravirt support in x86_64
for free.
Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/desc_32.h')
-rw-r--r-- | include/asm-x86/desc_32.h | 130 |
1 files changed, 0 insertions, 130 deletions
diff --git a/include/asm-x86/desc_32.h b/include/asm-x86/desc_32.h index 8450c2a99c3a..4bf20b7dd741 100644 --- a/include/asm-x86/desc_32.h +++ b/include/asm-x86/desc_32.h | |||
@@ -8,31 +8,10 @@ | |||
8 | #ifndef __ASSEMBLY__ | 8 | #ifndef __ASSEMBLY__ |
9 | 9 | ||
10 | #include <linux/preempt.h> | 10 | #include <linux/preempt.h> |
11 | #include <linux/smp.h> | ||
12 | #include <linux/percpu.h> | 11 | #include <linux/percpu.h> |
13 | 12 | ||
14 | struct gdt_page | ||
15 | { | ||
16 | struct desc_struct gdt[GDT_ENTRIES]; | ||
17 | } __attribute__((aligned(PAGE_SIZE))); | ||
18 | DECLARE_PER_CPU(struct gdt_page, gdt_page); | ||
19 | |||
20 | static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu) | ||
21 | { | ||
22 | return per_cpu(gdt_page, cpu).gdt; | ||
23 | } | ||
24 | |||
25 | extern void set_intr_gate(unsigned int irq, void * addr); | 13 | extern void set_intr_gate(unsigned int irq, void * addr); |
26 | 14 | ||
27 | static inline void pack_descriptor(struct desc_struct *desc, | ||
28 | unsigned long base, unsigned long limit, unsigned char type, unsigned char flags) | ||
29 | { | ||
30 | desc->a = ((base & 0xffff) << 16) | (limit & 0xffff); | ||
31 | desc->b = (base & 0xff000000) | ((base & 0xff0000) >> 16) | | ||
32 | (limit & 0x000f0000) | ((type & 0xff) << 8) | ((flags & 0xf) << 20); | ||
33 | desc->p = 1; | ||
34 | } | ||
35 | |||
36 | static inline void pack_gate(gate_desc *gate, | 15 | static inline void pack_gate(gate_desc *gate, |
37 | unsigned long base, unsigned short seg, unsigned char type, unsigned char flags) | 16 | unsigned long base, unsigned short seg, unsigned char type, unsigned char flags) |
38 | { | 17 | { |
@@ -40,115 +19,6 @@ static inline void pack_gate(gate_desc *gate, | |||
40 | gate->b = (base & 0xffff0000) | ((type & 0xff) << 8) | (flags & 0xff); | 19 | gate->b = (base & 0xffff0000) | ((type & 0xff) << 8) | (flags & 0xff); |
41 | } | 20 | } |
42 | 21 | ||
43 | #ifdef CONFIG_PARAVIRT | ||
44 | #include <asm/paravirt.h> | ||
45 | #else | ||
46 | #define load_TR_desc() native_load_tr_desc() | ||
47 | #define load_gdt(dtr) native_load_gdt(dtr) | ||
48 | #define load_idt(dtr) native_load_idt(dtr) | ||
49 | #define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr)) | ||
50 | #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt)) | ||
51 | |||
52 | #define store_gdt(dtr) native_store_gdt(dtr) | ||
53 | #define store_idt(dtr) native_store_idt(dtr) | ||
54 | #define store_tr(tr) (tr = native_store_tr()) | ||
55 | #define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt)) | ||
56 | |||
57 | #define load_TLS(t, cpu) native_load_tls(t, cpu) | ||
58 | #define set_ldt native_set_ldt | ||
59 | |||
60 | #define write_ldt_entry(dt, entry, desc) \ | ||
61 | native_write_ldt_entry(dt, entry, desc) | ||
62 | #define write_gdt_entry(dt, entry, desc, type) \ | ||
63 | native_write_gdt_entry(dt, entry, desc, type) | ||
64 | #define write_idt_entry(dt, entry, g) native_write_idt_entry(dt, entry, g) | ||
65 | #endif | ||
66 | |||
67 | static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry, | ||
68 | const void *desc) | ||
69 | { | ||
70 | memcpy(&ldt[entry], desc, sizeof(struct desc_struct)); | ||
71 | } | ||
72 | |||
73 | static inline void native_write_idt_entry(gate_desc *idt, int entry, | ||
74 | const gate_desc *gate) | ||
75 | { | ||
76 | memcpy(&idt[entry], gate, sizeof(*gate)); | ||
77 | } | ||
78 | |||
79 | static inline void native_write_gdt_entry(struct desc_struct *gdt, int entry, | ||
80 | const void *desc, int type) | ||
81 | { | ||
82 | memcpy(&gdt[entry], desc, sizeof(struct desc_struct)); | ||
83 | } | ||
84 | |||
85 | static inline void write_dt_entry(struct desc_struct *dt, | ||
86 | int entry, u32 entry_low, u32 entry_high) | ||
87 | { | ||
88 | dt[entry].a = entry_low; | ||
89 | dt[entry].b = entry_high; | ||
90 | } | ||
91 | |||
92 | |||
93 | static inline void native_set_ldt(const void *addr, unsigned int entries) | ||
94 | { | ||
95 | if (likely(entries == 0)) | ||
96 | __asm__ __volatile__("lldt %w0"::"q" (0)); | ||
97 | else { | ||
98 | unsigned cpu = smp_processor_id(); | ||
99 | ldt_desc ldt; | ||
100 | |||
101 | pack_descriptor(&ldt, (unsigned long)addr, | ||
102 | entries * sizeof(struct desc_struct) - 1, | ||
103 | DESC_LDT, 0); | ||
104 | write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, | ||
105 | &ldt, DESC_LDT); | ||
106 | __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)); | ||
107 | } | ||
108 | } | ||
109 | |||
110 | |||
111 | static inline void native_load_tr_desc(void) | ||
112 | { | ||
113 | asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8)); | ||
114 | } | ||
115 | |||
116 | static inline void native_load_gdt(const struct desc_ptr *dtr) | ||
117 | { | ||
118 | asm volatile("lgdt %0"::"m" (*dtr)); | ||
119 | } | ||
120 | |||
121 | static inline void native_load_idt(const struct desc_ptr *dtr) | ||
122 | { | ||
123 | asm volatile("lidt %0"::"m" (*dtr)); | ||
124 | } | ||
125 | |||
126 | static inline void native_store_gdt(struct desc_ptr *dtr) | ||
127 | { | ||
128 | asm ("sgdt %0":"=m" (*dtr)); | ||
129 | } | ||
130 | |||
131 | static inline void native_store_idt(struct desc_ptr *dtr) | ||
132 | { | ||
133 | asm ("sidt %0":"=m" (*dtr)); | ||
134 | } | ||
135 | |||
136 | static inline unsigned long native_store_tr(void) | ||
137 | { | ||
138 | unsigned long tr; | ||
139 | asm ("str %0":"=r" (tr)); | ||
140 | return tr; | ||
141 | } | ||
142 | |||
143 | static inline void native_load_tls(struct thread_struct *t, unsigned int cpu) | ||
144 | { | ||
145 | unsigned int i; | ||
146 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | ||
147 | |||
148 | for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++) | ||
149 | gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]; | ||
150 | } | ||
151 | |||
152 | static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg) | 22 | static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg) |
153 | { | 23 | { |
154 | gate_desc g; | 24 | gate_desc g; |