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author | Suresh Siddha <suresh.b.siddha@intel.com> | 2008-07-10 14:16:50 -0400 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-12 02:45:00 -0400 |
commit | 32e1d0a0651004f5fe47f85a2a5c725ad579a90c (patch) | |
tree | 370e2673d24d52e1339b74097cbe14463cb12898 /include/asm-x86/cpufeature.h | |
parent | 1b374e4d6f8b3eb2fcd034fcc24ea8ba1dfde7aa (diff) |
x64, x2apic/intr-remap: cpuid bits for x2apic feature
cpuid feature for x2apic.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: akpm@linux-foundation.org
Cc: arjan@linux.intel.com
Cc: andi@firstfloor.org
Cc: ebiederm@xmission.com
Cc: jbarnes@virtuousgeek.org
Cc: steiner@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/cpufeature.h')
-rw-r--r-- | include/asm-x86/cpufeature.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h index 75ef959db329..5be9510ee012 100644 --- a/include/asm-x86/cpufeature.h +++ b/include/asm-x86/cpufeature.h | |||
@@ -90,6 +90,7 @@ | |||
90 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ | 90 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ |
91 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ | 91 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ |
92 | #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */ | 92 | #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */ |
93 | #define X86_FEATURE_X2APIC (4*32+21) /* x2APIC */ | ||
93 | 94 | ||
94 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ | 95 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ |
95 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ | 96 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ |
@@ -188,6 +189,7 @@ extern const char * const x86_power_flags[32]; | |||
188 | #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) | 189 | #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) |
189 | #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) | 190 | #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) |
190 | #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) | 191 | #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) |
192 | #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) | ||
191 | 193 | ||
192 | #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) | 194 | #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) |
193 | # define cpu_has_invlpg 1 | 195 | # define cpu_has_invlpg 1 |