diff options
author | Austin Zhang <austin_zhang@linux.intel.com> | 2008-08-25 11:14:51 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-08-25 11:28:16 -0400 |
commit | 2a61812af2e564cba2c8170cf96e1c823210f619 (patch) | |
tree | 7d8656e0d7b673ac0550c231d510b11a6e4441f8 /include/asm-x86/cpufeature.h | |
parent | 52a8968ce95da8469ba0a9b3e4010fe31caf77a3 (diff) |
x86: add X86_FEATURE_XMM4_2 definitions
Added Intel processor SSE4.2 feature flag.
No in-tree user at the moment, but makes the tree-merging life easier
for the crypto tree.
Signed-off-by: Austin Zhang <austin.zhang@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/cpufeature.h')
-rw-r--r-- | include/asm-x86/cpufeature.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h index 2f5a792b0acc..762f6a6bc707 100644 --- a/include/asm-x86/cpufeature.h +++ b/include/asm-x86/cpufeature.h | |||
@@ -91,6 +91,7 @@ | |||
91 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ | 91 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ |
92 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ | 92 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ |
93 | #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */ | 93 | #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */ |
94 | #define X86_FEATURE_XMM4_2 (4*32+20) /* Streaming SIMD Extensions-4.2 */ | ||
94 | 95 | ||
95 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ | 96 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ |
96 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ | 97 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ |
@@ -189,6 +190,7 @@ extern const char * const x86_power_flags[32]; | |||
189 | #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) | 190 | #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) |
190 | #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) | 191 | #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) |
191 | #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) | 192 | #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) |
193 | #define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2) | ||
192 | 194 | ||
193 | #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) | 195 | #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) |
194 | # define cpu_has_invlpg 1 | 196 | # define cpu_has_invlpg 1 |