diff options
author | Joe Perches <joe@perches.com> | 2008-03-23 04:01:45 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-04-17 11:41:22 -0400 |
commit | 286275c90f148562b973b1e1f39f9689e6676dc4 (patch) | |
tree | 5d9800fba92a22095dfaebbb794346546e39ebaa /include/asm-x86/bitops.h | |
parent | 49f74946f008add0b22723244976a32b365de06f (diff) |
include/asm-x86/bitops.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/bitops.h')
-rw-r--r-- | include/asm-x86/bitops.h | 37 |
1 files changed, 13 insertions, 24 deletions
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h index 7a76555b676a..1ae7b270a1ef 100644 --- a/include/asm-x86/bitops.h +++ b/include/asm-x86/bitops.h | |||
@@ -23,13 +23,13 @@ | |||
23 | #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) | 23 | #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) |
24 | /* Technically wrong, but this avoids compilation errors on some gcc | 24 | /* Technically wrong, but this avoids compilation errors on some gcc |
25 | versions. */ | 25 | versions. */ |
26 | #define ADDR "=m" (*(volatile long *) addr) | 26 | #define ADDR "=m" (*(volatile long *)addr) |
27 | #define BIT_ADDR "=m" (((volatile int *) addr)[nr >> 5]) | 27 | #define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5]) |
28 | #else | 28 | #else |
29 | #define ADDR "+m" (*(volatile long *) addr) | 29 | #define ADDR "+m" (*(volatile long *) addr) |
30 | #define BIT_ADDR "+m" (((volatile int *) addr)[nr >> 5]) | 30 | #define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5]) |
31 | #endif | 31 | #endif |
32 | #define BASE_ADDR "m" (*(volatile int *) addr) | 32 | #define BASE_ADDR "m" (*(volatile int *)addr) |
33 | 33 | ||
34 | /** | 34 | /** |
35 | * set_bit - Atomically set a bit in memory | 35 | * set_bit - Atomically set a bit in memory |
@@ -48,9 +48,7 @@ | |||
48 | */ | 48 | */ |
49 | static inline void set_bit(int nr, volatile void *addr) | 49 | static inline void set_bit(int nr, volatile void *addr) |
50 | { | 50 | { |
51 | asm volatile(LOCK_PREFIX "bts %1,%0" | 51 | asm volatile(LOCK_PREFIX "bts %1,%0" : ADDR : "Ir" (nr) : "memory"); |
52 | : ADDR | ||
53 | : "Ir" (nr) : "memory"); | ||
54 | } | 52 | } |
55 | 53 | ||
56 | /** | 54 | /** |
@@ -82,8 +80,7 @@ static inline void __set_bit(int nr, volatile void *addr) | |||
82 | */ | 80 | */ |
83 | static inline void clear_bit(int nr, volatile void *addr) | 81 | static inline void clear_bit(int nr, volatile void *addr) |
84 | { | 82 | { |
85 | asm volatile(LOCK_PREFIX "btr %1,%2" | 83 | asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); |
86 | : BIT_ADDR : "Ir" (nr), BASE_ADDR); | ||
87 | } | 84 | } |
88 | 85 | ||
89 | /* | 86 | /* |
@@ -151,8 +148,7 @@ static inline void __change_bit(int nr, volatile void *addr) | |||
151 | */ | 148 | */ |
152 | static inline void change_bit(int nr, volatile void *addr) | 149 | static inline void change_bit(int nr, volatile void *addr) |
153 | { | 150 | { |
154 | asm volatile(LOCK_PREFIX "btc %1,%2" | 151 | asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); |
155 | : BIT_ADDR : "Ir" (nr), BASE_ADDR); | ||
156 | } | 152 | } |
157 | 153 | ||
158 | /** | 154 | /** |
@@ -168,9 +164,7 @@ static inline int test_and_set_bit(int nr, volatile void *addr) | |||
168 | int oldbit; | 164 | int oldbit; |
169 | 165 | ||
170 | asm volatile(LOCK_PREFIX "bts %2,%1\n\t" | 166 | asm volatile(LOCK_PREFIX "bts %2,%1\n\t" |
171 | "sbb %0,%0" | 167 | "sbb %0,%0" : "=r" (oldbit), ADDR : "Ir" (nr) : "memory"); |
172 | : "=r" (oldbit), ADDR | ||
173 | : "Ir" (nr) : "memory"); | ||
174 | 168 | ||
175 | return oldbit; | 169 | return oldbit; |
176 | } | 170 | } |
@@ -202,8 +196,7 @@ static inline int __test_and_set_bit(int nr, volatile void *addr) | |||
202 | 196 | ||
203 | asm volatile("bts %2,%3\n\t" | 197 | asm volatile("bts %2,%3\n\t" |
204 | "sbb %0,%0" | 198 | "sbb %0,%0" |
205 | : "=r" (oldbit), BIT_ADDR | 199 | : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); |
206 | : "Ir" (nr), BASE_ADDR); | ||
207 | return oldbit; | 200 | return oldbit; |
208 | } | 201 | } |
209 | 202 | ||
@@ -221,8 +214,7 @@ static inline int test_and_clear_bit(int nr, volatile void *addr) | |||
221 | 214 | ||
222 | asm volatile(LOCK_PREFIX "btr %2,%1\n\t" | 215 | asm volatile(LOCK_PREFIX "btr %2,%1\n\t" |
223 | "sbb %0,%0" | 216 | "sbb %0,%0" |
224 | : "=r" (oldbit), ADDR | 217 | : "=r" (oldbit), ADDR : "Ir" (nr) : "memory"); |
225 | : "Ir" (nr) : "memory"); | ||
226 | 218 | ||
227 | return oldbit; | 219 | return oldbit; |
228 | } | 220 | } |
@@ -242,8 +234,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr) | |||
242 | 234 | ||
243 | asm volatile("btr %2,%3\n\t" | 235 | asm volatile("btr %2,%3\n\t" |
244 | "sbb %0,%0" | 236 | "sbb %0,%0" |
245 | : "=r" (oldbit), BIT_ADDR | 237 | : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); |
246 | : "Ir" (nr), BASE_ADDR); | ||
247 | return oldbit; | 238 | return oldbit; |
248 | } | 239 | } |
249 | 240 | ||
@@ -254,8 +245,7 @@ static inline int __test_and_change_bit(int nr, volatile void *addr) | |||
254 | 245 | ||
255 | asm volatile("btc %2,%3\n\t" | 246 | asm volatile("btc %2,%3\n\t" |
256 | "sbb %0,%0" | 247 | "sbb %0,%0" |
257 | : "=r" (oldbit), BIT_ADDR | 248 | : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); |
258 | : "Ir" (nr), BASE_ADDR); | ||
259 | 249 | ||
260 | return oldbit; | 250 | return oldbit; |
261 | } | 251 | } |
@@ -274,8 +264,7 @@ static inline int test_and_change_bit(int nr, volatile void *addr) | |||
274 | 264 | ||
275 | asm volatile(LOCK_PREFIX "btc %2,%1\n\t" | 265 | asm volatile(LOCK_PREFIX "btc %2,%1\n\t" |
276 | "sbb %0,%0" | 266 | "sbb %0,%0" |
277 | : "=r" (oldbit), ADDR | 267 | : "=r" (oldbit), ADDR : "Ir" (nr) : "memory"); |
278 | : "Ir" (nr) : "memory"); | ||
279 | 268 | ||
280 | return oldbit; | 269 | return oldbit; |
281 | } | 270 | } |