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authorSuresh Siddha <suresh.b.siddha@intel.com>2008-07-10 14:16:58 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-12 02:45:06 -0400
commit6e1cb38a2aef7680975e71f23de187859ee8b158 (patch)
tree4044df869c6314dcdac700f3fdd3cc256cc9d3a7 /include/asm-x86/apic.h
parent75c46fa61bc5b4ccd20a168ff325c58771248fcd (diff)
x64, x2apic/intr-remap: add x2apic support, including enabling interrupt-remapping
x2apic support. Interrupt-remapping must be enabled before enabling x2apic, this is needed to ensure that IO interrupts continue to work properly after the cpu mode is changed to x2apic(which uses 32bit extended physical/cluster apic id). On systems where apicid's are > 255, BIOS can handover the control to OS in x2apic mode. Or if the OS handover was in legacy xapic mode, check if it is capable of x2apic mode. And if we succeed in enabling Interrupt-remapping, then we can enable x2apic mode in the CPU. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/apic.h')
-rw-r--r--include/asm-x86/apic.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index aa746704a5c9..129752dd2525 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -100,6 +100,11 @@ extern void apic_wait_icr_idle(void);
100extern u32 safe_apic_wait_icr_idle(void); 100extern u32 safe_apic_wait_icr_idle(void);
101extern void apic_icr_write(u32 low, u32 id); 101extern void apic_icr_write(u32 low, u32 id);
102#else 102#else
103extern int x2apic, x2apic_preenabled;
104extern void check_x2apic(void);
105extern void enable_x2apic(void);
106extern void enable_IR_x2apic(void);
107extern void x2apic_icr_write(u32 low, u32 id);
103 108
104struct apic_ops { 109struct apic_ops {
105 u32 (*read)(u32 reg); 110 u32 (*read)(u32 reg);