Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

113 files changed, 7988 insertions, 0 deletions

diff --git a/include/asm-v850/a.out.h b/include/asm-v850/a.out.h
new file mode 100644
index 000000000000..e9439a0708f6
--- /dev/null
+++ b/include/asm-v850/a.out.h
@@ -0,0 +1,21 @@
+#ifndef __V850_A_OUT_H__
+#define __V850_A_OUT_H__
+
+struct exec
+{
+  unsigned long a_info;         /* Use macros N_MAGIC, etc for access */
+  unsigned a_text;              /* length of text, in bytes */
+  unsigned a_data;              /* length of data, in bytes */
+  unsigned a_bss;               /* length of uninitialized data area for file, in bytes */
+  unsigned a_syms;              /* length of symbol table data in file, in bytes */
+  unsigned a_entry;             /* start address */
+  unsigned a_trsize;            /* length of relocation info for text, in bytes */
+  unsigned a_drsize;            /* length of relocation info for data, in bytes */
+};
+
+#define N_TRSIZE(a)     ((a).a_trsize)
+#define N_DRSIZE(a)     ((a).a_drsize)
+#define N_SYMSIZE(a)    ((a).a_syms)
+
+
+#endif /* __V850_A_OUT_H__ */
diff --git a/include/asm-v850/anna.h b/include/asm-v850/anna.h
new file mode 100644
index 000000000000..3be77d5ecfce
--- /dev/null
+++ b/include/asm-v850/anna.h
@@ -0,0 +1,143 @@
+/*
+ * include/asm-v850/anna.h -- Anna V850E2 evaluation cpu chip/board
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_ANNA_H__
+#define __V850_ANNA_H__
+
+#include <asm/v850e2.h>         /* Based on V850E2 core.  */
+
+
+#define CPU_MODEL       "v850e2/anna"
+#define CPU_MODEL_LONG  "NEC V850E2/Anna"
+#define PLATFORM        "anna"
+#define PLATFORM_LONG   "NEC/Midas lab V850E2/Anna evaluation board"
+
+#define CPU_CLOCK_FREQ  200000000 /*  200MHz */
+#define SYS_CLOCK_FREQ   33300000 /* 33.3MHz */
+
+
+/* 1MB of static RAM.  This memory is mirrored 64 times.  */
+#define SRAM_ADDR       0x04000000
+#define SRAM_SIZE       0x00100000 /* 1MB */
+/* 64MB of DRAM.  */
+#define SDRAM_ADDR      0x08000000      
+#define SDRAM_SIZE      0x04000000 /* 64MB */
+
+
+/* For <asm/page.h> */
+#define PAGE_OFFSET     SRAM_ADDR
+
+/* We use on-chip RAM, for a few miscellaneous variables that must be
+   accessible using a load instruction relative to R0.  The Anna chip has
+   128K of `dLB' ram nominally located at 0xFFF00000, but it's mirrored
+   every 128K, so we can use the `last mirror' (except for the portion at
+   the top which is overridden by I/O space).  In addition, the early
+   sample chip we're using has lots of memory errors in the dLB ram, so we
+   use a specially chosen location that has at least 20 bytes of contiguous
+   valid memory (xxxF0020 - xxxF003F).  */
+#define R0_RAM_ADDR                     0xFFFF8020
+
+
+/* Anna specific control registers.  */
+#define ANNA_ILBEN_ADDR                 0xFFFFF7F2
+#define ANNA_ILBEN                      (*(volatile u16 *)ANNA_ILBEN_ADDR)
+
+
+/* I/O port P0-P3. */
+/* Direct I/O.  Bits 0-7 are pins Pn0-Pn7.  */
+#define ANNA_PORT_IO_ADDR(n)            (0xFFFFF400 + (n) * 2)
+#define ANNA_PORT_IO(n)                 (*(volatile u8 *)ANNA_PORT_IO_ADDR(n))
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define ANNA_PORT_PM_ADDR(n)            (0xFFFFF410 + (n) * 2)
+#define ANNA_PORT_PM(n)                 (*(volatile u8 *)ANNA_PORT_PM_ADDR(n))
+
+
+/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).  */
+#define IRQ_INTP(n)     (n)     /* Pnnn (pin) interrupts 0-15 */
+#define IRQ_INTP_NUM    16
+#define IRQ_INTOV(n)    (0x10 + (n)) /* 0-2 */
+#define IRQ_INTOV_NUM   2
+#define IRQ_INTCCC(n)   (0x12 + (n))
+#define IRQ_INTCCC_NUM  4
+#define IRQ_INTCMD(n)   (0x16 + (n)) /* interval timer interrupts 0-5 */
+#define IRQ_INTCMD_NUM  6
+#define IRQ_INTDMA(n)   (0x1C + (n)) /* DMA interrupts 0-3 */
+#define IRQ_INTDMA_NUM  4
+#define IRQ_INTDMXER    0x20
+#define IRQ_INTSRE(n)   (0x21 + (n)*3) /* UART 0-1 reception error */
+#define IRQ_INTSRE_NUM  2
+#define IRQ_INTSR(n)    (0x22 + (n)*3) /* UART 0-1 reception completion */
+#define IRQ_INTSR_NUM   2
+#define IRQ_INTST(n)    (0x23 + (n)*3) /* UART 0-1 transmission completion */
+#define IRQ_INTST_NUM   2
+
+#define NUM_CPU_IRQS    64
+
+#ifndef __ASSEMBLY__
+/* Initialize chip interrupts.  */
+extern void anna_init_irqs (void);
+#endif
+
+
+/* Anna UART details (basically the same as the V850E/MA1, but 2 channels).  */
+#define V850E_UART_NUM_CHANNELS         2
+#define V850E_UART_BASE_FREQ            (SYS_CLOCK_FREQ / 2)
+#define V850E_UART_CHIP_NAME            "V850E2/NA85E2A"
+
+/* This is the UART channel that's actually connected on the board.  */
+#define V850E_UART_CONSOLE_CHANNEL      1
+
+/* This is a function that gets called before configuring the UART.  */
+#define V850E_UART_PRE_CONFIGURE        anna_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void anna_uart_pre_configure (unsigned chan,
+                                     unsigned cflags, unsigned baud);
+#endif
+
+/* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */
+
+/* CTS for UART channel 1 is pin P37 (bit 7 of port 3).  */
+#define V850E_UART_CTS(chan)    ((chan) == 1 ? !(ANNA_PORT_IO(3) & 0x80) : 1)
+/* RTS for UART channel 1 is pin P07 (bit 7 of port 0).  */
+#define V850E_UART_SET_RTS(chan, val)                                         \
+   do {                                                                       \
+           if (chan == 1) {                                                   \
+                   unsigned old = ANNA_PORT_IO(0);                            \
+                   if (val)                                                   \
+                           ANNA_PORT_IO(0) = old & ~0x80;                     \
+                   else                                                       \
+                           ANNA_PORT_IO(0) = old | 0x80;                      \
+           }                                                                  \
+   } while (0)
+
+
+/* Timer C details.  */
+#define V850E_TIMER_C_BASE_ADDR         0xFFFFF600
+
+/* Timer D details (the Anna actually has 5 of these; should change later). */
+#define V850E_TIMER_D_BASE_ADDR         0xFFFFF540
+#define V850E_TIMER_D_TMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x0)
+#define V850E_TIMER_D_CMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x2)
+#define V850E_TIMER_D_TMCD_BASE_ADDR    (V850E_TIMER_D_BASE_ADDR + 0x4)
+
+#define V850E_TIMER_D_BASE_FREQ         SYS_CLOCK_FREQ
+#define V850E_TIMER_D_TMCD_CS_MIN       1 /* min 2^1 divider */
+
+
+/* For <asm/param.h> */
+#ifndef HZ
+#define HZ      100
+#endif
+
+
+#endif /* __V850_ANNA_H__ */
diff --git a/include/asm-v850/as85ep1.h b/include/asm-v850/as85ep1.h
new file mode 100644
index 000000000000..659bc910ffd7
--- /dev/null
+++ b/include/asm-v850/as85ep1.h
@@ -0,0 +1,158 @@
+/*
+ * include/asm-v850/as85ep1.h -- AS85EP1 evaluation CPU chip/board
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_AS85EP1_H__
+#define __V850_AS85EP1_H__
+
+#include <asm/v850e.h>
+
+
+#define CPU_MODEL       "as85ep1"
+#define CPU_MODEL_LONG  "NEC V850E/AS85EP1"
+#define PLATFORM        "AS85EP1"
+#define PLATFORM_LONG   "NEC V850E/AS85EP1 evaluation board"
+
+#define CPU_CLOCK_FREQ  96000000 /*  96MHz */
+#define SYS_CLOCK_FREQ  CPU_CLOCK_FREQ
+
+
+/* 1MB of static RAM.  */
+#define SRAM_ADDR       0x00400000
+#define SRAM_SIZE       0x00100000 /* 1MB */
+/* About 58MB of DRAM.  This can actually be at one of two positions,
+   determined by jump JP3; we have to use the first position because the
+   second is partially out of processor instruction addressing range
+   (though in the second position there's actually 64MB available).  */
+#define SDRAM_ADDR      0x00600000
+#define SDRAM_SIZE      0x039F8000 /* approx 58MB */
+
+/* For <asm/page.h> */
+#define PAGE_OFFSET     SRAM_ADDR
+
+/* We use on-chip RAM, for a few miscellaneous variables that must be
+   accessible using a load instruction relative to R0.  The AS85EP1 chip
+   16K of internal RAM located slightly before I/O space.  */
+#define R0_RAM_ADDR     0xFFFF8000
+
+
+/* AS85EP1 specific control registers.  */
+#define AS85EP1_CSC_ADDR(n)     (0xFFFFF060 + (n) * 2)
+#define AS85EP1_CSC(n)          (*(volatile u16 *)AS85EP1_CSC_ADDR(n))
+#define AS85EP1_BSC_ADDR        0xFFFFF066
+#define AS85EP1_BSC             (*(volatile u16 *)AS85EP1_BSC_ADDR)
+#define AS85EP1_BCT_ADDR(n)     (0xFFFFF480 + (n) * 2)
+#define AS85EP1_BCT(n)          (*(volatile u16 *)AS85EP1_BCT_ADDR(n))
+#define AS85EP1_DWC_ADDR(n)     (0xFFFFF484 + (n) * 2)
+#define AS85EP1_DWC(n)          (*(volatile u16 *)AS85EP1_DWC_ADDR(n))
+#define AS85EP1_BCC_ADDR        0xFFFFF488
+#define AS85EP1_BCC             (*(volatile u16 *)AS85EP1_BCC_ADDR)
+#define AS85EP1_ASC_ADDR        0xFFFFF48A
+#define AS85EP1_ASC             (*(volatile u16 *)AS85EP1_ASC_ADDR)
+#define AS85EP1_BCP_ADDR        0xFFFFF48C
+#define AS85EP1_BCP             (*(volatile u16 *)AS85EP1_BCP_ADDR)
+#define AS85EP1_LBS_ADDR        0xFFFFF48E
+#define AS85EP1_LBS             (*(volatile u16 *)AS85EP1_LBS_ADDR)
+#define AS85EP1_BMC_ADDR        0xFFFFF498
+#define AS85EP1_BMC             (*(volatile u16 *)AS85EP1_BMC_ADDR)
+#define AS85EP1_PRC_ADDR        0xFFFFF49A
+#define AS85EP1_PRC             (*(volatile u16 *)AS85EP1_PRC_ADDR)
+#define AS85EP1_SCR_ADDR(n)     (0xFFFFF4A0 + (n) * 4)
+#define AS85EP1_SCR(n)          (*(volatile u16 *)AS85EP1_SCR_ADDR(n))
+#define AS85EP1_RFS_ADDR(n)     (0xFFFFF4A2 + (n) * 4)
+#define AS85EP1_RFS(n)          (*(volatile u16 *)AS85EP1_RFS_ADDR(n))
+#define AS85EP1_IRAMM_ADDR      0xFFFFF80A
+#define AS85EP1_IRAMM           (*(volatile u8 *)AS85EP1_IRAMM_ADDR)
+
+
+
+/* I/O port P0-P13. */
+/* Direct I/O.  Bits 0-7 are pins Pn0-Pn7.  */
+#define AS85EP1_PORT_IO_ADDR(n) (0xFFFFF400 + (n) * 2)
+#define AS85EP1_PORT_IO(n)      (*(volatile u8 *)AS85EP1_PORT_IO_ADDR(n))
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define AS85EP1_PORT_PM_ADDR(n) (0xFFFFF420 + (n) * 2)
+#define AS85EP1_PORT_PM(n)      (*(volatile u8 *)AS85EP1_PORT_PM_ADDR(n))
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define AS85EP1_PORT_PMC_ADDR(n) (0xFFFFF440 + (n) * 2)
+#define AS85EP1_PORT_PMC(n)     (*(volatile u8 *)AS85EP1_PORT_PMC_ADDR(n))
+
+
+/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).  */
+#define IRQ_INTCCC(n)   (0x0C + (n))
+#define IRQ_INTCCC_NUM  8
+#define IRQ_INTCMD(n)   (0x14 + (n)) /* interval timer interrupts 0-5 */
+#define IRQ_INTCMD_NUM  6
+#define IRQ_INTSRE(n)   (0x1E + (n)*3) /* UART 0-1 reception error */
+#define IRQ_INTSRE_NUM  2
+#define IRQ_INTSR(n)    (0x1F + (n)*3) /* UART 0-1 reception completion */
+#define IRQ_INTSR_NUM   2
+#define IRQ_INTST(n)    (0x20 + (n)*3) /* UART 0-1 transmission completion */
+#define IRQ_INTST_NUM   2
+
+#define NUM_CPU_IRQS    64
+
+#ifndef __ASSEMBLY__
+/* Initialize chip interrupts.  */
+extern void as85ep1_init_irqs (void);
+#endif
+
+
+/* AS85EP1 UART details (basically the same as the V850E/MA1, but 2 channels).  */
+#define V850E_UART_NUM_CHANNELS         2
+#define V850E_UART_BASE_FREQ            (SYS_CLOCK_FREQ / 4)
+#define V850E_UART_CHIP_NAME            "V850E/NA85E"
+
+/* This is a function that gets called before configuring the UART.  */
+#define V850E_UART_PRE_CONFIGURE        as85ep1_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void as85ep1_uart_pre_configure (unsigned chan,
+                                        unsigned cflags, unsigned baud);
+#endif
+
+/* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */
+
+/* CTS for UART channel 1 is pin P54 (bit 4 of port 5).  */
+#define V850E_UART_CTS(chan)   ((chan) == 1 ? !(AS85EP1_PORT_IO(5) & 0x10) : 1)
+/* RTS for UART channel 1 is pin P53 (bit 3 of port 5).  */
+#define V850E_UART_SET_RTS(chan, val)                                         \
+   do {                                                                       \
+           if (chan == 1) {                                                   \
+                   unsigned old = AS85EP1_PORT_IO(5);                         \
+                   if (val)                                                   \
+                           AS85EP1_PORT_IO(5) = old & ~0x8;                   \
+                   else                                                       \
+                           AS85EP1_PORT_IO(5) = old | 0x8;                    \
+           }                                                                  \
+   } while (0)
+
+
+/* Timer C details.  */
+#define V850E_TIMER_C_BASE_ADDR         0xFFFFF600
+
+/* Timer D details (the AS85EP1 actually has 5 of these; should change later). */
+#define V850E_TIMER_D_BASE_ADDR         0xFFFFF540
+#define V850E_TIMER_D_TMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x0)
+#define V850E_TIMER_D_CMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x2)
+#define V850E_TIMER_D_TMCD_BASE_ADDR    (V850E_TIMER_D_BASE_ADDR + 0x4)
+
+#define V850E_TIMER_D_BASE_FREQ         SYS_CLOCK_FREQ
+#define V850E_TIMER_D_TMCD_CS_MIN       2 /* min 2^2 divider */
+
+
+/* For <asm/param.h> */
+#ifndef HZ
+#define HZ      100
+#endif
+
+
+#endif /* __V850_AS85EP1_H__ */
diff --git a/include/asm-v850/asm.h b/include/asm-v850/asm.h
new file mode 100644
index 000000000000..bf1e785a5dde
--- /dev/null
+++ b/include/asm-v850/asm.h
@@ -0,0 +1,32 @@
+/*
+ * include/asm-v850/asm.h -- Macros for writing assembly code
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#define G_ENTRY(name)                                                         \
+   .balign 4;                                                                 \
+   .globl name;                                                               \
+   .type  name,@function;                                                     \
+   name
+#define G_DATA(name)                                                          \
+   .globl name;                                                               \
+   .type  name,@object;                                                       \
+   name
+#define END(name)                                                             \
+   .size  name,.-name
+
+#define L_ENTRY(name)                                                         \
+   .balign 4;                                                                 \
+   .type  name,@function;                                                     \
+   name
+#define L_DATA(name)                                                          \
+   .type  name,@object;                                                       \
+   name
diff --git a/include/asm-v850/atomic.h b/include/asm-v850/atomic.h
new file mode 100644
index 000000000000..8284aa7363f2
--- /dev/null
+++ b/include/asm-v850/atomic.h
@@ -0,0 +1,99 @@
+/*
+ * include/asm-v850/atomic.h -- Atomic operations
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_ATOMIC_H__
+#define __V850_ATOMIC_H__
+
+#include <linux/config.h>
+
+#include <asm/system.h>
+
+#ifdef CONFIG_SMP
+#error SMP not supported
+#endif
+
+typedef struct { int counter; } atomic_t;
+
+#define ATOMIC_INIT(i)  { (i) }
+
+#ifdef __KERNEL__
+
+#define atomic_read(v)          ((v)->counter)
+#define atomic_set(v,i)         (((v)->counter) = (i))
+
+extern __inline__ int atomic_add_return (int i, volatile atomic_t *v)
+{
+        unsigned long flags;
+        int res;
+
+        local_irq_save (flags);
+        res = v->counter + i;
+        v->counter = res;
+        local_irq_restore (flags);
+
+        return res;
+}
+
+static __inline__ int atomic_sub_return (int i, volatile atomic_t *v)
+{
+        unsigned long flags;
+        int res;
+
+        local_irq_save (flags);
+        res = v->counter - i;
+        v->counter = res;
+        local_irq_restore (flags);
+
+        return res;
+}
+
+static __inline__ void atomic_clear_mask (unsigned long mask, unsigned long *addr)
+{
+        unsigned long flags;
+
+        local_irq_save (flags);
+        *addr &= ~mask;
+        local_irq_restore (flags);
+}
+
+#endif
+
+#define atomic_add(i, v)        atomic_add_return ((i), (v))
+#define atomic_sub(i, v)        atomic_sub_return ((i), (v))
+
+#define atomic_dec_return(v)    atomic_sub_return (1, (v))
+#define atomic_inc_return(v)    atomic_add_return (1, (v))
+#define atomic_inc(v)           atomic_inc_return (v)
+#define atomic_dec(v)           atomic_dec_return (v)
+
+/*
+ * atomic_inc_and_test - increment and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
+
+#define atomic_sub_and_test(i,v)        (atomic_sub_return ((i), (v)) == 0)
+#define atomic_dec_and_test(v)          (atomic_sub_return (1, (v)) == 0)
+#define atomic_add_negative(i,v)        (atomic_add_return ((i), (v)) < 0)
+
+/* Atomic operations are already serializing on ARM */
+#define smp_mb__before_atomic_dec()     barrier()
+#define smp_mb__after_atomic_dec()      barrier()
+#define smp_mb__before_atomic_inc()     barrier()
+#define smp_mb__after_atomic_inc()      barrier()
+
+#endif /* __V850_ATOMIC_H__ */
diff --git a/include/asm-v850/bitops.h b/include/asm-v850/bitops.h
new file mode 100644
index 000000000000..7c4ecaf5151c
--- /dev/null
+++ b/include/asm-v850/bitops.h
@@ -0,0 +1,355 @@
+/*
+ * include/asm-v850/bitops.h -- Bit operations
+ *
+ *  Copyright (C) 2001,02,03,04  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03,04  Miles Bader <miles@gnu.org>
+ *  Copyright (C) 1992  Linus Torvalds.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#ifndef __V850_BITOPS_H__
+#define __V850_BITOPS_H__
+
+
+#include <linux/config.h>
+#include <linux/compiler.h>     /* unlikely  */
+#include <asm/byteorder.h>      /* swab32 */
+#include <asm/system.h>         /* interrupt enable/disable */
+
+
+#ifdef __KERNEL__
+
+/*
+ * The __ functions are not atomic
+ */
+
+/*
+ * ffz = Find First Zero in word. Undefined if no zero exists,
+ * so code should check against ~0UL first..
+ */
+extern __inline__ unsigned long ffz (unsigned long word)
+{
+        unsigned long result = 0;
+
+        while (word & 1) {
+                result++;
+                word >>= 1;
+        }
+        return result;
+}
+
+
+/* In the following constant-bit-op macros, a "g" constraint is used when
+   we really need an integer ("i" constraint).  This is to avoid
+   warnings/errors from the compiler in the case where the associated
+   operand _isn't_ an integer, and shouldn't produce bogus assembly because
+   use of that form is protected by a guard statement that checks for
+   constants, and should otherwise be removed by the optimizer.  This
+   _usually_ works -- however, __builtin_constant_p returns true for a
+   variable with a known constant value too, and unfortunately gcc will
+   happily put the variable in a register and use the register for the "g"
+   constraint'd asm operand.  To avoid the latter problem, we add a
+   constant offset to the operand and subtract it back in the asm code;
+   forcing gcc to do arithmetic on the value is usually enough to get it
+   to use a real constant value.  This is horrible, and ultimately
+   unreliable too, but it seems to work for now (hopefully gcc will offer
+   us more control in the future, so we can do a better job).  */
+
+#define __const_bit_op(op, nr, addr)                                    \
+  ({ __asm__ (op " (%0 - 0x123), %1"                                    \
+              :: "g" (((nr) & 0x7) + 0x123),                            \
+                 "m" (*((char *)(addr) + ((nr) >> 3)))                  \
+              : "memory"); })
+#define __var_bit_op(op, nr, addr)                                      \
+  ({ int __nr = (nr);                                                   \
+     __asm__ (op " %0, [%1]"                                            \
+              :: "r" (__nr & 0x7),                                      \
+                 "r" ((char *)(addr) + (__nr >> 3))                     \
+              : "memory"); })
+#define __bit_op(op, nr, addr)                                          \
+  ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF)             \
+   ? __const_bit_op (op, nr, addr)                                      \
+   : __var_bit_op (op, nr, addr))
+
+#define __set_bit(nr, addr)             __bit_op ("set1", nr, addr)
+#define __clear_bit(nr, addr)           __bit_op ("clr1", nr, addr)
+#define __change_bit(nr, addr)          __bit_op ("not1", nr, addr)
+
+/* The bit instructions used by `non-atomic' variants are actually atomic.  */
+#define set_bit __set_bit
+#define clear_bit __clear_bit
+#define change_bit __change_bit
+
+
+#define __const_tns_bit_op(op, nr, addr)                                      \
+  ({ int __tns_res;                                                           \
+     __asm__ __volatile__ (                                                   \
+             "tst1 (%1 - 0x123), %2; setf nz, %0; " op " (%1 - 0x123), %2"    \
+             : "=&r" (__tns_res)                                              \
+             : "g" (((nr) & 0x7) + 0x123),                                    \
+               "m" (*((char *)(addr) + ((nr) >> 3)))                          \
+             : "memory");                                                     \
+     __tns_res;                                                               \
+  })
+#define __var_tns_bit_op(op, nr, addr)                                        \
+  ({ int __nr = (nr);                                                         \
+     int __tns_res;                                                           \
+     __asm__ __volatile__ (                                                   \
+             "tst1 %1, [%2]; setf nz, %0; " op " %1, [%2]"                    \
+              : "=&r" (__tns_res)                                             \
+              : "r" (__nr & 0x7),                                             \
+                "r" ((char *)(addr) + (__nr >> 3))                            \
+              : "memory");                                                    \
+     __tns_res;                                                               \
+  })
+#define __tns_bit_op(op, nr, addr)                                      \
+  ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF)             \
+   ? __const_tns_bit_op (op, nr, addr)                                  \
+   : __var_tns_bit_op (op, nr, addr))
+#define __tns_atomic_bit_op(op, nr, addr)                               \
+  ({ int __tns_atomic_res, __tns_atomic_flags;                          \
+     local_irq_save (__tns_atomic_flags);                               \
+     __tns_atomic_res = __tns_bit_op (op, nr, addr);                    \
+     local_irq_restore (__tns_atomic_flags);                            \
+     __tns_atomic_res;                                                  \
+  })
+
+#define __test_and_set_bit(nr, addr)    __tns_bit_op ("set1", nr, addr)
+#define test_and_set_bit(nr, addr)      __tns_atomic_bit_op ("set1", nr, addr)
+
+#define __test_and_clear_bit(nr, addr)  __tns_bit_op ("clr1", nr, addr)
+#define test_and_clear_bit(nr, addr)    __tns_atomic_bit_op ("clr1", nr, addr)
+
+#define __test_and_change_bit(nr, addr) __tns_bit_op ("not1", nr, addr)
+#define test_and_change_bit(nr, addr)   __tns_atomic_bit_op ("not1", nr, addr)
+
+
+#define __const_test_bit(nr, addr)                                            \
+  ({ int __test_bit_res;                                                      \
+     __asm__ __volatile__ ("tst1 (%1 - 0x123), %2; setf nz, %0"               \
+                           : "=r" (__test_bit_res)                            \
+                           : "g" (((nr) & 0x7) + 0x123),                      \
+                             "m" (*((const char *)(addr) + ((nr) >> 3))));    \
+     __test_bit_res;                                                          \
+  })
+extern __inline__ int __test_bit (int nr, const void *addr)
+{
+        int res;
+        __asm__ __volatile__ ("tst1 %1, [%2]; setf nz, %0"
+                              : "=r" (res)
+                              : "r" (nr & 0x7), "r" (addr + (nr >> 3)));
+        return res;
+}
+#define test_bit(nr,addr)                                               \
+  ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF)             \
+   ? __const_test_bit ((nr), (addr))                                    \
+   : __test_bit ((nr), (addr)))
+
+
+/* clear_bit doesn't provide any barrier for the compiler.  */
+#define smp_mb__before_clear_bit()      barrier ()
+#define smp_mb__after_clear_bit()       barrier ()
+
+
+#define find_first_zero_bit(addr, size) \
+  find_next_zero_bit ((addr), (size), 0)
+
+extern __inline__ int find_next_zero_bit (void *addr, int size, int offset)
+{
+        unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
+        unsigned long result = offset & ~31UL;
+        unsigned long tmp;
+
+        if (offset >= size)
+                return size;
+        size -= result;
+        offset &= 31UL;
+        if (offset) {
+                tmp = * (p++);
+                tmp |= ~0UL >> (32-offset);
+                if (size < 32)
+                        goto found_first;
+                if (~tmp)
+                        goto found_middle;
+                size -= 32;
+                result += 32;
+        }
+        while (size & ~31UL) {
+                if (~ (tmp = * (p++)))
+                        goto found_middle;
+                result += 32;
+                size -= 32;
+        }
+        if (!size)
+                return result;
+        tmp = *p;
+
+ found_first:
+        tmp |= ~0UL >> size;
+ found_middle:
+        return result + ffz (tmp);
+}
+
+
+/* This is the same as generic_ffs, but we can't use that because it's
+   inline and the #include order mucks things up.  */
+static inline int generic_ffs_for_find_next_bit(int x)
+{
+        int r = 1;
+
+        if (!x)
+                return 0;
+        if (!(x & 0xffff)) {
+                x >>= 16;
+                r += 16;
+        }
+        if (!(x & 0xff)) {
+                x >>= 8;
+                r += 8;
+        }
+        if (!(x & 0xf)) {
+                x >>= 4;
+                r += 4;
+        }
+        if (!(x & 3)) {
+                x >>= 2;
+                r += 2;
+        }
+        if (!(x & 1)) {
+                x >>= 1;
+                r += 1;
+        }
+        return r;
+}
+
+/*
+ * Find next one bit in a bitmap reasonably efficiently.
+ */
+static __inline__ unsigned long find_next_bit(const unsigned long *addr,
+        unsigned long size, unsigned long offset)
+{
+        unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
+        unsigned int result = offset & ~31UL;
+        unsigned int tmp;
+
+        if (offset >= size)
+                return size;
+        size -= result;
+        offset &= 31UL;
+        if (offset) {
+                tmp = *p++;
+                tmp &= ~0UL << offset;
+                if (size < 32)
+                        goto found_first;
+                if (tmp)
+                        goto found_middle;
+                size -= 32;
+                result += 32;
+        }
+        while (size >= 32) {
+                if ((tmp = *p++) != 0)
+                        goto found_middle;
+                result += 32;
+                size -= 32;
+        }
+        if (!size)
+                return result;
+        tmp = *p;
+
+found_first:
+        tmp &= ~0UL >> (32 - size);
+        if (tmp == 0UL)        /* Are any bits set? */
+                return result + size; /* Nope. */
+found_middle:
+        return result + generic_ffs_for_find_next_bit(tmp);
+}
+
+/*
+ * find_first_bit - find the first set bit in a memory region
+ */
+#define find_first_bit(addr, size) \
+        find_next_bit((addr), (size), 0)
+
+
+#define ffs(x) generic_ffs (x)
+#define fls(x) generic_fls (x)
+#define __ffs(x) ffs(x)
+
+
+/*
+ * This is just `generic_ffs' from <linux/bitops.h>, except that it assumes
+ * that at least one bit is set, and returns the real index of the bit
+ * (rather than the bit index + 1, like ffs does).
+ */
+static inline int sched_ffs(int x)
+{
+        int r = 0;
+
+        if (!(x & 0xffff)) {
+                x >>= 16;
+                r += 16;
+        }
+        if (!(x & 0xff)) {
+                x >>= 8;
+                r += 8;
+        }
+        if (!(x & 0xf)) {
+                x >>= 4;
+                r += 4;
+        }
+        if (!(x & 3)) {
+                x >>= 2;
+                r += 2;
+        }
+        if (!(x & 1)) {
+                x >>= 1;
+                r += 1;
+        }
+        return r;
+}
+
+/*
+ * Every architecture must define this function. It's the fastest
+ * way of searching a 140-bit bitmap where the first 100 bits are
+ * unlikely to be set. It's guaranteed that at least one of the 140
+ * bits is set.
+ */
+static inline int sched_find_first_bit(unsigned long *b)
+{
+        unsigned offs = 0;
+        while (! *b) {
+                b++;
+                offs += 32;
+        }
+        return sched_ffs (*b) + offs;
+}
+
+/*
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+ */
+#define hweight32(x)                    generic_hweight32 (x)
+#define hweight16(x)                    generic_hweight16 (x)
+#define hweight8(x)                     generic_hweight8 (x)
+
+#define ext2_set_bit                    test_and_set_bit
+#define ext2_set_bit_atomic(l,n,a)      test_and_set_bit(n,a)
+#define ext2_clear_bit                  test_and_clear_bit
+#define ext2_clear_bit_atomic(l,n,a)    test_and_clear_bit(n,a)
+#define ext2_test_bit                   test_bit
+#define ext2_find_first_zero_bit        find_first_zero_bit
+#define ext2_find_next_zero_bit         find_next_zero_bit
+
+/* Bitmap functions for the minix filesystem.  */
+#define minix_test_and_set_bit          test_and_set_bit
+#define minix_set_bit                   set_bit
+#define minix_test_and_clear_bit        test_and_clear_bit
+#define minix_test_bit                  test_bit
+#define minix_find_first_zero_bit       find_first_zero_bit
+
+#endif /* __KERNEL__ */
+
+#endif /* __V850_BITOPS_H__ */
diff --git a/include/asm-v850/bug.h b/include/asm-v850/bug.h
new file mode 100644
index 000000000000..c778916bf7f2
--- /dev/null
+++ b/include/asm-v850/bug.h
@@ -0,0 +1,22 @@
+/*
+ * include/asm-v850/bug.h -- Bug reporting
+ *
+ *  Copyright (C) 2003  NEC Electronics Corporation
+ *  Copyright (C) 2003  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_BUG_H__
+#define __V850_BUG_H__
+
+extern void __bug (void) __attribute__ ((noreturn));
+#define BUG()           __bug()
+#define HAVE_ARCH_BUG
+#include <asm-generic/bug.h>
+
+#endif /* __V850_BUG_H__ */
diff --git a/include/asm-v850/bugs.h b/include/asm-v850/bugs.h
new file mode 100644
index 000000000000..71110a65c1d7
--- /dev/null
+++ b/include/asm-v850/bugs.h
@@ -0,0 +1,16 @@
+/*
+ *  include/asm-v850e/bugs.h
+ *
+ *  Copyright (C) 1994  Linus Torvalds
+ */
+
+/*
+ * This is included by init/main.c to check for architecture-dependent bugs.
+ *
+ * Needs:
+ *      void check_bugs(void);
+ */
+
+static void check_bugs(void)
+{
+}
diff --git a/include/asm-v850/byteorder.h b/include/asm-v850/byteorder.h
new file mode 100644
index 000000000000..a6f07530050e
--- /dev/null
+++ b/include/asm-v850/byteorder.h
@@ -0,0 +1,48 @@
+/*
+ * include/asm-v850/byteorder.h -- Endian id and conversion ops
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_BYTEORDER_H__
+#define __V850_BYTEORDER_H__
+
+#include <asm/types.h>
+#include <linux/compiler.h>
+
+#ifdef __GNUC__
+
+static __inline__ __attribute_const__ __u32 ___arch__swab32 (__u32 word)
+{
+        __u32 res;
+        __asm__ ("bsw %1, %0" : "=r" (res) : "r" (word));
+        return res;
+}
+
+static __inline__ __attribute_const__ __u16 ___arch__swab16 (__u16 half_word)
+{
+        __u16 res;
+        __asm__ ("bsh %1, %0" : "=r" (res) : "r" (half_word));
+        return res;
+}
+
+#define __arch__swab32(x) ___arch__swab32(x)
+#define __arch__swab16(x) ___arch__swab16(x)
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#  define __SWAB_64_THRU_32__
+#endif
+
+#endif /* __GNUC__ */
+
+#include <linux/byteorder/little_endian.h>
+
+#endif /* __V850_BYTEORDER_H__ */
diff --git a/include/asm-v850/cache.h b/include/asm-v850/cache.h
new file mode 100644
index 000000000000..027f8c9090cd
--- /dev/null
+++ b/include/asm-v850/cache.h
@@ -0,0 +1,25 @@
+/*
+ * include/asm-v850/cache.h -- Cache operations
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_CACHE_H__
+#define __V850_CACHE_H__
+
+/* All cache operations are machine-dependent.  */
+#include <asm/machdep.h>
+
+#ifndef L1_CACHE_BYTES
+/* This processor has no cache, so just choose an arbitrary value.  */
+#define L1_CACHE_BYTES          16
+#endif
+
+#endif /* __V850_CACHE_H__ */
diff --git a/include/asm-v850/cacheflush.h b/include/asm-v850/cacheflush.h
new file mode 100644
index 000000000000..e1a87f82f1a4
--- /dev/null
+++ b/include/asm-v850/cacheflush.h
@@ -0,0 +1,69 @@
+/*
+ * include/asm-v850/cacheflush.h
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_CACHEFLUSH_H__
+#define __V850_CACHEFLUSH_H__
+
+/* Somebody depends on this; sigh...  */
+#include <linux/mm.h>
+
+#include <asm/machdep.h>
+
+
+/* The following are all used by the kernel in ways that only affect
+   systems with MMUs, so we don't need them.  */
+#define flush_cache_all()                       ((void)0)
+#define flush_cache_mm(mm)                      ((void)0)
+#define flush_cache_range(vma, start, end)      ((void)0)
+#define flush_cache_page(vma, vmaddr, pfn)      ((void)0)
+#define flush_dcache_page(page)                 ((void)0)
+#define flush_dcache_mmap_lock(mapping)         ((void)0)
+#define flush_dcache_mmap_unlock(mapping)       ((void)0)
+#define flush_cache_vmap(start, end)            ((void)0)
+#define flush_cache_vunmap(start, end)          ((void)0)
+
+#ifdef CONFIG_NO_CACHE
+
+/* Some systems have no cache at all, in which case we don't need these
+   either.  */
+#define flush_icache()                          ((void)0)
+#define flush_icache_range(start, end)          ((void)0)
+#define flush_icache_page(vma,pg)               ((void)0)
+#define flush_icache_user_range(vma,pg,adr,len) ((void)0)
+#define flush_cache_sigtramp(vaddr)             ((void)0)
+
+#else /* !CONFIG_NO_CACHE */
+
+struct page;
+struct mm_struct;
+struct vm_area_struct;
+
+/* Otherwise, somebody had better define them.  */
+extern void flush_icache (void);
+extern void flush_icache_range (unsigned long start, unsigned long end);
+extern void flush_icache_page (struct vm_area_struct *vma, struct page *page);
+extern void flush_icache_user_range (struct vm_area_struct *vma,
+                                     struct page *page,
+                                     unsigned long adr, int len);
+extern void flush_cache_sigtramp (unsigned long addr);
+
+#endif /* CONFIG_NO_CACHE */
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+do { memcpy(dst, src, len); \
+     flush_icache_user_range(vma, page, vaddr, len); \
+} while (0)
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+        memcpy(dst, src, len)
+
+#endif /* __V850_CACHEFLUSH_H__ */
diff --git a/include/asm-v850/checksum.h b/include/asm-v850/checksum.h
new file mode 100644
index 000000000000..d3aedb7bfc5c
--- /dev/null
+++ b/include/asm-v850/checksum.h
@@ -0,0 +1,115 @@
+/*
+ * include/asm-v850/checksum.h -- Checksum ops
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_CHECKSUM_H__
+#define __V850_CHECKSUM_H__
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+extern unsigned int csum_partial (const unsigned char * buff, int len,
+                                  unsigned int sum);
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+extern unsigned csum_partial_copy (const char *src, char *dst, int len,
+                                   unsigned sum);
+
+
+/*
+ * the same as csum_partial_copy, but copies from user space.
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+extern unsigned csum_partial_copy_from_user (const char *src, char *dst,
+                                             int len, unsigned sum,
+                                             int *csum_err);
+
+#define csum_partial_copy_nocheck(src, dst, len, sum)   \
+        csum_partial_copy ((src), (dst), (len), (sum))
+
+unsigned short ip_fast_csum (unsigned char *iph, unsigned int ihl);
+
+/*
+ *      Fold a partial checksum
+ */
+static inline unsigned int csum_fold (unsigned long sum)
+{
+        unsigned int result;
+        /*
+                                %0              %1
+              hsw %1, %0        H     L         L     H
+              add %1, %0        H     L         H+L+C H+L
+        */
+        asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum));
+        return (~result) >> 16;
+}
+
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline unsigned int
+csum_tcpudp_nofold (unsigned long saddr, unsigned long daddr,
+                    unsigned short len,
+                    unsigned short proto, unsigned int sum)
+{
+        int __carry;
+        __asm__ ("add %2, %0;"
+                 "setf c, %1;"
+                 "add %1, %0;"
+                 "add %3, %0;"
+                 "setf c, %1;"
+                 "add %1, %0;"
+                 "add %4, %0;"
+                 "setf c, %1;"
+                 "add %1, %0"
+                 : "=&r" (sum), "=&r" (__carry)
+                 : "r" (daddr), "r" (saddr),
+                 "r" (ntohs (len) + (proto << 8)),
+                 "0" (sum));
+        return sum;
+}
+
+static inline unsigned short int
+csum_tcpudp_magic (unsigned long saddr, unsigned long daddr,
+                   unsigned short len,
+                   unsigned short proto, unsigned int sum)
+{
+        return csum_fold (csum_tcpudp_nofold (saddr, daddr, len, proto, sum));
+}
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+extern unsigned short ip_compute_csum (const unsigned char * buff, int len);
+
+
+#endif /* __V850_CHECKSUM_H__ */
diff --git a/include/asm-v850/clinkage.h b/include/asm-v850/clinkage.h
new file mode 100644
index 000000000000..2b622adccae5
--- /dev/null
+++ b/include/asm-v850/clinkage.h
@@ -0,0 +1,26 @@
+/*
+ * include/asm-v850/clinkage.h -- Macros to reflect C symbol-naming conventions
+ *
+ *  Copyright (C) 2001,02  NEC Corporatione
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __CLINKAGE_H__
+#define __V850_CLINKAGE_H__
+
+#include <asm/macrology.h>
+#include <asm/asm.h>
+
+#define C_SYMBOL_NAME(name)     macrology_paste(_, name)
+#define C_SYMBOL_STRING(name)   macrology_stringify(C_SYMBOL_NAME(name))
+#define C_ENTRY(name)           G_ENTRY(C_SYMBOL_NAME(name))
+#define C_DATA(name)            G_DATA(C_SYMBOL_NAME(name))
+#define C_END(name)             END(C_SYMBOL_NAME(name))
+
+#endif /* __V850_CLINKAGE_H__ */
diff --git a/include/asm-v850/cputime.h b/include/asm-v850/cputime.h
new file mode 100644
index 000000000000..7c799c33b8a9
--- /dev/null
+++ b/include/asm-v850/cputime.h
@@ -0,0 +1,6 @@
+#ifndef __V850_CPUTIME_H
+#define __V850_CPUTIME_H
+
+#include <asm-generic/cputime.h>
+
+#endif /* __V850_CPUTIME_H */
diff --git a/include/asm-v850/current.h b/include/asm-v850/current.h
new file mode 100644
index 000000000000..30aae5673770
--- /dev/null
+++ b/include/asm-v850/current.h
@@ -0,0 +1,47 @@
+/*
+ * include/asm-v850/current.h -- Current task
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_CURRENT_H__
+#define __V850_CURRENT_H__
+
+#ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe.  */
+#include <linux/thread_info.h>
+#endif
+
+#include <asm/macrology.h>
+
+
+/* Register used to hold the current task pointer while in the kernel.
+   Any `call clobbered' register without a special meaning should be OK,
+   but check asm/v850/kernel/entry.S to be sure.  */
+#define CURRENT_TASK_REGNUM     16
+#define CURRENT_TASK            macrology_paste (r, CURRENT_TASK_REGNUM)
+
+
+#ifdef __ASSEMBLY__
+
+/* Put a pointer to the current task structure into REG.  */
+#define GET_CURRENT_TASK(reg)                                           \
+        GET_CURRENT_THREAD(reg);                                        \
+        ld.w    TI_TASK[reg], reg
+
+#else /* !__ASSEMBLY__ */
+
+/* A pointer to the current task.  */
+register struct task_struct *current                                    \
+   __asm__ (macrology_stringify (CURRENT_TASK));
+
+#endif /* __ASSEMBLY__ */
+
+
+#endif /* _V850_CURRENT_H */
diff --git a/include/asm-v850/delay.h b/include/asm-v850/delay.h
new file mode 100644
index 000000000000..1ce65d48a7c5
--- /dev/null
+++ b/include/asm-v850/delay.h
@@ -0,0 +1,47 @@
+/*
+ * include/asm-v850/delay.h -- Delay routines, using a pre-computed
+ *      "loops_per_second" value
+ *
+ *  Copyright (C) 2001,03  NEC Corporation
+ *  Copyright (C) 2001,03  Miles Bader <miles@gnu.org>
+ *  Copyright (C) 1994 Hamish Macdonald
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#ifndef __V850_DELAY_H__
+#define __V850_DELAY_H__
+
+#include <asm/param.h>
+
+extern __inline__ void __delay(unsigned long loops)
+{
+        if (loops)
+                __asm__ __volatile__ ("1: add -1, %0; bnz 1b"
+                                      : "=r" (loops) : "0" (loops));
+}
+
+/*
+ * Use only for very small delays ( < 1 msec).  Should probably use a
+ * lookup table, really, as the multiplications take much too long with
+ * short delays.  This is a "reasonable" implementation, though (and the
+ * first constant multiplications gets optimized away if the delay is
+ * a constant)  
+ */
+
+extern unsigned long loops_per_jiffy;
+
+extern __inline__ void udelay(unsigned long usecs)
+{
+        register unsigned long full_loops, part_loops;
+
+        full_loops = ((usecs * HZ) / 1000000) * loops_per_jiffy;
+        usecs %= (1000000 / HZ);
+        part_loops = (usecs * HZ * loops_per_jiffy) / 1000000;
+
+        __delay(full_loops + part_loops);
+}
+
+#endif /* __V850_DELAY_H__ */
diff --git a/include/asm-v850/div64.h b/include/asm-v850/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/include/asm-v850/div64.h
@@ -0,0 +1 @@
+#include <asm-generic/div64.h>
diff --git a/include/asm-v850/dma-mapping.h b/include/asm-v850/dma-mapping.h
new file mode 100644
index 000000000000..c63fb50ec9ef
--- /dev/null
+++ b/include/asm-v850/dma-mapping.h
@@ -0,0 +1,12 @@
+#ifndef __V850_DMA_MAPPING_H__
+#define __V850_DMA_MAPPING_H__
+
+#include <linux/config.h>
+
+#ifdef CONFIG_PCI
+#include <asm-generic/dma-mapping.h>
+#else
+#include <asm-generic/dma-mapping-broken.h>
+#endif
+
+#endif /* __V850_DMA_MAPPING_H__ */
diff --git a/include/asm-v850/dma.h b/include/asm-v850/dma.h
new file mode 100644
index 000000000000..2369849e2d0a
--- /dev/null
+++ b/include/asm-v850/dma.h
@@ -0,0 +1,18 @@
+#ifndef __V850_DMA_H__
+#define __V850_DMA_H__
+
+/* What should this be?  */
+#define MAX_DMA_ADDRESS 0xFFFFFFFF
+
+/* reserve a DMA channel */
+extern int request_dma (unsigned int dmanr, const char * device_id);
+/* release it again */
+extern void free_dma (unsigned int dmanr);
+
+#ifdef CONFIG_PCI
+extern int isa_dma_bridge_buggy;
+#else
+#define isa_dma_bridge_buggy    (0)
+#endif
+
+#endif /* __V850_DMA_H__ */
diff --git a/include/asm-v850/elf.h b/include/asm-v850/elf.h
new file mode 100644
index 000000000000..7db8edffb1c6
--- /dev/null
+++ b/include/asm-v850/elf.h
@@ -0,0 +1,101 @@
+#ifndef __V850_ELF_H__
+#define __V850_ELF_H__
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+#include <asm/user.h>
+#include <asm/byteorder.h>
+
+typedef unsigned long elf_greg_t;
+
+#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef struct user_fpu_struct elf_fpregset_t;
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x)  \
+  ((x)->e_machine == EM_V850 || (x)->e_machine == EM_CYGNUS_V850)
+
+
+/* v850 relocation types.  */
+#define R_V850_NONE             0
+#define R_V850_9_PCREL          1
+#define R_V850_22_PCREL         2
+#define R_V850_HI16_S           3
+#define R_V850_HI16             4
+#define R_V850_LO16             5
+#define R_V850_32               6
+#define R_V850_16               7
+#define R_V850_8                8
+#define R_V850_SDA_16_16_OFFSET 9       /* For ld.b, st.b, set1, clr1,
+                                           not1, tst1, movea, movhi */
+#define R_V850_SDA_15_16_OFFSET 10      /* For ld.w, ld.h, ld.hu, st.w, st.h */
+#define R_V850_ZDA_16_16_OFFSET 11      /* For ld.b, st.b, set1, clr1,
+                                           not1, tst1, movea, movhi */
+#define R_V850_ZDA_15_16_OFFSET 12      /* For ld.w, ld.h, ld.hu, st.w, st.h */
+#define R_V850_TDA_6_8_OFFSET   13      /* For sst.w, sld.w */
+#define R_V850_TDA_7_8_OFFSET   14      /* For sst.h, sld.h */
+#define R_V850_TDA_7_7_OFFSET   15      /* For sst.b, sld.b */
+#define R_V850_TDA_16_16_OFFSET 16      /* For set1, clr1, not1, tst1,
+                                           movea, movhi */
+#define R_V850_NUM              17
+
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS       ELFCLASS32
+#ifdef __LITTLE_ENDIAN__
+#define ELF_DATA        ELFDATA2LSB
+#else
+#define ELF_DATA        ELFDATA2MSB
+#endif
+#define ELF_ARCH        EM_V850
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE       4096
+
+
+#define ELF_CORE_COPY_REGS(_dest,_regs)                         \
+        memcpy((char *) &_dest, (char *) _regs,                 \
+               sizeof(struct pt_regs));
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this CPU supports.  This could be done in user space,
+   but it's not easy, and we've already done it here.  */
+
+#define ELF_HWCAP       (0)
+
+/* This yields a string that ld.so will use to load implementation
+   specific libraries for optimization.  This is more specific in
+   intent than poking at uname or /proc/cpuinfo.
+
+   For the moment, we have only optimizations for the Intel generations,
+   but that could change... */
+
+#define ELF_PLATFORM  (NULL)
+
+#define ELF_PLAT_INIT(_r, load_addr)                                          \
+  do {                                                                        \
+         _r->gpr[0] =  _r->gpr[1] =  _r->gpr[2] =  _r->gpr[3] =               \
+         _r->gpr[4] =  _r->gpr[5] =  _r->gpr[6] =  _r->gpr[7] =               \
+         _r->gpr[8] =  _r->gpr[9] = _r->gpr[10] = _r->gpr[11] =               \
+        _r->gpr[12] = _r->gpr[13] = _r->gpr[14] = _r->gpr[15] =               \
+        _r->gpr[16] = _r->gpr[17] = _r->gpr[18] = _r->gpr[19] =               \
+        _r->gpr[20] = _r->gpr[21] = _r->gpr[22] = _r->gpr[23] =               \
+        _r->gpr[24] = _r->gpr[25] = _r->gpr[26] = _r->gpr[27] =               \
+        _r->gpr[28] = _r->gpr[29] = _r->gpr[30] = _r->gpr[31] =               \
+        0;                                                                    \
+  } while (0)
+
+#ifdef __KERNEL__
+#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
+#endif
+
+#endif /* __V850_ELF_H__ */
diff --git a/include/asm-v850/entry.h b/include/asm-v850/entry.h
new file mode 100644
index 000000000000..d9df8ac48584
--- /dev/null
+++ b/include/asm-v850/entry.h
@@ -0,0 +1,113 @@
+/*
+ * include/asm-v850/entry.h -- Definitions used by low-level trap handlers
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_ENTRY_H__
+#define __V850_ENTRY_H__
+
+
+#include <asm/ptrace.h>
+#include <asm/machdep.h>
+
+
+/* These are special variables using by the kernel trap/interrupt code
+   to save registers in, at a time when there are no spare registers we
+   can use to do so, and we can't depend on the value of the stack
+   pointer.  This means that they must be within a signed 16-bit
+   displacement of 0x00000000.  */
+
+#define KERNEL_VAR_SPACE_ADDR   R0_RAM_ADDR
+
+#ifdef __ASSEMBLY__
+#define KERNEL_VAR(addr)        addr[r0]
+#else
+#define KERNEL_VAR(addr)        (*(volatile unsigned long *)(addr))
+#endif
+
+/* Kernel stack pointer, 4 bytes.  */
+#define KSP_ADDR                (KERNEL_VAR_SPACE_ADDR +  0)
+#define KSP                     KERNEL_VAR (KSP_ADDR)
+/* 1 if in kernel-mode, 0 if in user mode, 1 byte.  */
+#define KM_ADDR                 (KERNEL_VAR_SPACE_ADDR +  4)
+#define KM                      KERNEL_VAR (KM_ADDR)
+/* Temporary storage for interrupt handlers, 4 bytes.  */
+#define INT_SCRATCH_ADDR        (KERNEL_VAR_SPACE_ADDR +  8)
+#define INT_SCRATCH             KERNEL_VAR (INT_SCRATCH_ADDR)
+/* Where the stack-pointer is saved when jumping to various sorts of
+   interrupt handlers.  ENTRY_SP is used by everything except NMIs,
+   which have their own location.  Higher-priority NMIs can clobber the
+   value written by a lower priority NMI, since they can't be disabled,
+   but that's OK, because only NMI0 (the lowest-priority one) is allowed
+   to return.  */
+#define ENTRY_SP_ADDR           (KERNEL_VAR_SPACE_ADDR + 12)
+#define ENTRY_SP                KERNEL_VAR (ENTRY_SP_ADDR)
+#define NMI_ENTRY_SP_ADDR       (KERNEL_VAR_SPACE_ADDR + 16)
+#define NMI_ENTRY_SP            KERNEL_VAR (NMI_ENTRY_SP_ADDR)
+
+#ifdef CONFIG_RESET_GUARD
+/* Used to detect unexpected resets (since the v850 has no MMU, any call
+   through a null pointer will jump to the reset vector).  We detect
+   such resets by checking for a magic value, RESET_GUARD_ACTIVE, in
+   this location.  Properly resetting the machine stores zero there, so
+   it shouldn't trigger the guard; the power-on value is uncertain, but
+   it's unlikely to be RESET_GUARD_ACTIVE.  */
+#define RESET_GUARD_ADDR        (KERNEL_VAR_SPACE_ADDR + 28)
+#define RESET_GUARD             KERNEL_VAR (RESET_GUARD_ADDR)
+#define RESET_GUARD_ACTIVE      0xFAB4BEEF
+#endif /* CONFIG_RESET_GUARD */
+
+#ifdef CONFIG_V850E_HIGHRES_TIMER
+#define HIGHRES_TIMER_SLOW_TICKS_ADDR (KERNEL_VAR_SPACE_ADDR + 32)
+#define HIGHRES_TIMER_SLOW_TICKS     KERNEL_VAR (HIGHRES_TIMER_SLOW_TICKS_ADDR)
+#endif /* CONFIG_V850E_HIGHRES_TIMER */
+
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_RESET_GUARD
+/* Turn off reset guard, so that resetting the machine works normally.
+   This should be called in the various machine_halt, etc., functions.  */
+static inline void disable_reset_guard (void)
+{
+        RESET_GUARD = 0;
+}
+#endif /* CONFIG_RESET_GUARD */
+
+#endif /* !__ASSEMBLY__ */
+
+
+/* A `state save frame' is a struct pt_regs preceded by some extra space
+   suitable for a function call stack frame.  */
+
+/* Amount of room on the stack reserved for arguments and to satisfy the
+   C calling conventions, in addition to the space used by the struct
+   pt_regs that actually holds saved values.  */
+#define STATE_SAVE_ARG_SPACE    (6*4) /* Up to six arguments.  */
+
+
+#ifdef __ASSEMBLY__
+
+/* The size of a state save frame.  */
+#define STATE_SAVE_SIZE         (PT_SIZE + STATE_SAVE_ARG_SPACE)
+
+#else /* !__ASSEMBLY__ */
+
+/* The size of a state save frame.  */
+#define STATE_SAVE_SIZE        (sizeof (struct pt_regs) + STATE_SAVE_ARG_SPACE)
+
+#endif /* __ASSEMBLY__ */
+
+
+/* Offset of the struct pt_regs in a state save frame.  */
+#define STATE_SAVE_PT_OFFSET    STATE_SAVE_ARG_SPACE
+
+
+#endif /* __V850_ENTRY_H__ */
diff --git a/include/asm-v850/errno.h b/include/asm-v850/errno.h
new file mode 100644
index 000000000000..31c91df01205
--- /dev/null
+++ b/include/asm-v850/errno.h
@@ -0,0 +1,6 @@
+#ifndef __V850_ERRNO_H__
+#define __V850_ERRNO_H__
+
+#include <asm-generic/errno.h>
+
+#endif /* __V850_ERRNO_H__ */
diff --git a/include/asm-v850/fcntl.h b/include/asm-v850/fcntl.h
new file mode 100644
index 000000000000..31d4b5961221
--- /dev/null
+++ b/include/asm-v850/fcntl.h
@@ -0,0 +1,87 @@
+#ifndef __V850_FCNTL_H__
+#define __V850_FCNTL_H__
+
+/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
+   located on an ext2 file system */
+#define O_ACCMODE         0003
+#define O_RDONLY            00
+#define O_WRONLY            01
+#define O_RDWR              02
+#define O_CREAT           0100  /* not fcntl */
+#define O_EXCL            0200  /* not fcntl */
+#define O_NOCTTY          0400  /* not fcntl */
+#define O_TRUNC          01000  /* not fcntl */
+#define O_APPEND         02000
+#define O_NONBLOCK       04000
+#define O_NDELAY        O_NONBLOCK
+#define O_SYNC          010000
+#define FASYNC          020000  /* fcntl, for BSD compatibility */
+#define O_DIRECTORY     040000  /* must be a directory */
+#define O_NOFOLLOW     0100000  /* don't follow links */
+#define O_DIRECT       0200000  /* direct disk access hint - currently ignored */
+#define O_LARGEFILE    0400000
+#define O_NOATIME       01000000
+
+#define F_DUPFD         0       /* dup */
+#define F_GETFD         1       /* get close_on_exec */
+#define F_SETFD         2       /* set/clear close_on_exec */
+#define F_GETFL         3       /* get file->f_flags */
+#define F_SETFL         4       /* set file->f_flags */
+#define F_GETLK         5
+#define F_SETLK         6
+#define F_SETLKW        7
+
+#define F_SETOWN        8       /*  for sockets. */
+#define F_GETOWN        9       /*  for sockets. */
+#define F_SETSIG        10      /*  for sockets. */
+#define F_GETSIG        11      /*  for sockets. */
+
+#define F_GETLK64       12      /*  using 'struct flock64' */
+#define F_SETLK64       13
+#define F_SETLKW64      14
+
+/* for F_[GET|SET]FL */
+#define FD_CLOEXEC      1       /* actually anything with low bit set goes */
+
+/* for posix fcntl() and lockf() */
+#define F_RDLCK         0
+#define F_WRLCK         1
+#define F_UNLCK         2
+
+/* for old implementation of bsd flock () */
+#define F_EXLCK         4       /* or 3 */
+#define F_SHLCK         8       /* or 4 */
+
+/* for leases */
+#define F_INPROGRESS    16
+
+/* operations for bsd flock(), also used by the kernel implementation */
+#define LOCK_SH         1       /* shared lock */
+#define LOCK_EX         2       /* exclusive lock */
+#define LOCK_NB         4       /* or'd with one of the above to prevent
+                                   blocking */
+#define LOCK_UN         8       /* remove lock */
+
+#define LOCK_MAND       32      /* This is a mandatory flock */
+#define LOCK_READ       64      /* ... Which allows concurrent read operations */
+#define LOCK_WRITE      128     /* ... Which allows concurrent write operations */
+#define LOCK_RW         192     /* ... Which allows concurrent read & write ops */
+
+struct flock {
+        short l_type;
+        short l_whence;
+        off_t l_start;
+        off_t l_len;
+        pid_t l_pid;
+};
+
+struct flock64 {
+        short  l_type;
+        short  l_whence;
+        loff_t l_start;
+        loff_t l_len;
+        pid_t  l_pid;
+};
+
+#define F_LINUX_SPECIFIC_BASE   1024
+#endif /* __V850_FCNTL_H__ */
diff --git a/include/asm-v850/flat.h b/include/asm-v850/flat.h
new file mode 100644
index 000000000000..3888f59d6881
--- /dev/null
+++ b/include/asm-v850/flat.h
@@ -0,0 +1,131 @@
+/*
+ * include/asm-v850/flat.h -- uClinux flat-format executables
+ *
+ *  Copyright (C) 2002,03  NEC Electronics Corporation
+ *  Copyright (C) 2002,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_FLAT_H__
+#define __V850_FLAT_H__
+
+/* The amount by which a relocation can exceed the program image limits
+   without being regarded as an error.  On the v850, the relocations of
+   some base-pointers can be offset by 0x8000 (to allow better usage of the
+   space offered by 16-bit signed offsets -- in most cases the offsets used
+   with such a base-pointer will be negative).  */
+
+#define flat_reloc_valid(reloc, size)   ((reloc) <= (size + 0x8000))
+
+#define flat_stack_align(sp)            /* nothing needed */
+#define flat_argvp_envp_on_stack()      0
+#define flat_old_ram_flag(flags)        (flags)
+
+/* We store the type of relocation in the top 4 bits of the `relval.' */
+
+/* Convert a relocation entry into an address.  */
+static inline unsigned long
+flat_get_relocate_addr (unsigned long relval)
+{
+        return relval & 0x0fffffff; /* Mask out top 4-bits */
+}
+
+#define flat_v850_get_reloc_type(relval) ((relval) >> 28)
+
+#define FLAT_V850_R_32          0 /* Normal 32-bit reloc */
+#define FLAT_V850_R_HI16S_LO15  1 /* High 16-bits + signed 15-bit low field */
+#define FLAT_V850_R_HI16S_LO16  2 /* High 16-bits + signed 16-bit low field */
+
+/* Extract the address to be relocated from the symbol reference at RP;
+   RELVAL is the raw relocation-table entry from which RP is derived.
+   For the v850, RP should always be half-word aligned.  */
+static inline unsigned long flat_get_addr_from_rp (unsigned long *rp,
+                                                   unsigned long relval,
+                                                   unsigned long flags)
+{
+        short *srp = (short *)rp;
+
+        switch (flat_v850_get_reloc_type (relval))
+        {
+        case FLAT_V850_R_32:
+                /* Simple 32-bit address.  */
+                return srp[0] | (srp[1] << 16);
+
+        case FLAT_V850_R_HI16S_LO16:
+                /* The high and low halves of the address are in the 16
+                   bits at RP, and the 2nd word of the 32-bit instruction
+                   following that, respectively.  The low half is _signed_
+                   so we have to sign-extend it and add it to the upper
+                   half instead of simply or-ing them together.
+
+                   Unlike most relocated address, this one is stored in
+                   native (little-endian) byte-order to avoid problems with
+                   trashing the low-order bit, so we have to convert to
+                   network-byte-order before returning, as that's what the
+                   caller expects.  */
+                return htonl ((srp[0] << 16) + srp[2]);
+
+        case FLAT_V850_R_HI16S_LO15:
+                /* The high and low halves of the address are in the 16
+                   bits at RP, and the upper 15 bits of the 2nd word of the
+                   32-bit instruction following that, respectively.  The
+                   low half is _signed_ so we have to sign-extend it and
+                   add it to the upper half instead of simply or-ing them
+                   together.  The lowest bit is always zero.
+
+                   Unlike most relocated address, this one is stored in
+                   native (little-endian) byte-order to avoid problems with
+                   trashing the low-order bit, so we have to convert to
+                   network-byte-order before returning, as that's what the
+                   caller expects.  */
+                return htonl ((srp[0] << 16) + (srp[2] & ~0x1));
+
+        default:
+                return ~0;      /* bogus value */
+        }
+}
+
+/* Insert the address ADDR into the symbol reference at RP;
+   RELVAL is the raw relocation-table entry from which RP is derived.
+   For the v850, RP should always be half-word aligned.  */
+static inline void flat_put_addr_at_rp (unsigned long *rp, unsigned long addr,
+                                        unsigned long relval)
+{
+        short *srp = (short *)rp;
+
+        switch (flat_v850_get_reloc_type (relval)) {
+        case FLAT_V850_R_32:
+                /* Simple 32-bit address.  */
+                srp[0] = addr & 0xFFFF;
+                srp[1] = (addr >> 16);
+                break;
+
+        case FLAT_V850_R_HI16S_LO16:
+                /* The high and low halves of the address are in the 16
+                   bits at RP, and the 2nd word of the 32-bit instruction
+                   following that, respectively.  The low half is _signed_
+                   so we must carry its sign bit to the upper half before
+                   writing the upper half.  */
+                srp[0] = (addr >> 16) + ((addr >> 15) & 0x1);
+                srp[2] = addr & 0xFFFF;
+                break;
+
+        case FLAT_V850_R_HI16S_LO15:
+                /* The high and low halves of the address are in the 16
+                   bits at RP, and the upper 15 bits of the 2nd word of the
+                   32-bit instruction following that, respectively.  The
+                   low half is _signed_ so we must carry its sign bit to
+                   the upper half before writing the upper half.  The
+                   lowest bit we preserve from the existing instruction.  */
+                srp[0] = (addr >> 16) + ((addr >> 15) & 0x1);
+                srp[2] = (addr & 0xFFFE) | (srp[2] & 0x1);
+                break;
+        }
+}
+
+#endif /* __V850_FLAT_H__ */
diff --git a/include/asm-v850/fpga85e2c.h b/include/asm-v850/fpga85e2c.h
new file mode 100644
index 000000000000..d32f04504b13
--- /dev/null
+++ b/include/asm-v850/fpga85e2c.h
@@ -0,0 +1,88 @@
+/*
+ * include/asm-v850/fpga85e2c.h -- Machine-dependent defs for
+ *      FPGA implementation of V850E2/NA85E2C
+ *
+ *  Copyright (C) 2002,03  NEC Electronics Corporation
+ *  Copyright (C) 2002,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_FPGA85E2C_H__
+#define __V850_FPGA85E2C_H__
+
+#include <asm/v850e2.h>
+#include <asm/clinkage.h>
+
+
+#define CPU_MODEL       "v850e2/fpga85e2c"
+#define CPU_MODEL_LONG  "NEC V850E2/NA85E2C"
+#define PLATFORM        "fpga85e2c"
+#define PLATFORM_LONG   "NA85E2C FPGA implementation"
+
+
+/* `external ram'.  */
+#define ERAM_ADDR               0
+#define ERAM_SIZE               0x00100000 /* 1MB */
+
+
+/* FPGA specific control registers.  */
+
+/* Writing a non-zero value to FLGREG(0) will signal the controlling CPU
+   to stop execution.  */
+#define FLGREG_ADDR(n)          (0xFFE80100 + 2*(n))
+#define FLGREG(n)               (*(volatile unsigned char *)FLGREG_ADDR (n))
+#define FLGREG_NUM              2
+
+#define CSDEV_ADDR(n)           (0xFFE80110 + 2*(n))
+#define CSDEV(n)                (*(volatile unsigned char *)CSDEV_ADDR (n))
+
+
+/* Timer interrupts 0-3, interrupt at intervals from CLK/4096 to CLK/16384.  */
+#define IRQ_RPU(n)              (60 + (n))
+#define IRQ_RPU_NUM             4
+
+/* For <asm/irq.h> */
+#define NUM_CPU_IRQS            64
+
+
+/* General-purpose timer.  */
+/* control/status register (can only be read/written via bit insns) */
+#define RPU_GTMC_ADDR           0xFFFFFB00
+#define RPU_GTMC                (*(volatile unsigned char *)RPU_GTMC_ADDR)
+#define RPU_GTMC_CE_BIT         7 /* clock enable (control) */
+#define RPU_GTMC_OV_BIT         6 /* overflow (status) */
+#define RPU_GTMC_CLK_BIT        1 /* 0 = .5 MHz CLK, 1 = 1 Mhz (control) */
+/* 32-bit count (8 least-significant bits are always zero).  */
+#define RPU_GTM_ADDR            0xFFFFFB28
+#define RPU_GTM                 (*(volatile unsigned long *)RPU_GTMC_ADDR)
+
+
+/* For <asm/page.h> */
+#define PAGE_OFFSET             ERAM_ADDR /* minimum allocatable address */
+
+
+/* For <asm/entry.h> */
+/* `R0 RAM', used for a few miscellaneous variables that must be accessible
+   using a load instruction relative to R0.  The FPGA implementation
+   actually has no on-chip RAM, so we use part of main ram just after the
+   interrupt vectors.  */
+#ifdef __ASSEMBLY__
+#define R0_RAM_ADDR             lo(C_SYMBOL_NAME(_r0_ram))
+#else
+extern char _r0_ram;
+#define R0_RAM_ADDR             ((unsigned long)&_r0_ram);
+#endif
+
+
+/* For <asm/param.h> */
+#ifndef HZ
+#define HZ                      122 /* actually, 8.192ms ticks =~ 122.07 */
+#endif
+
+
+#endif /* __V850_FPGA85E2C_H__ */
diff --git a/include/asm-v850/gbus_int.h b/include/asm-v850/gbus_int.h
new file mode 100644
index 000000000000..0c4bce753c7e
--- /dev/null
+++ b/include/asm-v850/gbus_int.h
@@ -0,0 +1,97 @@
+/*
+ * include/asm-v850/gbus_int.h -- Midas labs GBUS interrupt support
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_GBUS_INT_H__
+#define __V850_GBUS_INT_H__
+
+
+/* The GBUS interrupt interface has 32 interrupts shared among 4
+   processor interrupts.  The 32 GBUS interrupts are divided into two
+   sets of 16 each, for allocating among control registers, etc (there
+   are two of each control register, with bits 0-15 controlling an
+   interrupt each).  */
+
+/* The GBUS interrupts themselves.  */
+#define IRQ_GBUS_INT(n)         (GBUS_INT_BASE_IRQ + (n))
+#define IRQ_GBUS_INT_NUM        32
+
+/* Control registers.  */
+#define GBUS_INT_STATUS_ADDR(w) (GBUS_INT_BASE_ADDR + (w)*0x40)
+#define GBUS_INT_STATUS(w)      (*(volatile u16 *)GBUS_INT_STATUS_ADDR(w))
+#define GBUS_INT_CLEAR_ADDR(w)  (GBUS_INT_BASE_ADDR + 0x10 + (w)*0x40)
+#define GBUS_INT_CLEAR(w)       (*(volatile u16 *)GBUS_INT_CLEAR_ADDR(w))
+#define GBUS_INT_EDGE_ADDR(w)   (GBUS_INT_BASE_ADDR + 0x20 + (w)*0x40)
+#define GBUS_INT_EDGE(w)        (*(volatile u16 *)GBUS_INT_EDGE_ADDR(w))
+#define GBUS_INT_POLARITY_ADDR(w)       (GBUS_INT_BASE_ADDR + 0x30 + (w)*0x40)
+#define GBUS_INT_POLARITY(w)    (*(volatile u16 *)GBUS_INT_POLARITY_ADDR(w))
+/* This allows enabling interrupt bits in word W for interrupt GINTn.  */
+#define GBUS_INT_ENABLE_ADDR(w, n) \
+   (GBUS_INT_BASE_ADDR + 0x100 + (w)*0x10 + (n)*0x20)
+#define GBUS_INT_ENABLE(w, n)   (*(volatile u16 *)GBUS_INT_ENABLE_ADDR(w, n))
+
+/* Mapping between kernel interrupt numbers and hardware control regs/bits.  */
+#define GBUS_INT_BITS_PER_WORD  16
+#define GBUS_INT_NUM_WORDS      (IRQ_GBUS_INT_NUM / GBUS_INT_BITS_PER_WORD)
+#define GBUS_INT_IRQ_WORD(irq)  (((irq) - GBUS_INT_BASE_IRQ) >> 4)
+#define GBUS_INT_IRQ_BIT(irq)   (((irq) - GBUS_INT_BASE_IRQ) & 0xF)
+#define GBUS_INT_IRQ_MASK(irq)  (1 << GBUS_INT_IRQ_BIT(irq))
+
+
+/* Possible priorities for GBUS interrupts.  */
+#define GBUS_INT_PRIORITY_HIGH          2
+#define GBUS_INT_PRIORITY_MEDIUM        4
+#define GBUS_INT_PRIORITY_LOW           6
+
+
+#ifndef __ASSEMBLY__
+
+/* Enable interrupt handling for interrupt IRQ.  */
+extern void gbus_int_enable_irq (unsigned irq);
+/* Disable interrupt handling for interrupt IRQ.  Note that any
+   interrupts received while disabled will be delivered once the
+   interrupt is enabled again, unless they are explicitly cleared using
+   `gbus_int_clear_pending_irq'.  */
+extern void gbus_int_disable_irq (unsigned irq);
+/* Return true if interrupt handling for interrupt IRQ is enabled.  */
+extern int gbus_int_irq_enabled (unsigned irq);
+/* Disable all GBUS irqs.  */
+extern void gbus_int_disable_irqs (void);
+/* Clear any pending interrupts for IRQ.  */
+extern void gbus_int_clear_pending_irq (unsigned irq);
+/* Return true if interrupt IRQ is pending (but disabled).  */
+extern int gbus_int_irq_pending (unsigned irq);
+
+
+struct gbus_int_irq_init {
+        const char *name;       /* name of interrupt type */
+
+        /* Range of kernel irq numbers for this type:
+           BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM  */
+        unsigned base, num, interval;
+
+        unsigned priority;      /* interrupt priority to assign */
+};
+struct hw_interrupt_type;       /* fwd decl */
+
+/* Initialize HW_IRQ_TYPES for GBUS irqs described in array
+   INITS (which is terminated by an entry with the name field == 0).  */
+extern void gbus_int_init_irq_types (struct gbus_int_irq_init *inits,
+                                     struct hw_interrupt_type *hw_irq_types);
+
+/* Initialize GBUS interrupts.  */
+extern void gbus_int_init_irqs (void);
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_GBUS_INT_H__ */
diff --git a/include/asm-v850/hardirq.h b/include/asm-v850/hardirq.h
new file mode 100644
index 000000000000..5dfca8047cbe
--- /dev/null
+++ b/include/asm-v850/hardirq.h
@@ -0,0 +1,25 @@
+#ifndef __V850_HARDIRQ_H__
+#define __V850_HARDIRQ_H__
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <linux/cache.h>
+
+typedef struct {
+        unsigned int __softirq_pending;
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
+
+#define HARDIRQ_BITS    8
+
+/*
+ * The hardirq mask has to be large enough to have
+ * space for potentially all IRQ sources in the system
+ * nesting on a single CPU:
+ */
+#if (1 << HARDIRQ_BITS) < NR_IRQS
+# error HARDIRQ_BITS is too low!
+#endif
+
+#endif /* __V850_HARDIRQ_H__ */
diff --git a/include/asm-v850/highres_timer.h b/include/asm-v850/highres_timer.h
new file mode 100644
index 000000000000..486fb49ceab6
--- /dev/null
+++ b/include/asm-v850/highres_timer.h
@@ -0,0 +1,44 @@
+/*
+ * include/asm-v850/highres_timer.h -- High resolution timing routines
+ *
+ *  Copyright (C) 2001,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_HIGHRES_TIMER_H__
+#define __V850_HIGHRES_TIMER_H__
+
+#ifndef __ASSEMBLY__
+#include <linux/time.h>
+#endif
+
+#include <asm/entry.h>
+
+
+/* Frequency of the `slow ticks' (one tick each time the fast-tick
+   counter overflows).  */
+#define HIGHRES_TIMER_SLOW_TICK_RATE    25
+
+/* Which timer in the V850E `Timer D' we use.  */
+#define HIGHRES_TIMER_TIMER_D_UNIT      3
+
+
+#ifndef __ASSEMBLY__
+
+extern void highres_timer_start (void), highres_timer_stop (void);
+extern void highres_timer_reset (void);
+extern void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks);
+extern void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks,
+                                            struct timeval *tv);
+extern void highres_timer_read (struct timeval *tv);
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_HIGHRES_TIMER_H__ */
diff --git a/include/asm-v850/hw_irq.h b/include/asm-v850/hw_irq.h
new file mode 100644
index 000000000000..4bdc98edb9f8
--- /dev/null
+++ b/include/asm-v850/hw_irq.h
@@ -0,0 +1,8 @@
+#ifndef __V850_HW_IRQ_H__
+#define __V850_HW_IRQ_H__
+
+extern inline void hw_resend_irq (struct hw_interrupt_type *h, unsigned int i)
+{
+}
+
+#endif /* __V850_HW_IRQ_H__ */
diff --git a/include/asm-v850/io.h b/include/asm-v850/io.h
new file mode 100644
index 000000000000..bb5efd1b4b7d
--- /dev/null
+++ b/include/asm-v850/io.h
@@ -0,0 +1,133 @@
+/*
+ * include/asm-v850/io.h -- Misc I/O operations
+ *
+ *  Copyright (C) 2001,02,03,04  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03,04  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_IO_H__
+#define __V850_IO_H__
+
+#define IO_SPACE_LIMIT 0xFFFFFFFF
+
+#define readb(addr) \
+  ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
+#define readw(addr) \
+  ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
+#define readl(addr) \
+  ({ unsigned long __v = (*(volatile unsigned long *) (addr)); __v; })
+
+#define readb_relaxed(a) readb(a)
+#define readw_relaxed(a) readw(a)
+#define readl_relaxed(a) readl(a)
+
+#define writeb(b, addr) \
+  (void)((*(volatile unsigned char *) (addr)) = (b))
+#define writew(b, addr) \
+  (void)((*(volatile unsigned short *) (addr)) = (b))
+#define writel(b, addr) \
+  (void)((*(volatile unsigned int *) (addr)) = (b))
+
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+
+#define inb(addr)       readb (addr)
+#define inw(addr)       readw (addr)
+#define inl(addr)       readl (addr)
+#define outb(x, addr)   ((void) writeb (x, addr))
+#define outw(x, addr)   ((void) writew (x, addr))
+#define outl(x, addr)   ((void) writel (x, addr))
+
+#define inb_p(port)             inb((port))
+#define outb_p(val, port)       outb((val), (port))
+#define inw_p(port)             inw((port))
+#define outw_p(val, port)       outw((val), (port))
+#define inl_p(port)             inl((port))
+#define outl_p(val, port)       outl((val), (port))
+
+static inline void insb (unsigned long port, void *dst, unsigned long count)
+{
+        unsigned char *p = dst;
+        while (count--)
+                *p++ = inb (port);
+}
+static inline void insw (unsigned long port, void *dst, unsigned long count)
+{
+        unsigned short *p = dst;
+        while (count--)
+                *p++ = inw (port);
+}
+static inline void insl (unsigned long port, void *dst, unsigned long count)
+{
+        unsigned long *p = dst;
+        while (count--)
+                *p++ = inl (port);
+}
+
+static inline void
+outsb (unsigned long port, const void *src, unsigned long count)
+{
+        const unsigned char *p = src;
+        while (count--)
+                outb (*p++, port);
+}
+static inline void
+outsw (unsigned long port, const void *src, unsigned long count)
+{
+        const unsigned short *p = src;
+        while (count--)
+                outw (*p++, port);
+}
+static inline void
+outsl (unsigned long port, const void *src, unsigned long count)
+{
+        const unsigned long *p = src;
+        while (count--)
+                outl (*p++, port);
+}
+
+#define iounmap(addr)                           ((void)0)
+#define ioremap(physaddr, size)                 (physaddr)
+#define ioremap_nocache(physaddr, size)         (physaddr)
+#define ioremap_writethrough(physaddr, size)    (physaddr)
+#define ioremap_fullcache(physaddr, size)       (physaddr)
+
+#define mmiowb()
+
+#define page_to_phys(page)      ((page - mem_map) << PAGE_SHIFT)
+#if 0
+/* This is really stupid; don't define it.  */
+#define page_to_bus(page)       page_to_phys (page)
+#endif
+
+/* Conversion between virtual and physical mappings.  */
+#define mm_ptov(addr)           ((void *)__phys_to_virt (addr))
+#define mm_vtop(addr)           ((unsigned long)__virt_to_phys (addr))
+#define phys_to_virt(addr)      ((void *)__phys_to_virt (addr))
+#define virt_to_phys(addr)      ((unsigned long)__virt_to_phys (addr))
+
+#define memcpy_fromio(dst, src, len) memcpy (dst, (void *)src, len)
+#define memcpy_toio(dst, src, len) memcpy ((void *)dst, src, len)
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p)    __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p)   p
+
+#endif /* __V850_IO_H__ */
diff --git a/include/asm-v850/ioctl.h b/include/asm-v850/ioctl.h
new file mode 100644
index 000000000000..1765df6c7b87
--- /dev/null
+++ b/include/asm-v850/ioctl.h
@@ -0,0 +1,80 @@
+/* $Id: ioctl.h,v 1.1 2002/09/28 14:58:41 gerg Exp $
+ *
+ * linux/ioctl.h for Linux by H.H. Bergman.
+ */
+
+#ifndef _V850_IOCTL_H
+#define _V850_IOCTL_H
+
+/* ioctl command encoding: 32 bits total, command in lower 16 bits,
+ * size of the parameter structure in the lower 14 bits of the
+ * upper 16 bits.
+ * Encoding the size of the parameter structure in the ioctl request
+ * is useful for catching programs compiled with old versions
+ * and to avoid overwriting user space outside the user buffer area.
+ * The highest 2 bits are reserved for indicating the ``access mode''.
+ * NOTE: This limits the max parameter size to 16kB -1 !
+ */
+
+/*
+ * I don't really have any idea about what this should look like, so
+ * for the time being, this is heavily based on the PC definitions.
+ */
+
+/*
+ * The following is for compatibility across the various Linux
+ * platforms.  The i386 ioctl numbering scheme doesn't really enforce
+ * a type field.  De facto, however, the top 8 bits of the lower 16
+ * bits are indeed used as a type field, so we might just as well make
+ * this explicit here.  Please be sure to use the decoding macros
+ * below from now on.
+ */
+#define _IOC_NRBITS     8
+#define _IOC_TYPEBITS   8
+#define _IOC_SIZEBITS   14
+#define _IOC_DIRBITS    2
+
+#define _IOC_NRMASK     ((1 << _IOC_NRBITS)-1)
+#define _IOC_TYPEMASK   ((1 << _IOC_TYPEBITS)-1)
+#define _IOC_SIZEMASK   ((1 << _IOC_SIZEBITS)-1)
+#define _IOC_DIRMASK    ((1 << _IOC_DIRBITS)-1)
+
+#define _IOC_NRSHIFT    0
+#define _IOC_TYPESHIFT  (_IOC_NRSHIFT+_IOC_NRBITS)
+#define _IOC_SIZESHIFT  (_IOC_TYPESHIFT+_IOC_TYPEBITS)
+#define _IOC_DIRSHIFT   (_IOC_SIZESHIFT+_IOC_SIZEBITS)
+
+/*
+ * Direction bits.
+ */
+#define _IOC_NONE       0U
+#define _IOC_WRITE      1U
+#define _IOC_READ       2U
+
+#define _IOC(dir,type,nr,size) \
+        (((dir)  << _IOC_DIRSHIFT) | \
+         ((type) << _IOC_TYPESHIFT) | \
+         ((nr)   << _IOC_NRSHIFT) | \
+         ((size) << _IOC_SIZESHIFT))
+
+/* used to create numbers */
+#define _IO(type,nr)            _IOC(_IOC_NONE,(type),(nr),0)
+#define _IOR(type,nr,size)      _IOC(_IOC_READ,(type),(nr),sizeof(size))
+#define _IOW(type,nr,size)      _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
+#define _IOWR(type,nr,size)     _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
+
+/* used to decode ioctl numbers.. */
+#define _IOC_DIR(nr)            (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
+#define _IOC_TYPE(nr)           (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
+#define _IOC_NR(nr)             (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
+#define _IOC_SIZE(nr)           (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
+
+/* ...and for the drivers/sound files... */
+
+#define IOC_IN          (_IOC_WRITE << _IOC_DIRSHIFT)
+#define IOC_OUT         (_IOC_READ << _IOC_DIRSHIFT)
+#define IOC_INOUT       ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
+#define IOCSIZE_MASK    (_IOC_SIZEMASK << _IOC_SIZESHIFT)
+#define IOCSIZE_SHIFT   (_IOC_SIZESHIFT)
+
+#endif /* __V850_IOCTL_H__ */
diff --git a/include/asm-v850/ioctls.h b/include/asm-v850/ioctls.h
new file mode 100644
index 000000000000..05c0dc9ce1ea
--- /dev/null
+++ b/include/asm-v850/ioctls.h
@@ -0,0 +1,80 @@
+#ifndef __V850_IOCTLS_H__
+#define __V850_IOCTLS_H__
+
+#include <asm/ioctl.h>
+
+/* 0x54 is just a magic number to make these relatively unique ('T') */
+
+#define TCGETS          0x5401
+#define TCSETS          0x5402
+#define TCSETSW         0x5403
+#define TCSETSF         0x5404
+#define TCGETA          0x5405
+#define TCSETA          0x5406
+#define TCSETAW         0x5407
+#define TCSETAF         0x5408
+#define TCSBRK          0x5409
+#define TCXONC          0x540A
+#define TCFLSH          0x540B
+#define TIOCEXCL        0x540C
+#define TIOCNXCL        0x540D
+#define TIOCSCTTY       0x540E
+#define TIOCGPGRP       0x540F
+#define TIOCSPGRP       0x5410
+#define TIOCOUTQ        0x5411
+#define TIOCSTI         0x5412
+#define TIOCGWINSZ      0x5413
+#define TIOCSWINSZ      0x5414
+#define TIOCMGET        0x5415
+#define TIOCMBIS        0x5416
+#define TIOCMBIC        0x5417
+#define TIOCMSET        0x5418
+#define TIOCGSOFTCAR    0x5419
+#define TIOCSSOFTCAR    0x541A
+#define FIONREAD        0x541B
+#define TIOCINQ         FIONREAD
+#define TIOCLINUX       0x541C
+#define TIOCCONS        0x541D
+#define TIOCGSERIAL     0x541E
+#define TIOCSSERIAL     0x541F
+#define TIOCPKT         0x5420
+#define FIONBIO         0x5421
+#define TIOCNOTTY       0x5422
+#define TIOCSETD        0x5423
+#define TIOCGETD        0x5424
+#define TCSBRKP         0x5425  /* Needed for POSIX tcsendbreak() */
+#define TIOCSBRK        0x5427  /* BSD compatibility */
+#define TIOCCBRK        0x5428  /* BSD compatibility */
+#define TIOCGSID        0x5429  /* Return the session ID of FD */
+#define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
+#define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
+
+#define FIONCLEX        0x5450  /* these numbers need to be adjusted. */
+#define FIOCLEX         0x5451
+#define FIOASYNC        0x5452
+#define TIOCSERCONFIG   0x5453
+#define TIOCSERGWILD    0x5454
+#define TIOCSERSWILD    0x5455
+#define TIOCGLCKTRMIOS  0x5456
+#define TIOCSLCKTRMIOS  0x5457
+#define TIOCSERGSTRUCT  0x5458 /* For debugging only */
+#define TIOCSERGETLSR   0x5459 /* Get line status register */
+#define TIOCSERGETMULTI 0x545A /* Get multiport config  */
+#define TIOCSERSETMULTI 0x545B /* Set multiport config */
+
+#define TIOCMIWAIT      0x545C  /* wait for a change on serial input line(s) */
+#define TIOCGICOUNT     0x545D  /* read serial port inline interrupt counts */
+#define FIOQSIZE        0x545E
+
+/* Used for packet mode */
+#define TIOCPKT_DATA             0
+#define TIOCPKT_FLUSHREAD        1
+#define TIOCPKT_FLUSHWRITE       2
+#define TIOCPKT_STOP             4
+#define TIOCPKT_START            8
+#define TIOCPKT_NOSTOP          16
+#define TIOCPKT_DOSTOP          32
+
+#define TIOCSER_TEMT    0x01    /* Transmitter physically empty */
+
+#endif /* __V850_IOCTLS_H__ */
diff --git a/include/asm-v850/ipc.h b/include/asm-v850/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/include/asm-v850/ipc.h
@@ -0,0 +1 @@
+#include <asm-generic/ipc.h>
diff --git a/include/asm-v850/ipcbuf.h b/include/asm-v850/ipcbuf.h
new file mode 100644
index 000000000000..d8cbe9886d95
--- /dev/null
+++ b/include/asm-v850/ipcbuf.h
@@ -0,0 +1,29 @@
+#ifndef __V850E_IPCBUF_H__
+#define __V850E_IPCBUF_H__
+
+/*
+ * The user_ipc_perm structure for v850e architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 32-bit mode_t and seq
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct ipc64_perm
+{
+        __kernel_key_t          key;
+        __kernel_uid32_t        uid;
+        __kernel_gid32_t        gid;
+        __kernel_uid32_t        cuid;
+        __kernel_gid32_t        cgid;
+        __kernel_mode_t         mode;
+        unsigned short          __pad1;
+        unsigned short          seq;
+        unsigned short          __pad2;
+        unsigned long           __unused1;
+        unsigned long           __unused2;
+};
+
+#endif /* __V850E_IPCBUF_H__ */
diff --git a/include/asm-v850/irq.h b/include/asm-v850/irq.h
new file mode 100644
index 000000000000..44431152b36d
--- /dev/null
+++ b/include/asm-v850/irq.h
@@ -0,0 +1,69 @@
+/*
+ * include/asm-v850/irq.h -- Machine interrupt handling
+ *
+ *  Copyright (C) 2001,02,04  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,04  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_IRQ_H__
+#define __V850_IRQ_H__
+
+#include <asm/machdep.h>
+
+/* Default NUM_MACH_IRQS.  */
+#ifndef NUM_MACH_IRQS
+#define NUM_MACH_IRQS   NUM_CPU_IRQS
+#endif
+
+/* NMIs have IRQ numbers from FIRST_NMI to FIRST_NMI+NUM_NMIS-1.  */
+#define FIRST_NMI       NUM_MACH_IRQS
+#define IRQ_NMI(n)      (FIRST_NMI + (n))
+/* v850 processors have 3 non-maskable interrupts.  */
+#define NUM_NMIS        3
+
+/* Includes both maskable and non-maskable irqs.  */
+#define NR_IRQS         (NUM_MACH_IRQS + NUM_NMIS)
+
+
+#ifndef __ASSEMBLY__
+
+struct pt_regs;
+struct hw_interrupt_type;
+struct irqaction;
+
+#define irq_canonicalize(irq)   (irq)
+
+/* Initialize irq handling for IRQs.
+   BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL
+   to IRQ_TYPE.  An IRQ_TYPE of 0 means to use a generic interrupt type.  */
+extern void
+init_irq_handlers (int base_irq, int num, int interval,
+                   struct hw_interrupt_type *irq_type);
+
+typedef void (*irq_handler_t)(int irq, void *data, struct pt_regs *regs);
+
+/* Handle interrupt IRQ.  REGS are the registers at the time of ther
+   interrupt.  */
+extern unsigned int handle_irq (int irq, struct pt_regs *regs);
+
+
+/* Enable interrupt handling on an irq.  */
+extern void enable_irq(unsigned int irq);
+
+/* Disable an irq and wait for completion.  */
+extern void disable_irq (unsigned int irq);
+
+/* Disable an irq without waiting. */
+extern void disable_irq_nosync (unsigned int irq);
+
+extern int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __V850_IRQ_H__ */
diff --git a/include/asm-v850/kmap_types.h b/include/asm-v850/kmap_types.h
new file mode 100644
index 000000000000..3288976b161f
--- /dev/null
+++ b/include/asm-v850/kmap_types.h
@@ -0,0 +1,19 @@
+#ifndef __V850_KMAP_TYPES_H__
+#define __V850_KMAP_TYPES_H__
+
+enum km_type {
+        KM_BOUNCE_READ,
+        KM_SKB_SUNRPC_DATA,
+        KM_SKB_DATA_SOFTIRQ,
+        KM_USER0,
+        KM_USER1,
+        KM_BIO_SRC_IRQ,
+        KM_BIO_DST_IRQ,
+        KM_PTE0,
+        KM_PTE1,
+        KM_IRQ0,
+        KM_IRQ1,
+        KM_TYPE_NR
+};
+
+#endif /* __V850_KMAP_TYPES_H__ */
diff --git a/include/asm-v850/linkage.h b/include/asm-v850/linkage.h
new file mode 100644
index 000000000000..291c2d01c44f
--- /dev/null
+++ b/include/asm-v850/linkage.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+/* Nothing to see here... */
+
+#endif
diff --git a/include/asm-v850/local.h b/include/asm-v850/local.h
new file mode 100644
index 000000000000..705148abe276
--- /dev/null
+++ b/include/asm-v850/local.h
@@ -0,0 +1,6 @@
+#ifndef __V850_LOCAL_H__
+#define __V850_LOCAL_H__
+
+#include <asm-generic/local.h>
+
+#endif /* __V850_LOCAL_H__ */
diff --git a/include/asm-v850/ma.h b/include/asm-v850/ma.h
new file mode 100644
index 000000000000..89e66473a176
--- /dev/null
+++ b/include/asm-v850/ma.h
@@ -0,0 +1,101 @@
+/*
+ * include/asm-v850/ma.h -- V850E/MA series of cpu chips
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_MA_H__
+#define __V850_MA_H__
+
+/* The MA series uses the V850E cpu core.  */
+#include <asm/v850e.h>
+
+
+/* For <asm/entry.h> */
+/* We use on-chip RAM, for a few miscellaneous variables that must be
+   accessible using a load instruction relative to R0.  The amount
+   varies between chip models, but there's always at least 4K, and it
+   should always start at FFFFC000.  */
+#define R0_RAM_ADDR                     0xFFFFC000
+
+
+/* MA series UART details.  */
+#define V850E_UART_BASE_FREQ            CPU_CLOCK_FREQ
+
+/* This is a function that gets called before configuring the UART.  */
+#define V850E_UART_PRE_CONFIGURE        ma_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void ma_uart_pre_configure (unsigned chan,
+                                   unsigned cflags, unsigned baud);
+#endif
+
+
+/* MA series timer C details.  */
+#define V850E_TIMER_C_BASE_ADDR         0xFFFFF600
+
+
+/* MA series timer D details.  */
+#define V850E_TIMER_D_BASE_ADDR         0xFFFFF540
+#define V850E_TIMER_D_TMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x0)
+#define V850E_TIMER_D_CMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x2)
+#define V850E_TIMER_D_TMCD_BASE_ADDR    (V850E_TIMER_D_BASE_ADDR + 0x4)
+
+#define V850E_TIMER_D_BASE_FREQ         CPU_CLOCK_FREQ
+
+
+/* Port 0 */
+/* Direct I/O.  Bits 0-7 are pins P00-P07.  */
+#define MA_PORT0_IO_ADDR                0xFFFFF400
+#define MA_PORT0_IO                     (*(volatile u8 *)MA_PORT0_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define MA_PORT0_PM_ADDR                0xFFFFF420
+#define MA_PORT0_PM                     (*(volatile u8 *)MA_PORT0_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define MA_PORT0_PMC_ADDR               0xFFFFF440
+#define MA_PORT0_PMC                    (*(volatile u8 *)MA_PORT0_PMC_ADDR)
+/* Port function control (for P04-P07, 0 = IRQ, 1 = DMARQ).  */
+#define MA_PORT0_PFC_ADDR               0xFFFFF460
+#define MA_PORT0_PFC                    (*(volatile u8 *)MA_PORT0_PFC_ADDR)
+
+/* Port 1 */
+/* Direct I/O.  Bits 0-3 are pins P10-P13.  */
+#define MA_PORT1_IO_ADDR                0xFFFFF402
+#define MA_PORT1_IO                     (*(volatile u8 *)MA_PORT1_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define MA_PORT1_PM_ADDR                0xFFFFF420
+#define MA_PORT1_PM                     (*(volatile u8 *)MA_PORT1_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define MA_PORT1_PMC_ADDR               0xFFFFF442
+#define MA_PORT1_PMC                    (*(volatile u8 *)MA_PORT1_PMC_ADDR)
+
+/* Port 4 */
+/* Direct I/O.  Bits 0-5 are pins P40-P45.  */
+#define MA_PORT4_IO_ADDR                0xFFFFF408
+#define MA_PORT4_IO                     (*(volatile u8 *)MA_PORT4_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define MA_PORT4_PM_ADDR                0xFFFFF428
+#define MA_PORT4_PM                     (*(volatile u8 *)MA_PORT4_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define MA_PORT4_PMC_ADDR               0xFFFFF448
+#define MA_PORT4_PMC                    (*(volatile u8 *)MA_PORT4_PMC_ADDR)
+/* Port function control (for serial interfaces, 0 = CSI, 1 = UART).  */
+#define MA_PORT4_PFC_ADDR               0xFFFFF468
+#define MA_PORT4_PFC                    (*(volatile u8 *)MA_PORT4_PFC_ADDR)
+
+
+#ifndef __ASSEMBLY__
+
+/* Initialize MA chip interrupts.  */
+extern void ma_init_irqs (void);
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_MA_H__ */
diff --git a/include/asm-v850/ma1.h b/include/asm-v850/ma1.h
new file mode 100644
index 000000000000..ede1f1de2b7a
--- /dev/null
+++ b/include/asm-v850/ma1.h
@@ -0,0 +1,50 @@
+/*
+ * include/asm-v850/ma1.h -- V850E/MA1 cpu chip
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_MA1_H__
+#define __V850_MA1_H__
+
+/* Inherit more generic details from MA series.  */
+#include <asm/ma.h>
+
+
+#define CPU_MODEL       "v850e/ma1"
+#define CPU_MODEL_LONG  "NEC V850E/MA1"
+
+
+/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).  */
+#define IRQ_INTOV(n)    (n)     /* 0-3 */
+#define IRQ_INTOV_NUM   4
+#define IRQ_INTP(n)     (0x4  + (n)) /* Pnnn (pin) interrupts */
+#define IRQ_INTP_NUM    24
+#define IRQ_INTCMD(n)   (0x1c + (n)) /* interval timer interrupts 0-3 */
+#define IRQ_INTCMD_NUM  4
+#define IRQ_INTDMA(n)   (0x20 + (n)) /* DMA interrupts 0-3 */
+#define IRQ_INTDMA_NUM  4
+#define IRQ_INTCSI(n)   (0x24 + (n)*4)/* CSI 0-2 transmit/receive completion */
+#define IRQ_INTCSI_NUM  3
+#define IRQ_INTSER(n)   (0x25 + (n)*4) /* UART 0-2 reception error */
+#define IRQ_INTSER_NUM  3
+#define IRQ_INTSR(n)    (0x26 + (n)*4) /* UART 0-2 reception completion */
+#define IRQ_INTSR_NUM   3
+#define IRQ_INTST(n)    (0x27 + (n)*4) /* UART 0-2 transmission completion */
+#define IRQ_INTST_NUM   3
+
+#define NUM_CPU_IRQS    0x30
+
+
+/* The MA1 has a UART with 3 channels.  */
+#define V850E_UART_NUM_CHANNELS 3
+
+
+#endif /* __V850_MA1_H__ */
diff --git a/include/asm-v850/machdep.h b/include/asm-v850/machdep.h
new file mode 100644
index 000000000000..98d8bf63970e
--- /dev/null
+++ b/include/asm-v850/machdep.h
@@ -0,0 +1,61 @@
+/*
+ * include/asm-v850/machdep.h -- Machine-dependent definitions
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_MACHDEP_H__
+#define __V850_MACHDEP_H__
+
+#include <linux/config.h>
+
+/* chips */
+#ifdef CONFIG_V850E_MA1
+#include <asm/ma1.h>
+#endif
+#ifdef CONFIG_V850E_ME2
+#include <asm/me2.h>
+#endif
+#ifdef CONFIG_V850E_TEG
+#include <asm/teg.h>
+#endif
+
+/* These are both chips _and_ platforms, so put them in the middle... */
+#ifdef CONFIG_V850E2_ANNA
+#include <asm/anna.h>
+#endif
+#ifdef CONFIG_V850E_AS85EP1
+#include <asm/as85ep1.h>
+#endif
+
+/* platforms */
+#ifdef CONFIG_RTE_CB_MA1
+#include <asm/rte_ma1_cb.h>
+#endif
+#ifdef CONFIG_RTE_CB_ME2
+#include <asm/rte_me2_cb.h>
+#endif
+#ifdef CONFIG_RTE_CB_NB85E
+#include <asm/rte_nb85e_cb.h>
+#endif
+#ifdef CONFIG_V850E_SIM
+#include <asm/sim.h>
+#endif
+#ifdef CONFIG_V850E2_SIM85E2C
+#include <asm/sim85e2c.h>
+#endif
+#ifdef CONFIG_V850E2_SIM85E2S
+#include <asm/sim85e2s.h>
+#endif
+#ifdef CONFIG_V850E2_FPGA85E2C
+#include <asm/fpga85e2c.h>
+#endif
+
+#endif /* __V850_MACHDEP_H__ */
diff --git a/include/asm-v850/macrology.h b/include/asm-v850/macrology.h
new file mode 100644
index 000000000000..37abf874832c
--- /dev/null
+++ b/include/asm-v850/macrology.h
@@ -0,0 +1,17 @@
+/*
+ * include/asm-v850/macrology.h -- Various useful CPP macros
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#define macrology_paste(arg1, arg2)     macrology_paste_1(arg1, arg2)
+#define macrology_paste_1(arg1, arg2)   arg1 ## arg2
+#define macrology_stringify(sym)        macrology_stringify_1(sym)
+#define macrology_stringify_1(sym)      #sym
diff --git a/include/asm-v850/me2.h b/include/asm-v850/me2.h
new file mode 100644
index 000000000000..ac7c9ce0bdc1
--- /dev/null
+++ b/include/asm-v850/me2.h
@@ -0,0 +1,182 @@
+/*
+ * include/asm-v850/me2.h -- V850E/ME2 cpu chip
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_ME2_H__
+#define __V850_ME2_H__
+
+#include <asm/v850e.h>
+#include <asm/v850e_cache.h>
+
+
+#define CPU_MODEL       "v850e/me2"
+#define CPU_MODEL_LONG  "NEC V850E/ME2"
+
+
+/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).  */
+#define IRQ_INTP(n)       (n) /* Pnnn (pin) interrupts */
+#define IRQ_INTP_NUM      31
+#define IRQ_INTCMD(n)     (0x31 + (n)) /* interval timer interrupts 0-3 */
+#define IRQ_INTCMD_NUM    4
+#define IRQ_INTDMA(n)     (0x41 + (n)) /* DMA interrupts 0-3 */
+#define IRQ_INTDMA_NUM    4
+#define IRQ_INTUBTIRE(n)  (0x49 + (n)*5)/* UARTB 0-1 reception error */
+#define IRQ_INTUBTIRE_NUM 2
+#define IRQ_INTUBTIR(n)   (0x4a + (n)*5) /* UARTB 0-1 reception complete */
+#define IRQ_INTUBTIR_NUM  2
+#define IRQ_INTUBTIT(n)   (0x4b + (n)*5) /* UARTB 0-1 transmission complete */
+#define IRQ_INTUBTIT_NUM  2
+#define IRQ_INTUBTIF(n)   (0x4c + (n)*5) /* UARTB 0-1 FIFO trans. complete */
+#define IRQ_INTUBTIF_NUM  2
+#define IRQ_INTUBTITO(n)  (0x4d + (n)*5) /* UARTB 0-1 reception timeout */
+#define IRQ_INTUBTITO_NUM 2
+
+/* For <asm/irq.h> */
+#define NUM_CPU_IRQS            0x59 /* V850E/ME2 */
+
+
+/* For <asm/entry.h> */
+/* We use on-chip RAM, for a few miscellaneous variables that must be
+   accessible using a load instruction relative to R0.  */
+#define R0_RAM_ADDR                     0xFFFFB000 /* V850E/ME2 */
+
+
+/* V850E/ME2 UARTB details.*/
+#define V850E_UART_NUM_CHANNELS         2
+#define V850E_UARTB_BASE_FREQ           (CPU_CLOCK_FREQ / 4)
+
+/* This is a function that gets called before configuring the UART.  */
+#define V850E_UART_PRE_CONFIGURE        me2_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void me2_uart_pre_configure (unsigned chan,
+                                    unsigned cflags, unsigned baud);
+#endif /* __ASSEMBLY__ */
+
+
+/* V850E/ME2 timer C details.  */
+#define V850E_TIMER_C_BASE_ADDR         0xFFFFF600
+
+
+/* V850E/ME2 timer D details.  */
+#define V850E_TIMER_D_BASE_ADDR         0xFFFFF540
+#define V850E_TIMER_D_TMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x0)
+#define V850E_TIMER_D_CMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x2)
+#define V850E_TIMER_D_TMCD_BASE_ADDR    (V850E_TIMER_D_BASE_ADDR + 0x4)
+
+#define V850E_TIMER_D_BASE_FREQ         (CPU_CLOCK_FREQ / 2)
+
+
+/* Select iRAM mode.  */
+#define ME2_IRAMM_ADDR                  0xFFFFF80A
+#define ME2_IRAMM                       (*(volatile u8*)ME2_IRAMM_ADDR)
+
+
+/* Interrupt edge-detection configuration.  INTF(n) and INTR(n) are only
+   valid for n == 1, 2, or 5.  */
+#define ME2_INTF_ADDR(n)                (0xFFFFFC00 + (n) * 0x2)
+#define ME2_INTF(n)                     (*(volatile u8*)ME2_INTF_ADDR(n))
+#define ME2_INTR_ADDR(n)                (0xFFFFFC20 + (n) * 0x2)
+#define ME2_INTR(n)                     (*(volatile u8*)ME2_INTR_ADDR(n))
+#define ME2_INTFAL_ADDR                 0xFFFFFC10
+#define ME2_INTFAL                      (*(volatile u8*)ME2_INTFAL_ADDR)
+#define ME2_INTRAL_ADDR                 0xFFFFFC30
+#define ME2_INTRAL                      (*(volatile u8*)ME2_INTRAL_ADDR)
+#define ME2_INTFDH_ADDR                 0xFFFFFC16
+#define ME2_INTFDH                      (*(volatile u16*)ME2_INTFDH_ADDR)
+#define ME2_INTRDH_ADDR                 0xFFFFFC36
+#define ME2_INTRDH                      (*(volatile u16*)ME2_INTRDH_ADDR)
+#define ME2_SESC_ADDR(n)                (0xFFFFF609 + (n) * 0x10)
+#define ME2_SESC(n)                     (*(volatile u8*)ME2_SESC_ADDR(n))
+#define ME2_SESA10_ADDR                 0xFFFFF5AD
+#define ME2_SESA10                      (*(volatile u8*)ME2_SESA10_ADDR)
+#define ME2_SESA11_ADDR                 0xFFFFF5DD
+#define ME2_SESA11                      (*(volatile u8*)ME2_SESA11_ADDR)
+
+
+/* Port 1 */
+/* Direct I/O.  Bits 0-3 are pins P10-P13.  */
+#define ME2_PORT1_IO_ADDR               0xFFFFF402
+#define ME2_PORT1_IO                    (*(volatile u8 *)ME2_PORT1_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define ME2_PORT1_PM_ADDR               0xFFFFF422
+#define ME2_PORT1_PM                    (*(volatile u8 *)ME2_PORT1_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define ME2_PORT1_PMC_ADDR              0xFFFFF442
+#define ME2_PORT1_PMC                   (*(volatile u8 *)ME2_PORT1_PMC_ADDR)
+/* Port function control (for serial interfaces, 0 = CSI30, 1 = UARTB0 ).  */
+#define ME2_PORT1_PFC_ADDR              0xFFFFF462
+#define ME2_PORT1_PFC                   (*(volatile u8 *)ME2_PORT1_PFC_ADDR)
+
+/* Port 2 */
+/* Direct I/O.  Bits 0-3 are pins P20-P25.  */
+#define ME2_PORT2_IO_ADDR               0xFFFFF404
+#define ME2_PORT2_IO                    (*(volatile u8 *)ME2_PORT2_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define ME2_PORT2_PM_ADDR               0xFFFFF424
+#define ME2_PORT2_PM                    (*(volatile u8 *)ME2_PORT2_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define ME2_PORT2_PMC_ADDR              0xFFFFF444
+#define ME2_PORT2_PMC                   (*(volatile u8 *)ME2_PORT2_PMC_ADDR)
+/* Port function control (for serial interfaces, 0 = INTP2x, 1 = UARTB1 ).  */
+#define ME2_PORT2_PFC_ADDR              0xFFFFF464
+#define ME2_PORT2_PFC                   (*(volatile u8 *)ME2_PORT2_PFC_ADDR)
+
+/* Port 5 */
+/* Direct I/O.  Bits 0-5 are pins P50-P55.  */
+#define ME2_PORT5_IO_ADDR               0xFFFFF40A
+#define ME2_PORT5_IO                    (*(volatile u8 *)ME2_PORT5_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define ME2_PORT5_PM_ADDR               0xFFFFF42A
+#define ME2_PORT5_PM                    (*(volatile u8 *)ME2_PORT5_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define ME2_PORT5_PMC_ADDR              0xFFFFF44A
+#define ME2_PORT5_PMC                   (*(volatile u8 *)ME2_PORT5_PMC_ADDR)
+/* Port function control ().  */
+#define ME2_PORT5_PFC_ADDR              0xFFFFF46A
+#define ME2_PORT5_PFC                   (*(volatile u8 *)ME2_PORT5_PFC_ADDR)
+
+/* Port 6 */
+/* Direct I/O.  Bits 5-7 are pins P65-P67.  */
+#define ME2_PORT6_IO_ADDR               0xFFFFF40C
+#define ME2_PORT6_IO                    (*(volatile u8 *)ME2_PORT6_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define ME2_PORT6_PM_ADDR               0xFFFFF42C
+#define ME2_PORT6_PM                    (*(volatile u8 *)ME2_PORT6_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define ME2_PORT6_PMC_ADDR              0xFFFFF44C
+#define ME2_PORT6_PMC                   (*(volatile u8 *)ME2_PORT6_PMC_ADDR)
+/* Port function control ().  */
+#define ME2_PORT6_PFC_ADDR              0xFFFFF46C
+#define ME2_PORT6_PFC                   (*(volatile u8 *)ME2_PORT6_PFC_ADDR)
+
+/* Port 7 */
+/* Direct I/O.  Bits 2-7 are pins P72-P77.  */
+#define ME2_PORT7_IO_ADDR               0xFFFFF40E
+#define ME2_PORT7_IO                    (*(volatile u8 *)ME2_PORT7_IO_ADDR)
+/* Port mode (for direct I/O, 0 = output, 1 = input).  */
+#define ME2_PORT7_PM_ADDR               0xFFFFF42E
+#define ME2_PORT7_PM                    (*(volatile u8 *)ME2_PORT7_PM_ADDR)
+/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode).  */
+#define ME2_PORT7_PMC_ADDR              0xFFFFF44E
+#define ME2_PORT7_PMC                   (*(volatile u8 *)ME2_PORT7_PMC_ADDR)
+/* Port function control ().  */
+#define ME2_PORT7_PFC_ADDR              0xFFFFF46E
+#define ME2_PORT7_PFC                   (*(volatile u8 *)ME2_PORT7_PFC_ADDR)
+
+
+#ifndef __ASSEMBLY__
+/* Initialize V850E/ME2 chip interrupts.  */
+extern void me2_init_irqs (void);
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_ME2_H__ */
diff --git a/include/asm-v850/mman.h b/include/asm-v850/mman.h
new file mode 100644
index 000000000000..e2b90081b56f
--- /dev/null
+++ b/include/asm-v850/mman.h
@@ -0,0 +1,40 @@
+#ifndef __V850_MMAN_H__
+#define __V850_MMAN_H__
+
+#define PROT_READ       0x1             /* page can be read */
+#define PROT_WRITE      0x2             /* page can be written */
+#define PROT_EXEC       0x4             /* page can be executed */
+#define PROT_NONE       0x0             /* page can not be accessed */
+#define PROT_GROWSDOWN  0x01000000      /* mprotect flag: extend change to start of growsdown vma */
+#define PROT_GROWSUP    0x02000000      /* mprotect flag: extend change to end of growsup vma */
+
+#define MAP_SHARED      0x01            /* Share changes */
+#define MAP_PRIVATE     0x02            /* Changes are private */
+#define MAP_TYPE        0x0f            /* Mask for type of mapping */
+#define MAP_FIXED       0x10            /* Interpret addr exactly */
+#define MAP_ANONYMOUS   0x20            /* don't use a file */
+
+#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
+#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
+#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
+#define MAP_LOCKED      0x2000          /* pages are locked */
+#define MAP_NORESERVE   0x4000          /* don't check for reservations */
+
+#define MS_ASYNC        1               /* sync memory asynchronously */
+#define MS_INVALIDATE   2               /* invalidate the caches */
+#define MS_SYNC         4               /* synchronous memory sync */
+
+#define MCL_CURRENT     1               /* lock all current mappings */
+#define MCL_FUTURE      2               /* lock all future mappings */
+
+#define MADV_NORMAL     0x0             /* default page-in behavior */
+#define MADV_RANDOM     0x1             /* page-in minimum required */
+#define MADV_SEQUENTIAL 0x2             /* read-ahead aggressively */
+#define MADV_WILLNEED   0x3             /* pre-fault pages */
+#define MADV_DONTNEED   0x4             /* discard these pages */
+
+/* compatibility flags */
+#define MAP_ANON        MAP_ANONYMOUS
+#define MAP_FILE        0
+
+#endif /* __V850_MMAN_H__ */
diff --git a/include/asm-v850/mmu.h b/include/asm-v850/mmu.h
new file mode 100644
index 000000000000..e30a52becfd6
--- /dev/null
+++ b/include/asm-v850/mmu.h
@@ -0,0 +1,22 @@
+/* Copyright (C) 2002, David McCullough <davidm@snapgear.com> */
+
+#ifndef __V850_MMU_H__
+#define __V850_MMU_H__
+
+struct mm_rblock_struct {
+        int             size;
+        int             refcount;
+        void    *kblock;
+};
+
+struct mm_tblock_struct {
+        struct mm_rblock_struct *rblock;
+        struct mm_tblock_struct *next;
+};
+
+typedef struct {
+        struct mm_tblock_struct tblock;
+        unsigned long                   end_brk;
+} mm_context_t;
+
+#endif /* __V850_MMU_H__ */
diff --git a/include/asm-v850/mmu_context.h b/include/asm-v850/mmu_context.h
new file mode 100644
index 000000000000..f521c8050d3c
--- /dev/null
+++ b/include/asm-v850/mmu_context.h
@@ -0,0 +1,11 @@
+#ifndef __V850_MMU_CONTEXT_H__
+#define __V850_MMU_CONTEXT_H__
+
+#define destroy_context(mm)             ((void)0)
+#define init_new_context(tsk,mm)        0
+#define switch_mm(prev,next,tsk)        ((void)0)
+#define deactivate_mm(tsk,mm)           do { } while (0)
+#define activate_mm(prev,next)          ((void)0)
+#define enter_lazy_tlb(mm,tsk)          ((void)0)
+
+#endif /* __V850_MMU_CONTEXT_H__ */
diff --git a/include/asm-v850/module.h b/include/asm-v850/module.h
new file mode 100644
index 000000000000..2c2f4944f09f
--- /dev/null
+++ b/include/asm-v850/module.h
@@ -0,0 +1,62 @@
+/*
+ * include/asm-v850/module.h -- Architecture-specific module hooks
+ *
+ *  Copyright (C) 2001,02,03,04  NEC Corporation
+ *  Copyright (C) 2001,02,03,04  Miles Bader <miles@gnu.org>
+ *  Copyright (C) 2001,03  Rusty Russell
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ *
+ * Derived in part from include/asm-ppc/module.h
+ */
+
+#ifndef __V850_MODULE_H__
+#define __V850_MODULE_H__
+
+#define MODULE_SYMBOL_PREFIX "_"
+
+struct v850_plt_entry
+{
+        /* Indirect jump instruction sequence (6-byte mov + 2-byte jr).  */
+        unsigned long tramp[2];
+};
+
+struct mod_arch_specific
+{
+        /* Indices of PLT sections within module. */
+        unsigned int core_plt_section, init_plt_section;
+};
+
+#define Elf_Shdr Elf32_Shdr
+#define Elf_Sym Elf32_Sym
+#define Elf_Ehdr Elf32_Ehdr
+
+/* Make empty sections for module_frob_arch_sections to expand. */
+#ifdef MODULE
+asm(".section .plt,\"ax\",@nobits; .align 3; .previous");
+asm(".section .init.plt,\"ax\",@nobits; .align 3; .previous");
+#endif
+
+/* We don't do exception tables.  */
+struct exception_table_entry;
+static inline const struct exception_table_entry *
+search_extable(const struct exception_table_entry *first,
+               const struct exception_table_entry *last,
+               unsigned long value)
+{
+        return 0;
+}
+#define ARCH_HAS_SEARCH_EXTABLE
+static inline void
+sort_extable(struct exception_table_entry *start,
+             struct exception_table_entry *finish)
+{
+        /* nada */
+}
+#define ARCH_HAS_SORT_EXTABLE
+
+#endif /* __V850_MODULE_H__ */
diff --git a/include/asm-v850/msgbuf.h b/include/asm-v850/msgbuf.h
new file mode 100644
index 000000000000..ed07dbd01637
--- /dev/null
+++ b/include/asm-v850/msgbuf.h
@@ -0,0 +1,31 @@
+#ifndef __V850_MSGBUF_H__
+#define __V850_MSGBUF_H__
+
+/* 
+ * The msqid64_ds structure for v850 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct msqid64_ds {
+        struct ipc64_perm msg_perm;
+        __kernel_time_t msg_stime;      /* last msgsnd time */
+        unsigned long   __unused1;
+        __kernel_time_t msg_rtime;      /* last msgrcv time */
+        unsigned long   __unused2;
+        __kernel_time_t msg_ctime;      /* last change time */
+        unsigned long   __unused3;
+        unsigned long  msg_cbytes;      /* current number of bytes on queue */
+        unsigned long  msg_qnum;        /* number of messages in queue */
+        unsigned long  msg_qbytes;      /* max number of bytes on queue */
+        __kernel_pid_t msg_lspid;       /* pid of last msgsnd */
+        __kernel_pid_t msg_lrpid;       /* last receive pid */
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+#endif /* __V850_MSGBUF_H__ */
diff --git a/include/asm-v850/namei.h b/include/asm-v850/namei.h
new file mode 100644
index 000000000000..ee8339b23843
--- /dev/null
+++ b/include/asm-v850/namei.h
@@ -0,0 +1,17 @@
+/*
+ * linux/include/asm-v850/namei.h
+ *
+ * Included from linux/fs/namei.c
+ */
+
+#ifndef __V850_NAMEI_H__
+#define __V850_NAMEI_H__
+
+/* This dummy routine maybe changed to something useful
+ * for /usr/gnemul/ emulation stuff.
+ * Look at asm-sparc/namei.h for details.
+ */
+
+#define __emul_prefix() NULL
+
+#endif /* __V850_NAMEI_H__ */
diff --git a/include/asm-v850/page.h b/include/asm-v850/page.h
new file mode 100644
index 000000000000..06085b0c043e
--- /dev/null
+++ b/include/asm-v850/page.h
@@ -0,0 +1,146 @@
+/*
+ * include/asm-v850/page.h -- VM ops
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_PAGE_H__
+#define __V850_PAGE_H__
+
+#include <asm/machdep.h>
+
+
+#define PAGE_SHIFT      12
+#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_MASK       (~(PAGE_SIZE-1))
+
+
+/*
+ * PAGE_OFFSET -- the first address of the first page of memory. For archs with
+ * no MMU this corresponds to the first free page in physical memory (aligned
+ * on a page boundary).
+ */
+#ifndef PAGE_OFFSET
+#define PAGE_OFFSET  0x0000000
+#endif
+
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+#define STRICT_MM_TYPECHECKS
+
+#define clear_page(page)        memset ((void *)(page), 0, PAGE_SIZE)
+#define copy_page(to, from)     memcpy ((void *)(to), (void *)from, PAGE_SIZE)
+
+#define clear_user_page(addr, vaddr, page)      \
+        do {    clear_page(addr);               \
+                flush_dcache_page(page);        \
+        } while (0)
+#define copy_user_page(to, from, vaddr, page)   \
+        do {    copy_page(to, from);            \
+                flush_dcache_page(page);        \
+        } while (0)
+
+#ifdef STRICT_MM_TYPECHECKS
+/*
+ * These are used to make use of C type-checking..
+ */
+
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pmd; } pmd_t;
+typedef struct { unsigned long pgd; } pgd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+
+#define pte_val(x)      ((x).pte)
+#define pmd_val(x)      ((x).pmd)
+#define pgd_val(x)      ((x).pgd)
+#define pgprot_val(x)   ((x).pgprot)
+
+#define __pte(x)        ((pte_t) { (x) } )
+#define __pmd(x)        ((pmd_t) { (x) } )
+#define __pgd(x)        ((pgd_t) { (x) } )
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+
+#else /* !STRICT_MM_TYPECHECKS */
+/*
+ * .. while these make it easier on the compiler
+ */
+
+typedef unsigned long pte_t;
+typedef unsigned long pmd_t;
+typedef unsigned long pgd_t;
+typedef unsigned long pgprot_t;
+
+#define pte_val(x)      (x)
+#define pmd_val(x)      (x)
+#define pgd_val(x)      (x)
+#define pgprot_val(x)   (x)
+
+#define __pte(x)        (x)
+#define __pmd(x)        (x)
+#define __pgd(x)        (x)
+#define __pgprot(x)     (x)
+
+#endif /* STRICT_MM_TYPECHECKS */
+
+#endif /* !__ASSEMBLY__ */
+
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
+
+
+#ifndef __ASSEMBLY__
+
+/* Pure 2^n version of get_order */
+extern __inline__ int get_order (unsigned long size)
+{
+        int order;
+
+        size = (size-1) >> (PAGE_SHIFT-1);
+        order = -1;
+        do {
+                size >>= 1;
+                order++;
+        } while (size);
+        return order;
+}
+
+#endif /* !__ASSEMBLY__ */
+
+
+/* No current v850 processor has virtual memory.  */
+#define __virt_to_phys(addr)    (addr)
+#define __phys_to_virt(addr)    (addr)
+
+#define virt_to_pfn(kaddr)      (__virt_to_phys (kaddr) >> PAGE_SHIFT)
+#define pfn_to_virt(pfn)        __phys_to_virt ((pfn) << PAGE_SHIFT)
+
+#define MAP_NR(kaddr) \
+  (((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT)
+#define virt_to_page(kaddr)     (mem_map + MAP_NR (kaddr))
+#define page_to_virt(page) \
+  ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
+
+#define pfn_to_page(pfn)        virt_to_page (pfn_to_virt (pfn))
+#define page_to_pfn(page)       virt_to_pfn (page_to_virt (page))
+
+#define virt_addr_valid(kaddr)                                          \
+  (((void *)(kaddr) >= (void *)PAGE_OFFSET) && MAP_NR (kaddr) < max_mapnr)
+
+
+#define __pa(x)              __virt_to_phys ((unsigned long)(x))
+#define __va(x)              ((void *)__phys_to_virt ((unsigned long)(x)))
+
+
+#endif /* KERNEL */
+
+#endif /* __V850_PAGE_H__ */
diff --git a/include/asm-v850/param.h b/include/asm-v850/param.h
new file mode 100644
index 000000000000..8d796e4bff52
--- /dev/null
+++ b/include/asm-v850/param.h
@@ -0,0 +1,32 @@
+/*
+ * include/asm-v850/param.h -- Varions kernel parameters
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_PARAM_H__
+#define __V850_PARAM_H__
+
+#include <asm/machdep.h>        /* For HZ */
+
+#define EXEC_PAGESIZE   4096
+
+#ifndef NOGROUP
+#define NOGROUP         (-1)
+#endif
+
+#define MAXHOSTNAMELEN  64      /* max length of hostname */
+
+#ifdef __KERNEL__
+# define USER_HZ        100
+# define CLOCKS_PER_SEC USER_HZ
+#endif
+
+#endif /* __V850_PARAM_H__ */
diff --git a/include/asm-v850/pci.h b/include/asm-v850/pci.h
new file mode 100644
index 000000000000..e41941447b49
--- /dev/null
+++ b/include/asm-v850/pci.h
@@ -0,0 +1,88 @@
+/*
+ * include/asm-v850/pci.h -- PCI support
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_PCI_H__
+#define __V850_PCI_H__
+
+/* Get any platform-dependent definitions.  */
+#include <asm/machdep.h>
+
+#define pcibios_scan_all_fns(a, b)      0
+
+/* Generic declarations.  */
+
+struct scatterlist;
+
+extern void pcibios_set_master (struct pci_dev *dev);
+
+/* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA.  The
+   32-bit PCI bus mastering address to use is returned.  the device owns
+   this memory until either pci_unmap_single or pci_dma_sync_single_for_cpu is
+   performed.  */
+extern dma_addr_t
+pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir);
+
+/* Return to the CPU the PCI DMA memory block previously `granted' to
+   PDEV, at DMA_ADDR.  */
+extern void
+pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
+                  int dir);
+
+/* Make physical memory consistent for a single streaming mode DMA
+   translation after a transfer.
+
+   If you perform a pci_map_single() but wish to interrogate the
+   buffer using the cpu, yet do not wish to teardown the PCI dma
+   mapping, you must call this function before doing so.  At the next
+   point you give the PCI dma address back to the card, you must first
+   perform a pci_dma_sync_for_device, and then the device again owns
+   the buffer.  */
+extern void
+pci_dma_sync_single_for_cpu (struct pci_dev *dev, dma_addr_t dma_addr, size_t size,
+                     int dir);
+
+extern void
+pci_dma_sync_single_for_device (struct pci_dev *dev, dma_addr_t dma_addr, size_t size,
+                     int dir);
+
+
+/* Do multiple DMA mappings at once.  */
+extern int
+pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir);
+
+/* Unmap multiple DMA mappings at once.  */
+extern void
+pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,
+              int dir);
+
+/* Allocate and map kernel buffer using consistent mode DMA for PCI
+   device.  Returns non-NULL cpu-view pointer to the buffer if
+   successful and sets *DMA_ADDR to the pci side dma address as well,
+   else DMA_ADDR is undefined.  */
+extern void *
+pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr);
+
+/* Free and unmap a consistent DMA buffer.  CPU_ADDR and DMA_ADDR must
+   be values that were returned from pci_alloc_consistent.  SIZE must be
+   the same as what as passed into pci_alloc_consistent.  References to
+   the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past
+   this call are illegal.  */
+extern void
+pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr,
+                     dma_addr_t dma_addr);
+
+static inline void pcibios_add_platform_entries(struct pci_dev *dev)
+{
+}
+
+#endif /* __V850_PCI_H__ */
diff --git a/include/asm-v850/percpu.h b/include/asm-v850/percpu.h
new file mode 100644
index 000000000000..755ac6522b63
--- /dev/null
+++ b/include/asm-v850/percpu.h
@@ -0,0 +1,14 @@
+#ifndef __V850_PERCPU_H__
+#define __V850_PERCPU_H__
+
+#include <asm-generic/percpu.h>
+
+/* This is a stupid hack to satisfy some grotty implicit include-file
+   dependency; basically, <linux/smp.h> uses BUG_ON, which calls BUG, but
+   doesn't include the necessary headers to define it.  In the twisted
+   festering mess of includes this must all be resolved somehow on other
+   platforms, but I haven't the faintest idea how, and don't care; here will
+   do, even though doesn't actually make any sense.  */
+#include <asm/page.h>
+
+#endif /* __V850_PERCPU_H__ */
diff --git a/include/asm-v850/pgalloc.h b/include/asm-v850/pgalloc.h
new file mode 100644
index 000000000000..b91eb2d02bfd
--- /dev/null
+++ b/include/asm-v850/pgalloc.h
@@ -0,0 +1,22 @@
+/*
+ * include/asm-v850/pgalloc.h
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_PGALLOC_H__
+#define __V850_PGALLOC_H__
+
+#include <linux/mm.h>  /* some crap code expects this */
+
+/* ... and then, there was one.  */
+#define check_pgt_cache()       ((void)0)
+
+#endif /* __V850_PGALLOC_H__ */
diff --git a/include/asm-v850/pgtable.h b/include/asm-v850/pgtable.h
new file mode 100644
index 000000000000..76e380e481e9
--- /dev/null
+++ b/include/asm-v850/pgtable.h
@@ -0,0 +1,58 @@
+#ifndef __V850_PGTABLE_H__
+#define __V850_PGTABLE_H__
+
+#include <asm-generic/4level-fixup.h>
+
+#include <linux/config.h>
+#include <asm/page.h>
+
+
+#define pgd_present(pgd)        (1) /* pages are always present on NO_MM */
+#define pgd_none(pgd)           (0)
+#define pgd_bad(pgd)            (0)
+#define pgd_clear(pgdp)         ((void)0)
+
+#define pmd_offset(a, b)        ((void *)0)
+
+#define kern_addr_valid(addr)   (1)
+
+
+#define __swp_type(x)           (0)
+#define __swp_offset(x)         (0)
+#define __swp_entry(typ,off)    ((swp_entry_t) { ((typ) | ((off) << 7)) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
+
+
+/* These mean nothing to !CONFIG_MMU.  */
+#define PAGE_NONE               __pgprot(0)
+#define PAGE_SHARED             __pgprot(0)
+#define PAGE_COPY               __pgprot(0)
+#define PAGE_READONLY           __pgprot(0)
+#define PAGE_KERNEL             __pgprot(0)
+
+
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc.  When CONFIG_MMU is not defined, this
+ * should never actually be used, so just define it to something that's
+ * will hopefully cause a bus error if it is.
+ */
+#define ZERO_PAGE(vaddr)        ((void *)0x87654321)
+
+
+/* Some bogus code in procfs uses these; whatever.  */
+#define VMALLOC_START   0
+#define VMALLOC_END     (~0)
+
+
+extern void paging_init (void);
+#define swapper_pg_dir ((pgd_t *) 0)
+
+#define pgtable_cache_init()   ((void)0)
+
+
+extern unsigned int kobjsize(const void *objp);
+
+
+#endif /* __V850_PGTABLE_H__ */
diff --git a/include/asm-v850/poll.h b/include/asm-v850/poll.h
new file mode 100644
index 000000000000..0369562c7e15
--- /dev/null
+++ b/include/asm-v850/poll.h
@@ -0,0 +1,23 @@
+#ifndef __V850_POLL_H__
+#define __V850_POLL_H__
+
+#define POLLIN          0x0001
+#define POLLPRI         0x0002
+#define POLLOUT         0x0004
+#define POLLERR         0x0008
+#define POLLHUP         0x0010
+#define POLLNVAL        0x0020
+#define POLLRDNORM      0x0040
+#define POLLWRNORM      POLLOUT
+#define POLLRDBAND      0x0080
+#define POLLWRBAND      0x0100
+#define POLLMSG         0x0400
+#define POLLREMOVE      0x1000
+
+struct pollfd {
+        int fd;
+        short events;
+        short revents;
+};
+
+#endif /* __V850_POLL_H__ */
diff --git a/include/asm-v850/posix_types.h b/include/asm-v850/posix_types.h
new file mode 100644
index 000000000000..ccb7297a0edc
--- /dev/null
+++ b/include/asm-v850/posix_types.h
@@ -0,0 +1,76 @@
+/*
+ * include/asm-v850/posix_types.h -- Kernel versions of standard types
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_POSIX_TYPES_H__
+#define __V850_POSIX_TYPES_H__
+
+typedef unsigned long   __kernel_ino_t;
+typedef unsigned long long __kernel_ino64_t;
+typedef unsigned int    __kernel_mode_t;
+typedef unsigned int    __kernel_nlink_t;
+typedef long            __kernel_off_t;
+typedef long long       __kernel_loff_t;
+typedef int             __kernel_pid_t;
+typedef unsigned short  __kernel_ipc_pid_t;
+typedef unsigned int    __kernel_uid_t;
+typedef unsigned int    __kernel_gid_t;
+typedef unsigned int    __kernel_size_t;
+typedef int             __kernel_ssize_t;
+typedef int             __kernel_ptrdiff_t;
+typedef long            __kernel_time_t;
+typedef long            __kernel_suseconds_t;
+typedef long            __kernel_clock_t;
+typedef int             __kernel_timer_t;
+typedef int             __kernel_clockid_t;
+typedef int             __kernel_daddr_t;
+typedef char *          __kernel_caddr_t;
+typedef unsigned short  __kernel_uid16_t;
+typedef unsigned short  __kernel_gid16_t;
+typedef unsigned int    __kernel_uid32_t;
+typedef unsigned int    __kernel_gid32_t;
+
+/* Some bogus code depends on this; we don't care.  */
+typedef __kernel_uid_t __kernel_old_uid_t;
+typedef unsigned int    __kernel_old_dev_t;
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+        int     val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+        int     __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+/* We used to include <asm/bitops.h> here, which seems the right thing, but
+   it caused nasty include-file definition order problems.  Removing the
+   include seems to work, so fingers crossed...  */
+
+#undef  __FD_SET
+#define __FD_SET(fd, fd_set) \
+  __set_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
+#undef __FD_CLR
+#define __FD_CLR(fd, fd_set) \
+  __clear_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
+#undef  __FD_ISSET
+#define __FD_ISSET(fd, fd_set) \
+  __test_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
+#undef  __FD_ZERO
+#define __FD_ZERO(fd_set) \
+  memset (fd_set, 0, sizeof (*(fd_set *)fd_set))
+
+#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
+
+#endif /* __V850_POSIX_TYPES_H__ */
diff --git a/include/asm-v850/processor.h b/include/asm-v850/processor.h
new file mode 100644
index 000000000000..d41f925f5182
--- /dev/null
+++ b/include/asm-v850/processor.h
@@ -0,0 +1,120 @@
+/*
+ * include/asm-v850/processor.h
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_PROCESSOR_H__
+#define __V850_PROCESSOR_H__
+
+#include <linux/config.h>
+#ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe.  */
+#include <linux/thread_info.h>
+#endif
+
+#include <asm/ptrace.h>
+#include <asm/entry.h>
+
+/* Some code expects `segment' stuff to be defined here.  */
+#include <asm/segment.h>
+
+
+/*
+ * The only places this is used seem to be horrible bletcherous kludges,
+ * so we just define it to be as large as possible.
+ */
+#define TASK_SIZE       (0xFFFFFFFF)
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.  We won't be using it.
+ */
+#define TASK_UNMAPPED_BASE      0
+
+
+#ifndef __ASSEMBLY__
+
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr()     ({ __label__ _l; _l: &&_l;})
+
+/* If you change this, you must change the associated assembly-languages
+   constants defined below, THREAD_*.  */
+struct thread_struct {
+        /* kernel stack pointer (must be first field in structure) */
+        unsigned long  ksp;
+};
+
+#define INIT_THREAD { sizeof init_stack + (unsigned long)init_stack }
+
+
+/* Do necessary setup to start up a newly executed thread.  */
+extern inline void start_thread (struct pt_regs *regs,
+                                 unsigned long pc, unsigned long usp)
+{
+        regs->pc = pc;
+        regs->gpr[GPR_SP] = usp;
+        regs->kernel_mode = 0;
+}
+
+/* Free all resources held by a thread. */
+extern inline void release_thread (struct task_struct *dead_task)
+{
+}
+
+/* Prepare to copy thread state - unlazy all lazy status */
+#define prepare_to_copy(tsk)    do { } while (0)
+
+extern int kernel_thread (int (*fn)(void *), void * arg, unsigned long flags);
+
+/* Free current thread data structures etc.  */
+static inline void exit_thread (void)
+{
+}
+
+
+/* Return the registers saved during context-switch by the currently
+   not-running thread T.  Note that this only includes some registers!
+   See entry.S for details.  */
+#define thread_saved_regs(t) \
+   ((struct pt_regs*)((t)->thread.ksp + STATE_SAVE_PT_OFFSET))
+/* Return saved (kernel) PC of a blocked thread.  Actually, we return the
+   LP register, because the thread is actually blocked in switch_thread,
+   and we're interested in the PC it will _return_ to.  */
+#define thread_saved_pc(t)   (thread_saved_regs(t)->gpr[GPR_LP])
+
+
+unsigned long get_wchan (struct task_struct *p);
+
+
+/* Return some info about the user process TASK.  */
+#define task_tos(task)  ((unsigned long)(task)->thread_info + THREAD_SIZE)
+#define task_regs(task) ((struct pt_regs *)task_tos (task) - 1)
+#define task_sp(task)   (task_regs (task)->gpr[GPR_SP])
+#define task_pc(task)   (task_regs (task)->pc)
+/* Grotty old names for some.  */
+#define KSTK_EIP(task)  task_pc (task)
+#define KSTK_ESP(task)  task_sp (task)
+
+
+#define cpu_relax()    ((void)0)
+
+
+#else /* __ASSEMBLY__ */
+
+#define THREAD_KSP      0
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_PROCESSOR_H__ */
diff --git a/include/asm-v850/ptrace.h b/include/asm-v850/ptrace.h
new file mode 100644
index 000000000000..7bf72bb5078c
--- /dev/null
+++ b/include/asm-v850/ptrace.h
@@ -0,0 +1,121 @@
+/*
+ * include/asm-v850/ptrace.h -- Access to CPU registers
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_PTRACE_H__
+#define __V850_PTRACE_H__
+
+
+/* v850 general purpose registers with special meanings.  */
+#define GPR_ZERO        0       /* constant zero */
+#define GPR_ASM         1       /* reserved for assembler */
+#define GPR_SP          3       /* stack pointer */
+#define GPR_GP          4       /* global data pointer */
+#define GPR_TP          5       /* `text pointer' */
+#define GPR_EP          30      /* `element pointer' */
+#define GPR_LP          31      /* link pointer (current return address) */
+
+/* These aren't official names, but they make some code more descriptive.  */
+#define GPR_ARG0        6
+#define GPR_ARG1        7
+#define GPR_ARG2        8
+#define GPR_ARG3        9
+#define GPR_RVAL0       10
+#define GPR_RVAL1       11
+#define GPR_RVAL        GPR_RVAL0
+
+#define NUM_GPRS        32
+
+/* v850 `system' registers.  */
+#define SR_EIPC         0
+#define SR_EIPSW        1
+#define SR_FEPC         2
+#define SR_FEPSW        3
+#define SR_ECR          4
+#define SR_PSW          5
+#define SR_CTPC         16
+#define SR_CTPSW        17
+#define SR_DBPC         18
+#define SR_DBPSW        19
+#define SR_CTBP         20
+#define SR_DIR          21
+#define SR_ASID         23
+
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long v850_reg_t;
+
+/* How processor state is stored on the stack during a syscall/signal.
+   If you change this structure, change the associated assembly-language
+   macros below too (PT_*)!  */
+struct pt_regs
+{
+        /* General purpose registers.  */
+        v850_reg_t gpr[NUM_GPRS];
+
+        v850_reg_t pc;          /* program counter */
+        v850_reg_t psw;         /* program status word */
+
+        /* Registers used by `callt' instruction:  */
+        v850_reg_t ctpc;        /* saved program counter */
+        v850_reg_t ctpsw;       /* saved psw */
+        v850_reg_t ctbp;        /* base pointer for callt table */
+
+        char kernel_mode;       /* 1 if in `kernel mode', 0 if user mode */
+};
+
+
+#define instruction_pointer(regs)       ((regs)->pc)
+#define profile_pc(regs) instruction_pointer(regs)
+#define user_mode(regs)                 (!(regs)->kernel_mode)
+
+/* When a struct pt_regs is used to save user state for a system call in
+   the kernel, the system call is stored in the space for R0 (since it's
+   never used otherwise, R0 being a constant 0).  Non-system-calls
+   simply store 0 there.  */
+#define PT_REGS_SYSCALL(regs)           (regs)->gpr[0]
+#define PT_REGS_SET_SYSCALL(regs, val)  ((regs)->gpr[0] = (val))
+
+#endif /* !__ASSEMBLY__ */
+
+
+/* The number of bytes used to store each register.  */
+#define _PT_REG_SIZE    4
+
+/* Offset of a general purpose register in a stuct pt_regs.  */
+#define PT_GPR(num)     ((num) * _PT_REG_SIZE)
+
+/* Offsets of various special registers & fields in a struct pt_regs.  */
+#define PT_PC           ((NUM_GPRS + 0) * _PT_REG_SIZE)
+#define PT_PSW          ((NUM_GPRS + 1) * _PT_REG_SIZE)
+#define PT_CTPC         ((NUM_GPRS + 2) * _PT_REG_SIZE)
+#define PT_CTPSW        ((NUM_GPRS + 3) * _PT_REG_SIZE)
+#define PT_CTBP         ((NUM_GPRS + 4) * _PT_REG_SIZE)
+#define PT_KERNEL_MODE  ((NUM_GPRS + 5) * _PT_REG_SIZE)
+
+/* Where the current syscall number is stashed; obviously only valid in
+   the kernel!  */
+#define PT_CUR_SYSCALL  PT_GPR(0)
+
+/* Size of struct pt_regs, including alignment.  */
+#define PT_SIZE         ((NUM_GPRS + 6) * _PT_REG_SIZE)
+
+
+/* These are `magic' values for PTRACE_PEEKUSR that return info about where
+   a process is located in memory.  */
+#define PT_TEXT_ADDR    (PT_SIZE + 1)
+#define PT_TEXT_LEN     (PT_SIZE + 2)
+#define PT_DATA_ADDR    (PT_SIZE + 3)
+
+
+#endif /* __V850_PTRACE_H__ */
diff --git a/include/asm-v850/resource.h b/include/asm-v850/resource.h
new file mode 100644
index 000000000000..4b9dcd44f8d1
--- /dev/null
+++ b/include/asm-v850/resource.h
@@ -0,0 +1,6 @@
+#ifndef __V850_RESOURCE_H__
+#define __V850_RESOURCE_H__
+
+#include <asm-generic/resource.h>
+
+#endif /* __V850_RESOURCE_H__ */
diff --git a/include/asm-v850/rte_cb.h b/include/asm-v850/rte_cb.h
new file mode 100644
index 000000000000..9f7f02cb0391
--- /dev/null
+++ b/include/asm-v850/rte_cb.h
@@ -0,0 +1,85 @@
+/*
+ * include/asm-v850/rte_cb.h -- Midas labs RTE-CB series of evaluation boards
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_RTE_CB_H__
+#define __V850_RTE_CB_H__
+
+
+/* The SRAM on the Mother-A motherboard.  */
+#define MB_A_SRAM_ADDR          GCS0_ADDR
+#define MB_A_SRAM_SIZE          0x00200000 /* 2MB */
+
+
+#ifdef CONFIG_RTE_GBUS_INT
+/* GBUS interrupt support.  */
+
+# include <asm/gbus_int.h>
+
+# define GBUS_INT_BASE_IRQ      NUM_RTE_CB_IRQS
+# define GBUS_INT_BASE_ADDR     (GCS2_ADDR + 0x00006000)
+
+/* Some specific interrupts.  */
+# define IRQ_MB_A_LAN           IRQ_GBUS_INT(10)
+# define IRQ_MB_A_PCI1(n)       (IRQ_GBUS_INT(16) + (n))
+# define IRQ_MB_A_PCI1_NUM      4
+# define IRQ_MB_A_PCI2(n)       (IRQ_GBUS_INT(20) + (n))
+# define IRQ_MB_A_PCI2_NUM      4
+# define IRQ_MB_A_EXT(n)        (IRQ_GBUS_INT(24) + (n))
+# define IRQ_MB_A_EXT_NUM       4
+# define IRQ_MB_A_USB_OC(n)     (IRQ_GBUS_INT(28) + (n))
+# define IRQ_MB_A_USB_OC_NUM    2
+# define IRQ_MB_A_PCMCIA_OC     IRQ_GBUS_INT(30)
+
+/* We define NUM_MACH_IRQS to include extra interrupts from the GBUS.  */
+# define NUM_MACH_IRQS          (NUM_RTE_CB_IRQS + IRQ_GBUS_INT_NUM)
+
+#else /* !CONFIG_RTE_GBUS_INT */
+
+# define NUM_MACH_IRQS          NUM_RTE_CB_IRQS
+
+#endif /* CONFIG_RTE_GBUS_INT */
+
+
+#ifdef CONFIG_RTE_MB_A_PCI
+/* Mother-A PCI bus support.  */
+
+# include <asm/rte_mb_a_pci.h>
+
+/* These are the base addresses used for allocating device address
+   space.  512K of the motherboard SRAM is in the same space, so we have
+   to be careful not to let it be allocated.  */
+# define PCIBIOS_MIN_MEM        (MB_A_PCI_MEM_ADDR + 0x80000)
+# define PCIBIOS_MIN_IO         MB_A_PCI_IO_ADDR
+
+/* As we don't really support PCI DMA to cpu memory, and use bounce-buffers
+   instead, perversely enough, this becomes always true! */
+# define pci_dma_supported(dev, mask)           1
+# define pci_dac_dma_supported(dev, mask)       0
+# define pcibios_assign_all_busses()            1
+
+#endif /* CONFIG_RTE_MB_A_PCI */
+
+
+/* For <asm/param.h> */
+#ifndef HZ
+#define HZ      100
+#endif
+
+
+#ifndef __ASSEMBLY__
+extern void rte_cb_early_init (void);
+extern void rte_cb_init_irqs (void);
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_RTE_CB_H__ */
diff --git a/include/asm-v850/rte_ma1_cb.h b/include/asm-v850/rte_ma1_cb.h
new file mode 100644
index 000000000000..bd3162ab9844
--- /dev/null
+++ b/include/asm-v850/rte_ma1_cb.h
@@ -0,0 +1,128 @@
+/*
+ * include/asm-v850/rte_ma1_cb.h -- Midas labs RTE-V850/MA1-CB board
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_RTE_MA1_CB_H__
+#define __V850_RTE_MA1_CB_H__
+
+#include <asm/rte_cb.h>         /* Common defs for Midas RTE-CB boards.  */
+
+
+#define PLATFORM                "rte-v850e/ma1-cb"
+#define PLATFORM_LONG           "Midas lab RTE-V850E/MA1-CB"
+
+#define CPU_CLOCK_FREQ          50000000 /* 50MHz */
+
+/* 1MB of onboard SRAM.  Note that the monitor ROM uses parts of this
+   for its own purposes, so care must be taken.  Some address lines are
+   not decoded, so the SRAM area is mirrored every 1MB from 0x400000 to
+   0x800000 (exclusive).  */
+#define SRAM_ADDR               0x00400000
+#define SRAM_SIZE               0x00100000 /* 1MB */
+
+/* 32MB of onbard SDRAM.  */
+#define SDRAM_ADDR              0x00800000
+#define SDRAM_SIZE              0x02000000 /* 32MB */
+
+
+/* CPU addresses of GBUS memory spaces.  */
+#define GCS0_ADDR               0x05000000 /* GCS0 - Common SRAM (2MB) */
+#define GCS0_SIZE               0x00200000 /*   2MB */
+#define GCS1_ADDR               0x06000000 /* GCS1 - Flash ROM (8MB) */
+#define GCS1_SIZE               0x00800000 /*   8MB */
+#define GCS2_ADDR               0x07900000 /* GCS2 - I/O registers */
+#define GCS2_SIZE               0x00400000 /*   4MB */
+#define GCS5_ADDR               0x04000000 /* GCS5 - PCI bus space */
+#define GCS5_SIZE               0x01000000 /*   16MB */
+#define GCS6_ADDR               0x07980000 /* GCS6 - PCI control registers */
+#define GCS6_SIZE               0x00000200 /*   512B */
+
+
+/* For <asm/page.h> */
+#define PAGE_OFFSET             SRAM_ADDR
+
+
+/* The GBUS GINT0 - GINT3 interrupts are connected to the INTP000 - INTP011
+   pins on the CPU.  These are shared among the GBUS interrupts.  */
+#define IRQ_GINT(n)             IRQ_INTP(n)
+#define IRQ_GINT_NUM            4
+
+/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS.  */
+#define NUM_RTE_CB_IRQS         NUM_CPU_IRQS
+
+
+#ifdef CONFIG_ROM_KERNEL
+/* Kernel is in ROM, starting at address 0.  */
+
+#define INTV_BASE               0
+
+#else /* !CONFIG_ROM_KERNEL */
+
+#ifdef CONFIG_RTE_CB_MULTI
+/* Using RAM kernel with ROM monitor for Multi debugger.  */
+
+/* The chip's real interrupt vectors are in ROM, but they jump to a
+   secondary interrupt vector table in RAM.  */
+#define INTV_BASE               0x004F8000
+
+/* Scratch memory used by the ROM monitor, which shouldn't be used by
+   linux (except for the alternate interrupt vector area, defined
+   above).  */
+#define MON_SCRATCH_ADDR        0x004F8000
+#define MON_SCRATCH_SIZE        0x00008000 /* 32KB */
+
+#else /* !CONFIG_RTE_CB_MULTI */
+/* Using RAM-kernel.  Assume some sort of boot-loader got us loaded at
+   address 0.  */
+
+#define INTV_BASE               0
+
+#endif /* CONFIG_RTE_CB_MULTI */
+
+#endif /* CONFIG_ROM_KERNEL */
+
+
+/* Some misc. on-board devices.  */
+
+/* Seven-segment LED display (two digits).  Write-only.  */
+#define LED_ADDR(n)             (0x07802000 + (n))
+#define LED(n)                  (*(volatile unsigned char *)LED_ADDR(n))
+#define LED_NUM_DIGITS          2
+
+
+/* Override the basic MA uart pre-initialization so that we can
+   initialize extra stuff.  */
+#undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/ma.h> */
+#define V850E_UART_PRE_CONFIGURE        rte_ma1_cb_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void rte_ma1_cb_uart_pre_configure (unsigned chan,
+                                           unsigned cflags, unsigned baud);
+#endif
+
+/* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */
+
+/* CTS for UART channel 0 is pin P43 (bit 3 of port 4).  */
+#define V850E_UART_CTS(chan)    ((chan) == 0 ? !(MA_PORT4_IO & 0x8) : 1)
+/* RTS for UART channel 0 is pin P42 (bit 2 of port 4).  */
+#define V850E_UART_SET_RTS(chan, val)                                         \
+   do {                                                                       \
+           if (chan == 0) {                                                   \
+                   unsigned old = MA_PORT4_IO;                                \
+                   if (val)                                                   \
+                           MA_PORT4_IO = old & ~0x4;                          \
+                   else                                                       \
+                           MA_PORT4_IO = old | 0x4;                           \
+           }                                                                  \
+   } while (0)
+
+
+#endif /* __V850_RTE_MA1_CB_H__ */
diff --git a/include/asm-v850/rte_mb_a_pci.h b/include/asm-v850/rte_mb_a_pci.h
new file mode 100644
index 000000000000..41ac185ca9cd
--- /dev/null
+++ b/include/asm-v850/rte_mb_a_pci.h
@@ -0,0 +1,56 @@
+/*
+ * include/asm-v850/mb_a_pci.h -- PCI support for Midas lab RTE-MOTHER-A board
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_MB_A_PCI_H__
+#define __V850_MB_A_PCI_H__
+
+
+#define MB_A_PCI_MEM_ADDR       GCS5_ADDR
+#define MB_A_PCI_MEM_SIZE       (GCS5_SIZE / 2)
+#define MB_A_PCI_IO_ADDR        (GCS5_ADDR + MB_A_PCI_MEM_SIZE)
+#define MB_A_PCI_IO_SIZE        (GCS5_SIZE / 2)
+#define MB_A_PCI_REG_BASE_ADDR  GCS6_ADDR
+
+#define MB_A_PCI_PCICR_ADDR     (MB_A_PCI_REG_BASE_ADDR + 0x4)
+#define MB_A_PCI_PCICR          (*(volatile u16 *)MB_A_PCI_PCICR_ADDR)
+#define MB_A_PCI_PCISR_ADDR     (MB_A_PCI_REG_BASE_ADDR + 0x6)
+#define MB_A_PCI_PCISR          (*(volatile u16 *)MB_A_PCI_PCISR_ADDR)
+#define MB_A_PCI_PCILTR_ADDR    (MB_A_PCI_REG_BASE_ADDR + 0xD)
+#define MB_A_PCI_PCILTR         (*(volatile u8 *)MB_A_PCI_PCILTR_ADDR)
+#define MB_A_PCI_PCIBAR0_ADDR   (MB_A_PCI_REG_BASE_ADDR + 0x10)
+#define MB_A_PCI_PCIBAR0        (*(volatile u32 *)MB_A_PCI_PCIBAR0_ADDR)
+#define MB_A_PCI_PCIBAR1_ADDR   (MB_A_PCI_REG_BASE_ADDR + 0x14)
+#define MB_A_PCI_PCIBAR1        (*(volatile u32 *)MB_A_PCI_PCIBAR1_ADDR)
+#define MB_A_PCI_PCIBAR2_ADDR   (MB_A_PCI_REG_BASE_ADDR + 0x18)
+#define MB_A_PCI_PCIBAR2        (*(volatile u32 *)MB_A_PCI_PCIBAR2_ADDR)
+#define MB_A_PCI_VENDOR_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2C)
+#define MB_A_PCI_VENDOR_ID      (*(volatile u16 *)MB_A_PCI_VENDOR_ID_ADDR)
+#define MB_A_PCI_DEVICE_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2E)
+#define MB_A_PCI_DEVICE_ID      (*(volatile u16 *)MB_A_PCI_DEVICE_ID_ADDR)
+#define MB_A_PCI_DMRR_ADDR      (MB_A_PCI_REG_BASE_ADDR + 0x9C)
+#define MB_A_PCI_DMRR           (*(volatile u32 *)MB_A_PCI_DMRR_ADDR)
+#define MB_A_PCI_DMLBAM_ADDR    (MB_A_PCI_REG_BASE_ADDR + 0xA0)
+#define MB_A_PCI_DMLBAM         (*(volatile u32 *)MB_A_PCI_DMLBAM_ADDR)
+#define MB_A_PCI_DMLBAI_ADDR    (MB_A_PCI_REG_BASE_ADDR + 0xA4)
+#define MB_A_PCI_DMLBAI         (*(volatile u32 *)MB_A_PCI_DMLBAI_ADDR)
+#define MB_A_PCI_PCIPBAM_ADDR   (MB_A_PCI_REG_BASE_ADDR + 0xA8)
+#define MB_A_PCI_PCIPBAM        (*(volatile u32 *)MB_A_PCI_PCIPBAM_ADDR)
+/* `PCI Configuration Address Register for Direct Master to PCI IO/CFG'  */
+#define MB_A_PCI_DMCFGA_ADDR    (MB_A_PCI_REG_BASE_ADDR + 0xAC)
+#define MB_A_PCI_DMCFGA         (*(volatile u32 *)MB_A_PCI_DMCFGA_ADDR)
+/* `PCI Permanent Configuration ID Register'  */
+#define MB_A_PCI_PCIHIDR_ADDR   (MB_A_PCI_REG_BASE_ADDR + 0xF0)
+#define MB_A_PCI_PCIHIDR        (*(volatile u32 *)MB_A_PCI_PCIHIDR_ADDR)
+
+
+#endif /* __V850_MB_A_PCI_H__ */
diff --git a/include/asm-v850/rte_me2_cb.h b/include/asm-v850/rte_me2_cb.h
new file mode 100644
index 000000000000..9922c85c85a8
--- /dev/null
+++ b/include/asm-v850/rte_me2_cb.h
@@ -0,0 +1,202 @@
+/*
+ * include/asm-v850/rte_me2_cb.h -- Midas labs RTE-V850E/ME2-CB board
+ *
+ *  Copyright (C) 2001,02,03  NEC Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_RTE_ME2_CB_H__
+#define __V850_RTE_ME2_CB_H__
+
+#include <asm/rte_cb.h>         /* Common defs for Midas RTE-CB boards.  */
+
+
+#define PLATFORM                "rte-v850e/me2-cb"
+#define PLATFORM_LONG           "Midas lab RTE-V850E/ME2-CB"
+
+#define CPU_CLOCK_FREQ          150000000 /* 150MHz */
+#define FIXED_BOGOMIPS          50
+
+/* 32MB of onbard SDRAM.  */
+#define SDRAM_ADDR              0x00800000
+#define SDRAM_SIZE              0x02000000 /* 32MB */
+
+
+/* CPU addresses of GBUS memory spaces.  */
+#define GCS0_ADDR               0x04000000 /* GCS0 - Common SRAM (2MB) */
+#define GCS0_SIZE               0x00800000 /*   8MB */
+#define GCS1_ADDR               0x04800000 /* GCS1 - Flash ROM (8MB) */
+#define GCS1_SIZE               0x00800000 /*   8MB */
+#define GCS2_ADDR               0x07000000 /* GCS2 - I/O registers */
+#define GCS2_SIZE               0x00800000 /*   8MB */
+#define GCS5_ADDR               0x08000000 /* GCS5 - PCI bus space */
+#define GCS5_SIZE               0x02000000 /*   32MB */
+#define GCS6_ADDR               0x07800000 /* GCS6 - PCI control registers */
+#define GCS6_SIZE               0x00800000 /*   8MB */
+
+
+/* For <asm/page.h> */
+#define PAGE_OFFSET             SDRAM_ADDR
+
+
+#ifdef CONFIG_ROM_KERNEL
+/* Kernel is in ROM, starting at address 0.  */
+
+#define INTV_BASE               0
+#define ROOT_FS_IMAGE_RW        0
+
+#else /* !CONFIG_ROM_KERNEL */
+/* Using RAM-kernel.  Assume some sort of boot-loader got us loaded at
+   address 0.  */
+
+#define INTV_BASE               0
+#define ROOT_FS_IMAGE_RW        1
+
+#endif /* CONFIG_ROM_KERNEL */
+
+
+/* Some misc. on-board devices.  */
+
+/* Seven-segment LED display (four digits).  */
+#define LED_ADDR(n)             (0x0FE02000 + (n))
+#define LED(n)                  (*(volatile unsigned char *)LED_ADDR(n))
+#define LED_NUM_DIGITS          4
+
+
+/* On-board PIC.  */
+
+#define CB_PIC_BASE_ADDR        0x0FE04000
+
+#define CB_PIC_INT0M_ADDR       (CB_PIC_BASE_ADDR + 0x00)
+#define CB_PIC_INT0M            (*(volatile u16 *)CB_PIC_INT0M_ADDR)
+#define CB_PIC_INT1M_ADDR       (CB_PIC_BASE_ADDR + 0x10)
+#define CB_PIC_INT1M            (*(volatile u16 *)CB_PIC_INT1M_ADDR)
+#define CB_PIC_INTR_ADDR        (CB_PIC_BASE_ADDR + 0x20)
+#define CB_PIC_INTR             (*(volatile u16 *)CB_PIC_INTR_ADDR)
+#define CB_PIC_INTEN_ADDR       (CB_PIC_BASE_ADDR + 0x30)
+#define CB_PIC_INTEN            (*(volatile u16 *)CB_PIC_INTEN_ADDR)
+
+#define CB_PIC_INT0EN           0x0001
+#define CB_PIC_INT1EN           0x0002
+#define CB_PIC_INT0SEL          0x0080
+
+/* The PIC interrupts themselves.  */
+#define CB_PIC_BASE_IRQ         NUM_CPU_IRQS
+#define IRQ_CB_PIC_NUM          10
+
+/* Some specific CB_PIC interrupts. */
+#define IRQ_CB_EXTTM0           (CB_PIC_BASE_IRQ + 0)
+#define IRQ_CB_EXTSIO           (CB_PIC_BASE_IRQ + 1)
+#define IRQ_CB_TOVER            (CB_PIC_BASE_IRQ + 2)
+#define IRQ_CB_GINT0            (CB_PIC_BASE_IRQ + 3)
+#define IRQ_CB_USB              (CB_PIC_BASE_IRQ + 4)
+#define IRQ_CB_LANC             (CB_PIC_BASE_IRQ + 5)
+#define IRQ_CB_USB_VBUS_ON      (CB_PIC_BASE_IRQ + 6)
+#define IRQ_CB_USB_VBUS_OFF     (CB_PIC_BASE_IRQ + 7)
+#define IRQ_CB_EXTTM1           (CB_PIC_BASE_IRQ + 8)
+#define IRQ_CB_EXTTM2           (CB_PIC_BASE_IRQ + 9)
+
+/* The GBUS GINT1 - GINT3 (note, not GINT0!) interrupts are connected to
+   the INTP65 - INTP67 pins on the CPU.  These are shared among the GBUS
+   interrupts.  */
+#define IRQ_GINT(n)             IRQ_INTP((n) + 9)  /* 0 is unused! */
+#define IRQ_GINT_NUM            4                  /* 0 is unused! */
+
+/* The shared interrupt line from the PIC is connected to CPU pin INTP23.  */
+#define IRQ_CB_PIC              IRQ_INTP(4) /* P23 */
+
+/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS.  */
+#define NUM_RTE_CB_IRQS         (NUM_CPU_IRQS + IRQ_CB_PIC_NUM)
+
+
+#ifndef __ASSEMBLY__
+struct cb_pic_irq_init {
+        const char *name;       /* name of interrupt type */
+
+        /* Range of kernel irq numbers for this type:
+           BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM  */
+        unsigned base, num, interval;
+
+        unsigned priority;      /* interrupt priority to assign */
+};
+struct hw_interrupt_type;       /* fwd decl */
+
+/* Enable interrupt handling for interrupt IRQ.  */
+extern void cb_pic_enable_irq (unsigned irq);
+/* Disable interrupt handling for interrupt IRQ.  Note that any interrupts
+   received while disabled will be delivered once the interrupt is enabled
+   again, unless they are explicitly cleared using `cb_pic_clear_pending_irq'.  */
+extern void cb_pic_disable_irq (unsigned irq);
+/* Initialize HW_IRQ_TYPES for PIC irqs described in array INITS (which is
+   terminated by an entry with the name field == 0).  */
+extern void cb_pic_init_irq_types (struct cb_pic_irq_init *inits,
+                                   struct hw_interrupt_type *hw_irq_types);
+/* Initialize PIC interrupts.  */
+extern void cb_pic_init_irqs (void);
+#endif /* __ASSEMBLY__ */
+
+
+/* TL16C550C on board UART see also asm/serial.h */
+#define CB_UART_BASE            0x0FE08000
+#define CB_UART_REG_GAP         0x10
+#define CB_UART_CLOCK           0x16000000
+
+/* CompactFlash setting */
+#define CB_CF_BASE              0x0FE0C000
+#define CB_CF_CCR_ADDR          (CB_CF_BASE+0x200)
+#define CB_CF_CCR               (*(volatile u8 *)CB_CF_CCR_ADDR)
+#define CB_CF_REG0_ADDR         (CB_CF_BASE+0x1000)
+#define CB_CF_REG0              (*(volatile u16 *)CB_CF_REG0_ADDR)
+#define CB_CF_STS0_ADDR         (CB_CF_BASE+0x1004)
+#define CB_CF_STS0              (*(volatile u16 *)CB_CF_STS0_ADDR)
+#define CB_PCATA_BASE           (CB_CF_BASE+0x800)
+#define CB_IDE_BASE             (CB_CF_BASE+0x9F0)
+#define CB_IDE_CTRL             (CB_CF_BASE+0xBF6)
+#define CB_IDE_REG_OFFS         0x1
+
+
+/* SMSC LAN91C111 setting */
+#if defined(CONFIG_SMC91111)
+#define CB_LANC_BASE            0x0FE10300
+#define CONFIG_SMC16BITONLY
+#define ETH0_ADDR               CB_LANC_BASE
+#define ETH0_IRQ                IRQ_CB_LANC
+#endif /* CONFIG_SMC16BITONLY */
+
+
+#undef V850E_UART_PRE_CONFIGURE
+#define V850E_UART_PRE_CONFIGURE        rte_me2_cb_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void rte_me2_cb_uart_pre_configure (unsigned chan,
+                                           unsigned cflags, unsigned baud);
+#endif /* __ASSEMBLY__ */
+
+/* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */
+
+/* CTS for UART channel 0 is pin P22 (bit 2 of port 2).  */
+#define V850E_UART_CTS(chan)    ((chan) == 0 ? !(ME2_PORT2_IO & 0x4) : 1)
+/* RTS for UART channel 0 is pin P21 (bit 1 of port 2).  */
+#define V850E_UART_SET_RTS(chan, val)                                         \
+   do {                                                                       \
+           if (chan == 0) {                                                   \
+                   unsigned old = ME2_PORT2_IO;                               \
+                   if (val)                                                   \
+                           ME2_PORT2_IO = old & ~0x2;                         \
+                   else                                                       \
+                           ME2_PORT2_IO = old | 0x2;                          \
+           }                                                                  \
+   } while (0)
+
+
+#ifndef __ASSEMBLY__
+extern void rte_me2_cb_init_irqs (void);
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_RTE_ME2_CB_H__ */
diff --git a/include/asm-v850/rte_nb85e_cb.h b/include/asm-v850/rte_nb85e_cb.h
new file mode 100644
index 000000000000..f56591cad90a
--- /dev/null
+++ b/include/asm-v850/rte_nb85e_cb.h
@@ -0,0 +1,111 @@
+/*
+ * include/asm-v850/rte_nb85e_cb.h -- Midas labs RTE-V850/NB85E-CB board
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_RTE_NB85E_CB_H__
+#define __V850_RTE_NB85E_CB_H__
+
+#include <asm/rte_cb.h>         /* Common defs for Midas RTE-CB boards.  */
+
+
+#define PLATFORM                "rte-v850e/nb85e-cb"
+#define PLATFORM_LONG           "Midas lab RTE-V850E/NB85E-CB"
+
+#define CPU_CLOCK_FREQ          50000000 /* 50MHz */
+
+/* 1MB of onboard SRAM.  Note that the monitor ROM uses parts of this
+   for its own purposes, so care must be taken.  */
+#define SRAM_ADDR               0x03C00000
+#define SRAM_SIZE               0x00100000 /* 1MB */
+
+/* 16MB of onbard SDRAM.  */
+#define SDRAM_ADDR              0x01000000
+#define SDRAM_SIZE              0x01000000 /* 16MB */
+
+
+/* CPU addresses of GBUS memory spaces.  */
+#define GCS0_ADDR               0x00400000 /* GCS0 - Common SRAM (2MB) */
+#define GCS0_SIZE               0x00400000 /*   4MB */
+#define GCS1_ADDR               0x02000000 /* GCS1 - Flash ROM (8MB) */
+#define GCS1_SIZE               0x00800000 /*   8MB */
+#define GCS2_ADDR               0x03900000 /* GCS2 - I/O registers */
+#define GCS2_SIZE               0x00080000 /*   512KB */
+#define GCS3_ADDR               0x02800000 /* GCS3 - EXT-bus: memory space */
+#define GCS3_SIZE               0x00800000 /*   8MB */
+#define GCS4_ADDR               0x03A00000 /* GCS4 - EXT-bus: I/O space */
+#define GCS4_SIZE               0x00200000 /*   2MB */
+#define GCS5_ADDR               0x00800000 /* GCS5 - PCI bus space */
+#define GCS5_SIZE               0x00800000 /*   8MB */
+#define GCS6_ADDR               0x03980000 /* GCS6 - PCI control registers */
+#define GCS6_SIZE               0x00010000 /*   64KB */
+
+
+/* The GBUS GINT0 - GINT3 interrupts are connected to CPU interrupts 10-12.
+   These are shared among the GBUS interrupts.  */
+#define IRQ_GINT(n)             (10 + (n))
+#define IRQ_GINT_NUM            3
+
+/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS.  */
+#define NUM_RTE_CB_IRQS         NUM_CPU_IRQS
+
+
+#ifdef CONFIG_ROM_KERNEL
+/* Kernel is in ROM, starting at address 0.  */
+
+#define INTV_BASE       0
+
+#else /* !CONFIG_ROM_KERNEL */
+/* We're using the ROM monitor.  */
+
+/* The chip's real interrupt vectors are in ROM, but they jump to a
+   secondary interrupt vector table in RAM.  */
+#define INTV_BASE               0x03CF8000
+
+/* Scratch memory used by the ROM monitor, which shouldn't be used by
+   linux (except for the alternate interrupt vector area, defined
+   above).  */
+#define MON_SCRATCH_ADDR        0x03CE8000
+#define MON_SCRATCH_SIZE        0x00018000 /* 96KB */
+
+#endif /* CONFIG_ROM_KERNEL */
+
+
+/* Some misc. on-board devices.  */
+
+/* Seven-segment LED display (two digits).  Write-only.  */
+#define LED_ADDR(n)     (0x03802000 + (n))
+#define LED(n)          (*(volatile unsigned char *)LED_ADDR(n))
+#define LED_NUM_DIGITS  4
+
+
+/* Override the basic TEG UART pre-initialization so that we can
+   initialize extra stuff.  */
+#undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/teg.h> */
+#define V850E_UART_PRE_CONFIGURE        rte_nb85e_cb_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void rte_nb85e_cb_uart_pre_configure (unsigned chan,
+                                             unsigned cflags, unsigned baud);
+#endif
+
+/* This board supports RTS/CTS for the on-chip UART. */
+
+/* CTS is pin P00.  */
+#define V850E_UART_CTS(chan)    (! (TEG_PORT0_IO & 0x1))
+/* RTS is pin P02.  */
+#define V850E_UART_SET_RTS(chan, val)                                         \
+   do {                                                                       \
+           unsigned old = TEG_PORT0_IO;                                       \
+           TEG_PORT0_IO = val ? (old & ~0x4) : (old | 0x4);                   \
+   } while (0)
+
+
+#endif /* __V850_RTE_NB85E_CB_H__ */
diff --git a/include/asm-v850/scatterlist.h b/include/asm-v850/scatterlist.h
new file mode 100644
index 000000000000..af1cba69a526
--- /dev/null
+++ b/include/asm-v850/scatterlist.h
@@ -0,0 +1,26 @@
+/*
+ * include/asm-v850/scatterlist.h
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SCATTERLIST_H__
+#define __V850_SCATTERLIST_H__
+
+struct scatterlist {
+        struct page     *page;
+        unsigned        offset;
+        dma_addr_t      dma_address;
+        unsigned        length;
+};
+
+#define ISA_DMA_THRESHOLD       (~0UL)
+
+#endif /* __V850_SCATTERLIST_H__ */
diff --git a/include/asm-v850/sections.h b/include/asm-v850/sections.h
new file mode 100644
index 000000000000..e0238253a0d0
--- /dev/null
+++ b/include/asm-v850/sections.h
@@ -0,0 +1,6 @@
+#ifndef __V850_SECTIONS_H__
+#define __V850_SECTIONS_H__
+
+#include <asm-generic/sections.h>
+
+#endif /* __V850_SECTIONS_H__ */
diff --git a/include/asm-v850/segment.h b/include/asm-v850/segment.h
new file mode 100644
index 000000000000..5e2b15dcf3d9
--- /dev/null
+++ b/include/asm-v850/segment.h
@@ -0,0 +1,36 @@
+#ifndef __V850_SEGMENT_H__
+#define __V850_SEGMENT_H__
+
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long mm_segment_t;     /* domain register */
+
+#endif /* !__ASSEMBLY__ */
+
+
+#define __KERNEL_CS     0x0
+#define __KERNEL_DS     0x0
+
+#define __USER_CS       0x1
+#define __USER_DS       0x1
+
+#define KERNEL_DS       __KERNEL_DS
+#define KERNEL_CS       __KERNEL_CS
+#define USER_DS         __USER_DS
+#define USER_CS         __USER_CS
+
+#define segment_eq(a,b) ((a) == (b))
+
+#define get_ds()        (KERNEL_DS)
+#define get_fs()        (USER_DS)
+
+#define set_fs(seg)     ((void)(seg))
+
+
+#define copy_segments(task, mm) ((void)((void)(task), (mm)))
+#define release_segments(mm)    ((void)(mm))
+#define forget_segments()       ((void)0)
+
+
+#endif /* __V850_SEGMENT_H__ */
diff --git a/include/asm-v850/semaphore.h b/include/asm-v850/semaphore.h
new file mode 100644
index 000000000000..c514062bb69e
--- /dev/null
+++ b/include/asm-v850/semaphore.h
@@ -0,0 +1,88 @@
+#ifndef __V850_SEMAPHORE_H__
+#define __V850_SEMAPHORE_H__
+
+#include <linux/linkage.h>
+#include <linux/spinlock.h>
+#include <linux/wait.h>
+#include <linux/rwsem.h>
+
+#include <asm/atomic.h>
+
+struct semaphore {
+        atomic_t count;
+        int sleepers;
+        wait_queue_head_t wait;
+};
+
+#define __SEMAPHORE_INITIALIZER(name,count)                                   \
+        { ATOMIC_INIT (count), 0,                                             \
+          __WAIT_QUEUE_HEAD_INITIALIZER ((name).wait) }
+
+#define __MUTEX_INITIALIZER(name)                                             \
+        __SEMAPHORE_INITIALIZER (name,1)
+
+#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
+        struct semaphore name = __SEMAPHORE_INITIALIZER (name,count)
+
+#define DECLARE_MUTEX(name)             __DECLARE_SEMAPHORE_GENERIC (name,1)
+#define DECLARE_MUTEX_LOCKED(name)      __DECLARE_SEMAPHORE_GENERIC (name,0)
+
+extern inline void sema_init (struct semaphore *sem, int val)
+{
+        *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
+}
+
+static inline void init_MUTEX (struct semaphore *sem)
+{
+        sema_init (sem, 1);
+}
+
+static inline void init_MUTEX_LOCKED (struct semaphore *sem)
+{
+        sema_init (sem, 0);
+}
+
+/*
+ * special register calling convention
+ */
+asmlinkage void __down_failed (void);
+asmlinkage int  __down_interruptible_failed (void);
+asmlinkage int  __down_trylock_failed (void);
+asmlinkage void __up_wakeup (void);
+
+extern void __down (struct semaphore * sem);
+extern int  __down_interruptible (struct semaphore * sem);
+extern int  __down_trylock (struct semaphore * sem);
+extern void __up (struct semaphore * sem);
+
+extern inline void down (struct semaphore * sem)
+{
+        might_sleep();
+        if (atomic_dec_return (&sem->count) < 0)
+                __down (sem);
+}
+
+extern inline int down_interruptible (struct semaphore * sem)
+{
+        int ret = 0;
+        might_sleep();
+        if (atomic_dec_return (&sem->count) < 0)
+                ret = __down_interruptible (sem);
+        return ret;
+}
+
+extern inline int down_trylock (struct semaphore *sem)
+{
+        int ret = 0;
+        if (atomic_dec_return (&sem->count) < 0)
+                ret = __down_trylock (sem);
+        return ret;
+}
+
+extern inline void up (struct semaphore * sem)
+{
+        if (atomic_inc_return (&sem->count) <= 0)
+                __up (sem);
+}
+
+#endif /* __V850_SEMAPHORE_H__ */
diff --git a/include/asm-v850/sembuf.h b/include/asm-v850/sembuf.h
new file mode 100644
index 000000000000..1622231a8b85
--- /dev/null
+++ b/include/asm-v850/sembuf.h
@@ -0,0 +1,25 @@
+#ifndef __V850_SEMBUF_H__
+#define __V850_SEMBUF_H__
+
+/* 
+ * The semid64_ds structure for v850 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct semid64_ds {
+        struct ipc64_perm sem_perm;             /* permissions .. see ipc.h */
+        __kernel_time_t sem_otime;              /* last semop time */
+        unsigned long   __unused1;
+        __kernel_time_t sem_ctime;              /* last change time */
+        unsigned long   __unused2;
+        unsigned long   sem_nsems;              /* no. of semaphores in array */
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* __V850_SEMBUF_H__ */
diff --git a/include/asm-v850/serial.h b/include/asm-v850/serial.h
new file mode 100644
index 000000000000..8c2a609ba2b0
--- /dev/null
+++ b/include/asm-v850/serial.h
@@ -0,0 +1,57 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */ 
+#include <linux/config.h>
+
+#ifdef CONFIG_RTE_CB_ME2
+
+#include <asm/rte_me2_cb.h>
+
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+
+#define irq_cannonicalize(x) (x)
+#define BASE_BAUD       250000  /* (16MHz / (16 * 38400)) * 9600 */
+#define SERIAL_PORT_DFNS \
+   { 0, BASE_BAUD, CB_UART_BASE, IRQ_CB_EXTSIO, STD_COM_FLAGS },
+
+/* Redefine UART register offsets.  */
+#undef UART_RX
+#undef UART_TX
+#undef UART_DLL
+#undef UART_TRG
+#undef UART_DLM
+#undef UART_IER
+#undef UART_FCTR
+#undef UART_IIR
+#undef UART_FCR
+#undef UART_EFR
+#undef UART_LCR
+#undef UART_MCR
+#undef UART_LSR
+#undef UART_MSR
+#undef UART_SCR
+#undef UART_EMSR
+
+#define UART_RX         (0 * CB_UART_REG_GAP)
+#define UART_TX         (0 * CB_UART_REG_GAP)
+#define UART_DLL        (0 * CB_UART_REG_GAP)
+#define UART_TRG        (0 * CB_UART_REG_GAP)
+#define UART_DLM        (1 * CB_UART_REG_GAP)
+#define UART_IER        (1 * CB_UART_REG_GAP)
+#define UART_FCTR       (1 * CB_UART_REG_GAP)
+#define UART_IIR        (2 * CB_UART_REG_GAP)
+#define UART_FCR        (2 * CB_UART_REG_GAP)
+#define UART_EFR        (2 * CB_UART_REG_GAP)
+#define UART_LCR        (3 * CB_UART_REG_GAP)
+#define UART_MCR        (4 * CB_UART_REG_GAP)
+#define UART_LSR        (5 * CB_UART_REG_GAP)
+#define UART_MSR        (6 * CB_UART_REG_GAP)
+#define UART_SCR        (7 * CB_UART_REG_GAP)
+#define UART_EMSR       (7 * CB_UART_REG_GAP)
+
+#endif /* CONFIG_RTE_CB_ME2 */
diff --git a/include/asm-v850/setup.h b/include/asm-v850/setup.h
new file mode 100644
index 000000000000..c48a9b97d05b
--- /dev/null
+++ b/include/asm-v850/setup.h
@@ -0,0 +1,6 @@
+#ifndef _V850_SETUP_H
+#define _V850_SETUP_H
+
+#define COMMAND_LINE_SIZE       512
+
+#endif /* __SETUP_H */
diff --git a/include/asm-v850/shmbuf.h b/include/asm-v850/shmbuf.h
new file mode 100644
index 000000000000..3d085c9c418e
--- /dev/null
+++ b/include/asm-v850/shmbuf.h
@@ -0,0 +1,42 @@
+#ifndef __V850_SHMBUF_H__
+#define __V850_SHMBUF_H__
+
+/* 
+ * The shmid64_ds structure for v850 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct shmid64_ds {
+        struct ipc64_perm       shm_perm;       /* operation perms */
+        size_t                  shm_segsz;      /* size of segment (bytes) */
+        __kernel_time_t         shm_atime;      /* last attach time */
+        unsigned long           __unused1;
+        __kernel_time_t         shm_dtime;      /* last detach time */
+        unsigned long           __unused2;
+        __kernel_time_t         shm_ctime;      /* last change time */
+        unsigned long           __unused3;
+        __kernel_pid_t          shm_cpid;       /* pid of creator */
+        __kernel_pid_t          shm_lpid;       /* pid of last operator */
+        unsigned long           shm_nattch;     /* no. of current attaches */
+        unsigned long           __unused4;
+        unsigned long           __unused5;
+};
+
+struct shminfo64 {
+        unsigned long   shmmax;
+        unsigned long   shmmin;
+        unsigned long   shmmni;
+        unsigned long   shmseg;
+        unsigned long   shmall;
+        unsigned long   __unused1;
+        unsigned long   __unused2;
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* __V850_SHMBUF_H__ */
diff --git a/include/asm-v850/shmparam.h b/include/asm-v850/shmparam.h
new file mode 100644
index 000000000000..7dcb6739073e
--- /dev/null
+++ b/include/asm-v850/shmparam.h
@@ -0,0 +1,6 @@
+#ifndef __V850_SHMPARAM_H__
+#define __V850_SHMPARAM_H__
+
+#define SHMLBA          PAGE_SIZE       /* attach addr a multiple of this */
+
+#endif /* __V850_SHMPARAM_H__ */
diff --git a/include/asm-v850/sigcontext.h b/include/asm-v850/sigcontext.h
new file mode 100644
index 000000000000..e0890f6f4bc9
--- /dev/null
+++ b/include/asm-v850/sigcontext.h
@@ -0,0 +1,25 @@
+/*
+ * include/asm-v850/sigcontext.h -- Signal contexts
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SIGCONTEXT_H__
+#define __V850_SIGCONTEXT_H__
+
+#include <asm/ptrace.h>
+
+struct sigcontext
+{
+        struct pt_regs  regs;
+        unsigned long   oldmask;
+};
+
+#endif /* __V850_SIGCONTEXT_H__ */
diff --git a/include/asm-v850/siginfo.h b/include/asm-v850/siginfo.h
new file mode 100644
index 000000000000..7eb94703dce0
--- /dev/null
+++ b/include/asm-v850/siginfo.h
@@ -0,0 +1,6 @@
+#ifndef __V850_SIGINFO_H__
+#define __V850_SIGINFO_H__
+
+#include <asm-generic/siginfo.h>
+
+#endif /* __V850_SIGINFO_H__ */
diff --git a/include/asm-v850/signal.h b/include/asm-v850/signal.h
new file mode 100644
index 000000000000..407db875899c
--- /dev/null
+++ b/include/asm-v850/signal.h
@@ -0,0 +1,195 @@
+#ifndef __V850_SIGNAL_H__
+#define __V850_SIGNAL_H__
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+
+#ifdef __KERNEL__
+
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+#define _NSIG           64
+#define _NSIG_BPW       32
+#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t;             /* at least 32 bits */
+
+typedef struct {
+        unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
+#else /* !__KERNEL__ */
+
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG            32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+#define SIGBUS           7
+#define SIGFPE           8
+#define SIGKILL          9
+#define SIGUSR1         10
+#define SIGSEGV         11
+#define SIGUSR2         12
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGSTKFLT       16
+#define SIGCHLD         17
+#define SIGCONT         18
+#define SIGSTOP         19
+#define SIGTSTP         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGURG          23
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGIO           29
+#define SIGPOLL         SIGIO
+/*
+#define SIGLOST         29
+*/
+#define SIGPWR          30
+#define SIGSYS          31
+#define SIGUNUSED       31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN        32
+#define SIGRTMAX        _NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP    0x00000001
+#define SA_NOCLDWAIT    0x00000002
+#define SA_SIGINFO      0x00000004
+#define SA_ONSTACK      0x08000000
+#define SA_RESTART      0x10000000
+#define SA_NODEFER      0x40000000
+#define SA_RESETHAND    0x80000000
+
+#define SA_NOMASK       SA_NODEFER
+#define SA_ONESHOT      SA_RESETHAND
+#define SA_INTERRUPT    0x20000000 /* dummy -- ignored */
+
+#define SA_RESTORER     0x04000000
+
+/* 
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     2048
+#define SIGSTKSZ        8192
+
+
+#ifdef __KERNEL__
+/*
+ * These values of sa_flags are used only by the kernel as part of the
+ * irq handling routines.
+ *
+ * SA_INTERRUPT is also used by the irq handling routines.
+ * SA_SHIRQ is for shared interrupt support on PCI and EISA.
+ */
+#define SA_PROBE                SA_ONESHOT
+#define SA_SAMPLE_RANDOM        SA_RESTART
+#define SA_SHIRQ                0x04000000
+#endif /* __KERNEL__ */
+
+
+#define SIG_BLOCK          0    /* for blocking signals */
+#define SIG_UNBLOCK        1    /* for unblocking signals */
+#define SIG_SETMASK        2    /* for setting the signal mask */
+
+/* Type of a signal handler.  */
+typedef void (*__sighandler_t)(int);
+
+#define SIG_DFL ((__sighandler_t)0)     /* default signal handling */
+#define SIG_IGN ((__sighandler_t)1)     /* ignore signal */
+#define SIG_ERR ((__sighandler_t)-1)    /* error return from signal */
+
+
+#ifdef __KERNEL__
+
+struct old_sigaction {
+        __sighandler_t sa_handler;
+        old_sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+struct sigaction {
+        __sighandler_t sa_handler;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+        sigset_t sa_mask;               /* mask last for extensibility */
+};
+
+struct k_sigaction {
+        struct sigaction sa;
+};
+
+#else /* !__KERNEL__ */
+
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+        union {
+          __sighandler_t _sa_handler;
+          void (*_sa_sigaction)(int, struct siginfo *, void *);
+        } _u;
+        sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+#define sa_handler      _u._sa_handler
+#define sa_sigaction    _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+
+typedef struct sigaltstack {
+        void *ss_sp;
+        int ss_flags;
+        size_t ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+
+#include <asm/sigcontext.h>
+#undef __HAVE_ARCH_SIG_BITOPS
+
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* __KERNEL__ */
+
+#endif /* __V850_SIGNAL_H__ */
diff --git a/include/asm-v850/sim.h b/include/asm-v850/sim.h
new file mode 100644
index 000000000000..10236abbe9be
--- /dev/null
+++ b/include/asm-v850/sim.h
@@ -0,0 +1,52 @@
+/*
+ * include/asm-v850/sim.h -- Machine-dependent defs for GDB v850e simulator
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SIM_H__
+#define __V850_SIM_H__
+
+
+#define CPU_ARCH                "v850e"
+#define CPU_MODEL               "v850e"
+#define CPU_MODEL_LONG          "NEC V850E"
+#define PLATFORM                "gdb/v850e"
+#define PLATFORM_LONG           "GDB V850E simulator"
+
+
+/* We use a weird value for RAM, not just 0, for testing purposes.
+   These must match the values used in the linker script.  */
+#define RAM_ADDR                0x8F000000
+#define RAM_SIZE                0x03000000
+
+
+/* For <asm/page.h> */
+#define PAGE_OFFSET             RAM_ADDR
+
+
+/* For <asm/entry.h> */
+/* `R0 RAM', used for a few miscellaneous variables that must be
+   accessible using a load instruction relative to R0.  On real
+   processors, this usually is on-chip RAM, but here we just
+   choose an arbitrary address that meets the above constraint.  */
+#define R0_RAM_ADDR             0xFFFFF000
+
+
+/* For <asm/param.h> */
+#ifndef HZ
+#define HZ                      24      /* Minimum supported frequency.  */
+#endif
+
+/* For <asm/irq.h> */
+#define NUM_CPU_IRQS            6
+
+
+#endif /* __V850_SIM_H__ */
diff --git a/include/asm-v850/sim85e2.h b/include/asm-v850/sim85e2.h
new file mode 100644
index 000000000000..17dd4fa318e6
--- /dev/null
+++ b/include/asm-v850/sim85e2.h
@@ -0,0 +1,75 @@
+/*
+ * include/asm-v850/sim85e2.h -- Machine-dependent defs for
+ *      V850E2 RTL simulator
+ *
+ *  Copyright (C) 2002,03  NEC Electronics Corporation
+ *  Copyright (C) 2002,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SIM85E2_H__
+#define __V850_SIM85E2_H__
+
+
+#include <asm/v850e2.h>         /* Based on V850E2 core.  */
+
+
+/* Various memory areas supported by the simulator.
+   These should match the corresponding definitions in the linker script.  */
+
+/* `instruction RAM'; instruction fetches are much faster from IRAM than
+   from DRAM.  */
+#define IRAM_ADDR               0
+#define IRAM_SIZE               0x00100000 /* 1MB */
+/* `data RAM', below and contiguous with the I/O space.
+   Data fetches are much faster from DRAM than from IRAM.  */
+#define DRAM_ADDR               0xfff00000
+#define DRAM_SIZE               0x000ff000 /* 1020KB */
+/* `external ram'.  Unlike the above RAM areas, this memory is cached,
+   so both instruction and data fetches should be (mostly) fast --
+   however, currently only write-through caching is supported, so writes
+   to ERAM will be slow.  */
+#define ERAM_ADDR               0x00100000
+#define ERAM_SIZE               0x07f00000 /* 127MB (max) */
+/* Dynamic RAM; uses memory controller.  */
+#define SDRAM_ADDR              0x10000000
+#define SDRAM_SIZE              0x01000000 /* 16MB */
+
+
+/* Simulator specific control registers.  */
+/* NOTHAL controls whether the simulator will stop at a `halt' insn.  */
+#define SIM85E2_NOTHAL_ADDR     0xffffff22
+#define SIM85E2_NOTHAL          (*(volatile u8 *)SIM85E2_NOTHAL_ADDR)
+/* The simulator will stop N cycles after N is written to SIMFIN.  */
+#define SIM85E2_SIMFIN_ADDR     0xffffff24
+#define SIM85E2_SIMFIN          (*(volatile u16 *)SIM85E2_SIMFIN_ADDR)
+
+
+/* For <asm/irq.h> */
+#define NUM_CPU_IRQS            64
+
+
+/* For <asm/page.h> */
+#define PAGE_OFFSET             SDRAM_ADDR
+
+
+/* For <asm/entry.h> */
+/* `R0 RAM', used for a few miscellaneous variables that must be accessible
+   using a load instruction relative to R0.  The sim85e2 simulator
+   actually puts 1020K of RAM from FFF00000 to FFFFF000, so we arbitarily
+   choose a small portion at the end of that.  */
+#define R0_RAM_ADDR             0xFFFFE000
+
+
+/* For <asm/param.h> */
+#ifndef HZ
+#define HZ                      24      /* Minimum supported frequency.  */
+#endif
+
+
+#endif /* __V850_SIM85E2_H__ */
diff --git a/include/asm-v850/sim85e2c.h b/include/asm-v850/sim85e2c.h
new file mode 100644
index 000000000000..eee543ff3af8
--- /dev/null
+++ b/include/asm-v850/sim85e2c.h
@@ -0,0 +1,26 @@
+/*
+ * include/asm-v850/sim85e2c.h -- Machine-dependent defs for
+ *      V850E2 RTL simulator
+ *
+ *  Copyright (C) 2002  NEC Corporation
+ *  Copyright (C) 2002  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SIM85E2C_H__
+#define __V850_SIM85E2C_H__
+
+/* Use generic sim85e2 settings, other than the various names.  */
+#include <asm/sim85e2.h>
+
+#define CPU_MODEL       "v850e2"
+#define CPU_MODEL_LONG  "NEC V850E2"
+#define PLATFORM        "sim85e2c"
+#define PLATFORM_LONG   "SIM85E2C V850E2 simulator"
+
+#endif /* __V850_SIM85E2C_H__ */
diff --git a/include/asm-v850/sim85e2s.h b/include/asm-v850/sim85e2s.h
new file mode 100644
index 000000000000..ee066d5d3c51
--- /dev/null
+++ b/include/asm-v850/sim85e2s.h
@@ -0,0 +1,28 @@
+/*
+ * include/asm-v850/sim85e2s.h -- Machine-dependent defs for
+ *      V850E2 RTL simulator
+ *
+ *  Copyright (C) 2003  NEC Electronics Corporation
+ *  Copyright (C) 2003  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SIM85E2S_H__
+#define __V850_SIM85E2S_H__
+
+#include <asm/sim85e2.h>        /* Use generic sim85e2 settings.  */
+#if 0
+#include <asm/v850e2_cache.h>   /* + cache */
+#endif
+
+#define CPU_MODEL       "v850e2"
+#define CPU_MODEL_LONG  "NEC V850E2"
+#define PLATFORM        "sim85e2s"
+#define PLATFORM_LONG   "SIM85E2S V850E2 simulator"
+
+#endif /* __V850_SIM85E2S_H__ */
diff --git a/include/asm-v850/simsyscall.h b/include/asm-v850/simsyscall.h
new file mode 100644
index 000000000000..4a19d5ae9d17
--- /dev/null
+++ b/include/asm-v850/simsyscall.h
@@ -0,0 +1,99 @@
+/*
+ * include/asm-v850/simsyscall.h -- `System calls' under the v850e emulator
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SIMSYSCALL_H__
+#define __V850_SIMSYSCALL_H__
+
+#define V850_SIM_SYS_exit(a...)         V850_SIM_SYSCALL_1 (1   , ##a)
+#define V850_SIM_SYS_fork(a...)         V850_SIM_SYSCALL_0 (2   , ##a)
+#define V850_SIM_SYS_read(a...)         V850_SIM_SYSCALL_3 (3   , ##a)
+#define V850_SIM_SYS_write(a...)        V850_SIM_SYSCALL_3 (4   , ##a)
+#define V850_SIM_SYS_open(a...)         V850_SIM_SYSCALL_2 (5   , ##a)
+#define V850_SIM_SYS_close(a...)        V850_SIM_SYSCALL_1 (6   , ##a)
+#define V850_SIM_SYS_wait4(a...)        V850_SIM_SYSCALL_4 (7   , ##a)
+/* #define V850_SIM_SYS_creat(a...)     V850_SIM_SYSCALL_1 (8   , ##a) */
+/* #define V850_SIM_SYS_link(a...)      V850_SIM_SYSCALL_1 (9   , ##a) */
+/* #define V850_SIM_SYS_unlink(a...)    V850_SIM_SYSCALL_1 (10  , ##a) */
+#define V850_SIM_SYS_execv(a...)        V850_SIM_SYSCALL_2 (11  , ##a)
+/* #define V850_SIM_SYS_chdir(a...)     V850_SIM_SYSCALL_1 (12  , ##a) */
+/* #define V850_SIM_SYS_mknod(a...)     V850_SIM_SYSCALL_1 (14  , ##a) */
+#define V850_SIM_SYS_chmod(a...)        V850_SIM_SYSCALL_2 (15  , ##a)
+#define V850_SIM_SYS_chown(a...)        V850_SIM_SYSCALL_2 (16  , ##a)
+#define V850_SIM_SYS_lseek(a...)        V850_SIM_SYSCALL_3 (19  , ##a)
+/* #define V850_SIM_SYS_getpid(a...)    V850_SIM_SYSCALL_1 (20  , ##a) */
+/* #define V850_SIM_SYS_isatty(a...)    V850_SIM_SYSCALL_1 (21  , ##a) */
+/* #define V850_SIM_SYS_fstat(a...)     V850_SIM_SYSCALL_1 (22  , ##a) */
+#define V850_SIM_SYS_time(a...)         V850_SIM_SYSCALL_1 (23  , ##a)
+#define V850_SIM_SYS_poll(a...)         V850_SIM_SYSCALL_3 (24  , ##a)
+#define V850_SIM_SYS_stat(a...)         V850_SIM_SYSCALL_2 (38  , ##a)
+#define V850_SIM_SYS_pipe(a...)         V850_SIM_SYSCALL_1 (42  , ##a)
+#define V850_SIM_SYS_times(a...)        V850_SIM_SYSCALL_1 (43  , ##a)
+#define V850_SIM_SYS_execve(a...)       V850_SIM_SYSCALL_3 (59  , ##a)
+#define V850_SIM_SYS_gettimeofday(a...) V850_SIM_SYSCALL_2 (116 , ##a)
+/* #define V850_SIM_SYS_utime(a...)     V850_SIM_SYSCALL_2 (201 , ##a) */
+/* #define V850_SIM_SYS_wait(a...)      V850_SIM_SYSCALL_1 (202 , ##a) */
+
+#define V850_SIM_SYS_make_raw(a...)     V850_SIM_SYSCALL_1 (1024 , ##a)
+
+
+#define V850_SIM_SYSCALL_0(_call)                                             \
+({                                                                            \
+        register int call __asm__ ("r6") = _call;                             \
+        register int rval __asm__ ("r10");                                    \
+        __asm__ __volatile__ ("trap 31"                                       \
+                              : "=r" (rval)                                   \
+                              : "r" (call)                                    \
+                              : "r11", "memory");                             \
+        rval;                                                                 \
+})
+#define V850_SIM_SYSCALL_1(_call, _arg0)                                      \
+({                                                                            \
+        register int call __asm__ ("r6") = _call;                             \
+        register long arg0 __asm__ ("r7") = (long)_arg0;                      \
+        register int rval __asm__ ("r10");                                    \
+        __asm__ __volatile__ ("trap 31"                                       \
+                              : "=r" (rval)                                   \
+                              : "r" (call), "r" (arg0)                        \
+                              : "r11", "memory");                             \
+        rval;                                                                 \
+})
+#define V850_SIM_SYSCALL_2(_call, _arg0, _arg1)                               \
+({                                                                            \
+        register int call __asm__ ("r6") = _call;                             \
+        register long arg0 __asm__ ("r7") = (long)_arg0;                      \
+        register long arg1 __asm__ ("r8") = (long)_arg1;                      \
+        register int rval __asm__ ("r10");                                    \
+        __asm__ __volatile__ ("trap 31"                                       \
+                              : "=r" (rval)                                   \
+                              : "r" (call), "r" (arg0), "r" (arg1)            \
+                              : "r11", "memory");                             \
+        rval;                                                                 \
+})
+#define V850_SIM_SYSCALL_3(_call, _arg0, _arg1, _arg2)                        \
+({                                                                            \
+        register int call __asm__ ("r6") = _call;                             \
+        register long arg0 __asm__ ("r7") = (long)_arg0;                      \
+        register long arg1 __asm__ ("r8") = (long)_arg1;                      \
+        register long arg2 __asm__ ("r9") = (long)_arg2;                      \
+        register int rval __asm__ ("r10");                                    \
+        __asm__ __volatile__ ("trap 31"                                       \
+                              : "=r" (rval)                                   \
+                              : "r" (call), "r" (arg0), "r" (arg1), "r" (arg2)\
+                              : "r11", "memory");                             \
+        rval;                                                                 \
+})
+
+#define V850_SIM_SYSCALL(call, args...) \
+   V850_SIM_SYS_##call (args)
+
+#endif /* __V850_SIMSYSCALL_H__ */
diff --git a/include/asm-v850/socket.h b/include/asm-v850/socket.h
new file mode 100644
index 000000000000..213b852af53e
--- /dev/null
+++ b/include/asm-v850/socket.h
@@ -0,0 +1,50 @@
+#ifndef __V850_SOCKET_H__
+#define __V850_SOCKET_H__
+
+#include <asm/sockios.h>
+
+/* For setsockoptions(2) */
+#define SOL_SOCKET      1
+
+#define SO_DEBUG        1
+#define SO_REUSEADDR    2
+#define SO_TYPE         3
+#define SO_ERROR        4
+#define SO_DONTROUTE    5
+#define SO_BROADCAST    6
+#define SO_SNDBUF       7
+#define SO_RCVBUF       8
+#define SO_KEEPALIVE    9
+#define SO_OOBINLINE    10
+#define SO_NO_CHECK     11
+#define SO_PRIORITY     12
+#define SO_LINGER       13
+#define SO_BSDCOMPAT    14
+/* To add :#define SO_REUSEPORT 15 */
+#define SO_PASSCRED     16
+#define SO_PEERCRED     17
+#define SO_RCVLOWAT     18
+#define SO_SNDLOWAT     19
+#define SO_RCVTIMEO     20
+#define SO_SNDTIMEO     21
+
+/* Security levels - as per NRL IPv6 - don't actually do anything */
+#define SO_SECURITY_AUTHENTICATION              22
+#define SO_SECURITY_ENCRYPTION_TRANSPORT        23
+#define SO_SECURITY_ENCRYPTION_NETWORK          24
+
+#define SO_BINDTODEVICE 25
+
+/* Socket filtering */
+#define SO_ATTACH_FILTER        26
+#define SO_DETACH_FILTER        27
+
+#define SO_PEERNAME             28
+#define SO_TIMESTAMP            29
+#define SCM_TIMESTAMP           SO_TIMESTAMP
+
+#define SO_ACCEPTCONN           30
+
+#define SO_PEERSEC              31
+
+#endif /* __V850_SOCKET_H__ */
diff --git a/include/asm-v850/sockios.h b/include/asm-v850/sockios.h
new file mode 100644
index 000000000000..cf4874c2fd8a
--- /dev/null
+++ b/include/asm-v850/sockios.h
@@ -0,0 +1,12 @@
+#ifndef __V850_SOCKIOS_H__
+#define __V850_SOCKIOS_H__
+
+/* Socket-level I/O control calls. */
+#define FIOSETOWN       0x8901
+#define SIOCSPGRP       0x8902
+#define FIOGETOWN       0x8903
+#define SIOCGPGRP       0x8904
+#define SIOCATMARK      0x8905
+#define SIOCGSTAMP      0x8906          /* Get stamp */
+
+#endif /* __V850_SOCKIOS_H__ */
diff --git a/include/asm-v850/stat.h b/include/asm-v850/stat.h
new file mode 100644
index 000000000000..c68c60d06e2f
--- /dev/null
+++ b/include/asm-v850/stat.h
@@ -0,0 +1,73 @@
+/*
+ * include/asm-v850/stat.h -- v850 stat structure
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_STAT_H__
+#define __V850_STAT_H__
+
+#include <asm/posix_types.h>
+
+struct stat {
+        unsigned int    st_dev;
+        unsigned long   st_ino;
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+        unsigned int    st_uid;
+        unsigned int    st_gid;
+        unsigned int    st_rdev;
+        long            st_size;
+        unsigned long   st_blksize;
+        unsigned long   st_blocks;
+        unsigned long   st_atime;
+        unsigned long   __unused1;
+        unsigned long   st_mtime;
+        unsigned long   __unused2;
+        unsigned long   st_ctime;
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+        unsigned long   __unused5;
+};
+
+struct stat64 {
+        unsigned long long      st_dev;
+        unsigned long   __unused1;
+
+        unsigned long long      st_ino;
+
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned int    st_uid;
+        unsigned int    st_gid;
+
+        unsigned long long      st_rdev;
+        unsigned long   __unused3;
+
+        long long       st_size;
+        unsigned long   st_blksize;
+
+        unsigned long   st_blocks; /* No. of 512-byte blocks allocated */
+        unsigned long   __unused4; /* future possible st_blocks high bits */
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+
+        unsigned long   st_mtime;
+        unsigned long   st_mtime_nsec;
+
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;
+
+        unsigned long   __unused8;
+};
+
+#endif /* __V850_STAT_H__ */
diff --git a/include/asm-v850/statfs.h b/include/asm-v850/statfs.h
new file mode 100644
index 000000000000..ea1596607f26
--- /dev/null
+++ b/include/asm-v850/statfs.h
@@ -0,0 +1,6 @@
+#ifndef __V850_STATFS_H__
+#define __V850_STATFS_H__
+
+#include <asm-generic/statfs.h>
+
+#endif /* __V850_STATFS_H__ */
diff --git a/include/asm-v850/string.h b/include/asm-v850/string.h
new file mode 100644
index 000000000000..478e234789d6
--- /dev/null
+++ b/include/asm-v850/string.h
@@ -0,0 +1,25 @@
+/*
+ * include/asm-v850/string.h -- Architecture specific string routines
+ *
+ *  Copyright (C) 2001,02  NEC Corporation
+ *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_STRING_H__
+#define __V850_STRING_H__
+
+#define __HAVE_ARCH_MEMCPY
+#define __HAVE_ARCH_MEMSET
+#define __HAVE_ARCH_MEMMOVE
+
+extern void *memcpy (void *, const void *, __kernel_size_t);
+extern void *memset (void *, int, __kernel_size_t);
+extern void *memmove (void *, const void *, __kernel_size_t);
+
+#endif /* __V850_STRING_H__ */
diff --git a/include/asm-v850/system.h b/include/asm-v850/system.h
new file mode 100644
index 000000000000..20f4c738c04e
--- /dev/null
+++ b/include/asm-v850/system.h
@@ -0,0 +1,113 @@
+/*
+ * include/asm-v850/system.h -- Low-level interrupt/thread ops
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_SYSTEM_H__
+#define __V850_SYSTEM_H__
+
+#include <linux/linkage.h>
+#include <asm/ptrace.h>
+
+
+#define prepare_to_switch()     do { } while (0)
+
+/*
+ * switch_to(n) should switch tasks to task ptr, first checking that
+ * ptr isn't the current task, in which case it does nothing.
+ */
+struct thread_struct;
+extern void *switch_thread (struct thread_struct *last,
+                            struct thread_struct *next);
+#define switch_to(prev,next,last)                                             \
+  do {                                                                        \
+        if (prev != next) {                                                   \
+                (last) = switch_thread (&prev->thread, &next->thread);        \
+        }                                                                     \
+  } while (0)
+
+
+/* Enable/disable interrupts.  */
+#define local_irq_enable()      __asm__ __volatile__ ("ei")
+#define local_irq_disable()     __asm__ __volatile__ ("di")
+
+#define local_save_flags(flags) \
+  __asm__ __volatile__ ("stsr %1, %0" : "=r" (flags) : "i" (SR_PSW))
+#define local_restore_flags(flags) \
+  __asm__ __volatile__ ("ldsr %0, %1" :: "r" (flags), "i" (SR_PSW))
+
+/* For spinlocks etc */
+#define local_irq_save(flags) \
+  do { local_save_flags (flags); local_irq_disable (); } while (0) 
+#define local_irq_restore(flags) \
+  local_restore_flags (flags);
+
+
+static inline int irqs_disabled (void)
+{
+        unsigned flags;
+        local_save_flags (flags);
+        return !!(flags & 0x20);
+}
+
+
+/*
+ * Force strict CPU ordering.
+ * Not really required on v850...
+ */
+#define nop()                   __asm__ __volatile__ ("nop")
+#define mb()                    __asm__ __volatile__ ("" ::: "memory")
+#define rmb()                   mb ()
+#define wmb()                   mb ()
+#define read_barrier_depends()  ((void)0)
+#define set_rmb(var, value)     do { xchg (&var, value); } while (0)
+#define set_mb(var, value)      set_rmb (var, value)
+#define set_wmb(var, value)     do { var = value; wmb (); } while (0)
+
+#define smp_mb()        mb ()
+#define smp_rmb()       rmb ()
+#define smp_wmb()       wmb ()
+#define smp_read_barrier_depends()      read_barrier_depends()
+
+#define xchg(ptr, with) \
+  ((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr))))
+#define tas(ptr) (xchg ((ptr), 1))
+
+extern inline unsigned long __xchg (unsigned long with,
+                                    __volatile__ void *ptr, int size)
+{
+        unsigned long tmp, flags;
+
+        local_irq_save (flags);
+
+        switch (size) {
+        case 1:
+                tmp = *(unsigned char *)ptr;
+                *(unsigned char *)ptr = with;
+                break;
+        case 2:
+                tmp = *(unsigned short *)ptr;
+                *(unsigned short *)ptr = with;
+                break;
+        case 4:
+                tmp = *(unsigned long *)ptr;
+                *(unsigned long *)ptr = with;
+                break;
+        }
+
+        local_irq_restore (flags);
+
+        return tmp;
+}
+
+#define arch_align_stack(x) (x)
+
+#endif /* __V850_SYSTEM_H__ */
diff --git a/include/asm-v850/teg.h b/include/asm-v850/teg.h
new file mode 100644
index 000000000000..acc8c7d95329
--- /dev/null
+++ b/include/asm-v850/teg.h
@@ -0,0 +1,101 @@
+/*
+ * include/asm-v850/teg.h -- NB85E-TEG cpu chip
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_TEG_H__
+#define __V850_TEG_H__
+
+
+/* The TEG uses the V850E cpu core.  */
+#include <asm/v850e.h>
+#include <asm/v850e_cache.h>
+
+
+#define CPU_MODEL       "v850e/nb85e-teg"
+#define CPU_MODEL_LONG  "NEC V850E/NB85E TEG"
+
+
+/* For <asm/entry.h> */
+/* We use on-chip RAM, for a few miscellaneous variables that must be
+   accessible using a load instruction relative to R0.  On the NB85E/TEG,
+   There's 60KB of iRAM starting at 0xFFFF0000, however we need the base
+   address to be addressable by a 16-bit signed offset, so we only use the
+   second half of it starting from 0xFFFF8000.  */
+#define R0_RAM_ADDR                     0xFFFF8000
+
+
+/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).
+   Some of these are parameterized even though there's only a single
+   interrupt, for compatibility with some generic code that works on other
+   processor models.  */
+#define IRQ_INTCMD(n)   6       /* interval timer interrupt */
+#define IRQ_INTCMD_NUM  1
+#define IRQ_INTSER(n)   16      /* UART reception error */
+#define IRQ_INTSER_NUM  1
+#define IRQ_INTSR(n)    17      /* UART reception completion */
+#define IRQ_INTSR_NUM   1
+#define IRQ_INTST(n)    18      /* UART transmission completion */
+#define IRQ_INTST_NUM   1
+
+/* For <asm/irq.h> */
+#define NUM_CPU_IRQS    64
+
+
+/* TEG UART details.  */
+#define V850E_UART_BASE_ADDR(n)         (0xFFFFF600 + 0x10 * (n))
+#define V850E_UART_ASIM_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x0)
+#define V850E_UART_ASIS_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x2)
+#define V850E_UART_ASIF_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x4)
+#define V850E_UART_CKSR_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x6)
+#define V850E_UART_BRGC_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x8)
+#define V850E_UART_TXB_ADDR(n)          (V850E_UART_BASE_ADDR(n) + 0xA)
+#define V850E_UART_RXB_ADDR(n)          (V850E_UART_BASE_ADDR(n) + 0xC)
+#define V850E_UART_NUM_CHANNELS         1
+#define V850E_UART_BASE_FREQ            CPU_CLOCK_FREQ
+/* This is a function that gets called before configuring the UART.  */
+#define V850E_UART_PRE_CONFIGURE        teg_uart_pre_configure
+#ifndef __ASSEMBLY__
+extern void teg_uart_pre_configure (unsigned chan,
+                                    unsigned cflags, unsigned baud);
+#endif
+
+
+/* The TEG RTPU.  */
+#define V850E_RTPU_BASE_ADDR            0xFFFFF210
+
+
+/* TEG series timer D details.  */
+#define V850E_TIMER_D_BASE_ADDR         0xFFFFF210
+#define V850E_TIMER_D_TMCD_BASE_ADDR    (V850E_TIMER_D_BASE_ADDR + 0x0)
+#define V850E_TIMER_D_TMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x4)
+#define V850E_TIMER_D_CMD_BASE_ADDR     (V850E_TIMER_D_BASE_ADDR + 0x8)
+#define V850E_TIMER_D_BASE_FREQ         CPU_CLOCK_FREQ
+
+
+/* `Interrupt Source Select' control register.  */
+#define TEG_ISS_ADDR                    0xFFFFF7FA
+#define TEG_ISS                         (*(volatile u8 *)TEG_ISS_ADDR)
+
+/* Port 0 I/O register (bits 0-3 used).  */
+#define TEG_PORT0_IO_ADDR               0xFFFFF7F2
+#define TEG_PORT0_IO                    (*(volatile u8 *)TEG_PORT0_IO_ADDR)
+/* Port 0 control register (bits 0-3 control mode, 0 = output, 1 = input).  */
+#define TEG_PORT0_PM_ADDR               0xFFFFF7F4
+#define TEG_PORT0_PM                    (*(volatile u8 *)TEG_PORT0_PM_ADDR)
+
+
+#ifndef __ASSEMBLY__
+extern void teg_init_irqs (void);
+#endif
+
+
+#endif /* __V850_TEG_H__ */
diff --git a/include/asm-v850/termbits.h b/include/asm-v850/termbits.h
new file mode 100644
index 000000000000..212d4e279263
--- /dev/null
+++ b/include/asm-v850/termbits.h
@@ -0,0 +1,175 @@
+#ifndef __V850_TERMBITS_H__
+#define __V850_TERMBITS_H__
+
+#include <linux/posix_types.h>
+
+typedef unsigned char   cc_t;
+typedef unsigned int    speed_t;
+typedef unsigned int    tcflag_t;
+
+#define NCCS 19
+struct termios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+};
+
+/* c_cc characters */
+#define VINTR 0
+#define VQUIT 1
+#define VERASE 2
+#define VKILL 3
+#define VEOF 4
+#define VTIME 5
+#define VMIN 6
+#define VSWTC 7
+#define VSTART 8
+#define VSTOP 9
+#define VSUSP 10
+#define VEOL 11
+#define VREPRINT 12
+#define VDISCARD 13
+#define VWERASE 14
+#define VLNEXT 15
+#define VEOL2 16
+
+
+/* c_iflag bits */
+#define IGNBRK  0000001
+#define BRKINT  0000002
+#define IGNPAR  0000004
+#define PARMRK  0000010
+#define INPCK   0000020
+#define ISTRIP  0000040
+#define INLCR   0000100
+#define IGNCR   0000200
+#define ICRNL   0000400
+#define IUCLC   0001000
+#define IXON    0002000
+#define IXANY   0004000
+#define IXOFF   0010000
+#define IMAXBEL 0020000
+#define IUTF8   0040000
+
+/* c_oflag bits */
+#define OPOST   0000001
+#define OLCUC   0000002
+#define ONLCR   0000004
+#define OCRNL   0000010
+#define ONOCR   0000020
+#define ONLRET  0000040
+#define OFILL   0000100
+#define OFDEL   0000200
+#define NLDLY   0000400
+#define   NL0   0000000
+#define   NL1   0000400
+#define CRDLY   0003000
+#define   CR0   0000000
+#define   CR1   0001000
+#define   CR2   0002000
+#define   CR3   0003000
+#define TABDLY  0014000
+#define   TAB0  0000000
+#define   TAB1  0004000
+#define   TAB2  0010000
+#define   TAB3  0014000
+#define   XTABS 0014000
+#define BSDLY   0020000
+#define   BS0   0000000
+#define   BS1   0020000
+#define VTDLY   0040000
+#define   VT0   0000000
+#define   VT1   0040000
+#define FFDLY   0100000
+#define   FF0   0000000
+#define   FF1   0100000
+
+/* c_cflag bit meaning */
+#define CBAUD   0010017
+#define  B0     0000000         /* hang up */
+#define  B50    0000001
+#define  B75    0000002
+#define  B110   0000003
+#define  B134   0000004
+#define  B150   0000005
+#define  B200   0000006
+#define  B300   0000007
+#define  B600   0000010
+#define  B1200  0000011
+#define  B1800  0000012
+#define  B2400  0000013
+#define  B4800  0000014
+#define  B9600  0000015
+#define  B19200 0000016
+#define  B38400 0000017
+#define EXTA B19200
+#define EXTB B38400
+#define CSIZE   0000060
+#define   CS5   0000000
+#define   CS6   0000020
+#define   CS7   0000040
+#define   CS8   0000060
+#define CSTOPB  0000100
+#define CREAD   0000200
+#define PARENB  0000400
+#define PARODD  0001000
+#define HUPCL   0002000
+#define CLOCAL  0004000
+#define CBAUDEX 0010000
+#define    B57600 0010001
+#define   B115200 0010002
+#define   B230400 0010003
+#define   B460800 0010004
+#define   B500000 0010005
+#define   B576000 0010006
+#define   B921600 0010007
+#define  B1000000 0010010
+#define  B1152000 0010011
+#define  B1500000 0010012
+#define  B2000000 0010013
+#define  B2500000 0010014
+#define  B3000000 0010015
+#define  B3500000 0010016
+#define  B4000000 0010017
+#define CIBAUD    002003600000  /* input baud rate (not used) */
+#define CMSPAR    010000000000          /* mark or space (stick) parity */
+#define CRTSCTS   020000000000          /* flow control */
+
+/* c_lflag bits */
+#define ISIG    0000001
+#define ICANON  0000002
+#define XCASE   0000004
+#define ECHO    0000010
+#define ECHOE   0000020
+#define ECHOK   0000040
+#define ECHONL  0000100
+#define NOFLSH  0000200
+#define TOSTOP  0000400
+#define ECHOCTL 0001000
+#define ECHOPRT 0002000
+#define ECHOKE  0004000
+#define FLUSHO  0010000
+#define PENDIN  0040000
+#define IEXTEN  0100000
+
+
+/* tcflow() and TCXONC use these */
+#define TCOOFF          0
+#define TCOON           1
+#define TCIOFF          2
+#define TCION           3
+
+/* tcflush() and TCFLSH use these */
+#define TCIFLUSH        0
+#define TCOFLUSH        1
+#define TCIOFLUSH       2
+
+/* tcsetattr uses these */
+#define TCSANOW         0
+#define TCSADRAIN       1
+#define TCSAFLUSH       2
+
+#endif /* __V850_TERMBITS_H__ */
diff --git a/include/asm-v850/termios.h b/include/asm-v850/termios.h
new file mode 100644
index 000000000000..79e97b59806e
--- /dev/null
+++ b/include/asm-v850/termios.h
@@ -0,0 +1,106 @@
+#ifndef __V850_TERMIOS_H__
+#define __V850_TERMIOS_H__
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+        unsigned short ws_row;
+        unsigned short ws_col;
+        unsigned short ws_xpixel;
+        unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+        unsigned short c_iflag;         /* input mode flags */
+        unsigned short c_oflag;         /* output mode flags */
+        unsigned short c_cflag;         /* control mode flags */
+        unsigned short c_lflag;         /* local mode flags */
+        unsigned char c_line;           /* line discipline */
+        unsigned char c_cc[NCC];        /* control characters */
+};
+
+/* modem lines */
+#define TIOCM_LE        0x001
+#define TIOCM_DTR       0x002
+#define TIOCM_RTS       0x004
+#define TIOCM_ST        0x008
+#define TIOCM_SR        0x010
+#define TIOCM_CTS       0x020
+#define TIOCM_CAR       0x040
+#define TIOCM_RNG       0x080
+#define TIOCM_DSR       0x100
+#define TIOCM_CD        TIOCM_CAR
+#define TIOCM_RI        TIOCM_RNG
+#define TIOCM_OUT1      0x2000
+#define TIOCM_OUT2      0x4000
+#define TIOCM_LOOP      0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+/* line disciplines */
+#define N_TTY           0
+#define N_SLIP          1
+#define N_MOUSE         2
+#define N_PPP           3
+#define N_STRIP         4
+#define N_AX25          5
+#define N_X25           6       /* X.25 async */
+#define N_6PACK         7
+#define N_MASC          8       /* Reserved for Mobitex module <kaz@cafe.net> */
+#define N_R3964         9       /* Reserved for Simatic R3964 module */
+#define N_PROFIBUS_FDL  10      /* Reserved for Profibus <Dave@mvhi.com> */
+#define N_IRDA          11      /* Linux IR - http://irda.sourceforge.net/ */
+#define N_SMSBLOCK      12      /* SMS block mode - for talking to GSM data cards about SMS messages */
+#define N_HDLC          13      /* synchronous HDLC */
+#define N_SYNC_PPP      14      /* synchronous PPP */
+#define N_HCI           15  /* Bluetooth HCI UART */
+
+#ifdef __KERNEL__
+
+/*      intr=^C         quit=^\         erase=del       kill=^U
+        eof=^D          vtime=\0        vmin=\1         sxtc=\0
+        start=^Q        stop=^S         susp=^Z         eol=\0
+        reprint=^R      discard=^U      werase=^W       lnext=^V
+        eol2=\0
+*/
+#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
+
+/*
+ * Translate a "termio" structure into a "termios". Ugh.
+ */
+#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
+        unsigned short __tmp; \
+        get_user(__tmp,&(termio)->x); \
+        *(unsigned short *) &(termios)->x = __tmp; \
+}
+
+#define user_termio_to_kernel_termios(termios, termio) \
+({ \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
+        copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
+})
+
+/*
+ * Translate a "termios" structure into a "termio". Ugh.
+ */
+#define kernel_termios_to_user_termio(termio, termios) \
+({ \
+        put_user((termios)->c_iflag, &(termio)->c_iflag); \
+        put_user((termios)->c_oflag, &(termio)->c_oflag); \
+        put_user((termios)->c_cflag, &(termio)->c_cflag); \
+        put_user((termios)->c_lflag, &(termio)->c_lflag); \
+        put_user((termios)->c_line,  &(termio)->c_line); \
+        copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
+})
+
+#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
+
+#endif  /* __KERNEL__ */
+
+#endif  /* __V850_TERMIOS_H__ */
diff --git a/include/asm-v850/thread_info.h b/include/asm-v850/thread_info.h
new file mode 100644
index 000000000000..e2ef44593752
--- /dev/null
+++ b/include/asm-v850/thread_info.h
@@ -0,0 +1,132 @@
+/*
+ * include/asm-v850/thread_info.h -- v850 low-level thread information
+ *
+ *  Copyright (C) 2002  NEC Corporation
+ *  Copyright (C) 2002  Miles Bader <miles@gnu.org>
+ *  Copyright (C) 2002  David Howells (dhowells@redhat.com)
+ *    - Incorporating suggestions made by Linus Torvalds and Dave Miller
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This file was derived from the PPC version, include/asm-ppc/thread_info.h
+ * which was adapted from the i386 version by Paul Mackerras
+ */
+
+#ifndef __V850_THREAD_INFO_H__
+#define __V850_THREAD_INFO_H__
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+/*
+ * low level task data.
+ * If you change this, change the TI_* offsets below to match.
+ */
+struct thread_info {
+        struct task_struct      *task;          /* main task structure */
+        struct exec_domain      *exec_domain;   /* execution domain */
+        unsigned long           flags;          /* low level flags */
+        int                     cpu;            /* cpu we're on */
+        int                     preempt_count;
+        struct restart_block    restart_block;
+};
+
+#define INIT_THREAD_INFO(tsk)                                                 \
+{                                                                             \
+        .task =         &tsk,                                                 \
+        .exec_domain =  &default_exec_domain,                                 \
+        .flags =        0,                                                    \
+        .cpu =          0,                                                    \
+        .preempt_count = 1,                                                   \
+        .restart_block = {                                                    \
+                .fn = do_no_restart_syscall,                                  \
+        },                                                                    \
+}
+
+#define init_thread_info        (init_thread_union.thread_info)
+#define init_stack              (init_thread_union.stack)
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ */
+
+/* thread information allocation */
+#define alloc_thread_info(tsk) ((struct thread_info *) \
+                                __get_free_pages(GFP_KERNEL, 1))
+#define free_thread_info(ti)    free_pages((unsigned long) (ti), 1)
+#define get_thread_info(ti)     get_task_struct((ti)->task)
+#define put_thread_info(ti)     put_task_struct((ti)->task)
+
+#endif /* __ASSEMBLY__ */
+
+
+/*
+ * Offsets in thread_info structure, used in assembly code
+ */
+#define TI_TASK         0
+#define TI_EXECDOMAIN   4
+#define TI_FLAGS        8
+#define TI_CPU          12
+#define TI_PREEMPT      16
+
+#define PREEMPT_ACTIVE          0x4000000
+
+/*
+ * thread information flag bit numbers
+ */
+#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
+#define TIF_NOTIFY_RESUME       1       /* resumption notification requested */
+#define TIF_SIGPENDING          2       /* signal pending */
+#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
+#define TIF_POLLING_NRFLAG      4       /* true if poll_idle() is polling
+                                           TIF_NEED_RESCHED */
+#define TIF_MEMDIE              5
+
+/* as above, but as bit values */
+#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
+#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
+#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
+
+
+/* Size of kernel stack for each process.  */
+#define THREAD_SIZE             0x2000
+
+/* The alignment of kernel threads, with thread_info structures at their
+   base.  Thus, a pointer for a task's task structure can be derived from
+   its kernel stack pointer.  */
+#define THREAD_ALIGNMENT        THREAD_SIZE
+#define THREAD_MASK             (-THREAD_ALIGNMENT)
+
+
+#ifdef __ASSEMBLY__
+
+/* Put a pointer to the current thread_info structure into REG.  Note that
+   this definition requires THREAD_MASK to be representable as a signed
+   16-bit value.  */
+#define GET_CURRENT_THREAD(reg)                                         \
+        /* Use `addi' and then `and' instead of just `andi', because    \
+           `addi' sign-extends the immediate value, whereas `andi'      \
+           zero-extends it.  */                                         \
+        addi    THREAD_MASK, r0, reg;                                   \
+        and     sp, reg
+
+#else
+
+/* Return a pointer to the current thread_info structure.  */
+static inline struct thread_info *current_thread_info (void)
+{
+        register unsigned long sp __asm__ ("sp");
+        return (struct thread_info *)(sp & THREAD_MASK);
+}
+
+#endif /* __ASSEMBLY__ */
+
+
+#endif /* __KERNEL__ */
+
+#endif /* __V850_THREAD_INFO_H__ */
diff --git a/include/asm-v850/timex.h b/include/asm-v850/timex.h
new file mode 100644
index 000000000000..6279e5a0ee8e
--- /dev/null
+++ b/include/asm-v850/timex.h
@@ -0,0 +1,18 @@
+/*
+ * linux/include/asm-v850/timex.h
+ *
+ * v850 architecture timex specifications
+ */
+#ifndef __V850_TIMEX_H__
+#define __V850_TIMEX_H__
+
+#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
+
+typedef unsigned long cycles_t;
+
+static inline cycles_t get_cycles(void)
+{
+        return 0;
+}
+
+#endif /* __V850_TIMEX_H__ */
diff --git a/include/asm-v850/tlb.h b/include/asm-v850/tlb.h
new file mode 100644
index 000000000000..73bc9ead40dd
--- /dev/null
+++ b/include/asm-v850/tlb.h
@@ -0,0 +1,21 @@
+/*
+ * include/asm-v850/tlb.h
+ *
+ *  Copyright (C) 2002  NEC Corporation
+ *  Copyright (C) 2002  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_TLB_H__
+#define __V850_TLB_H__
+
+#define tlb_flush(tlb)  ((void)0)
+
+#include <asm-generic/tlb.h>
+
+#endif /* __V850_TLB_H__ */
diff --git a/include/asm-v850/tlbflush.h b/include/asm-v850/tlbflush.h
new file mode 100644
index 000000000000..501e4498172c
--- /dev/null
+++ b/include/asm-v850/tlbflush.h
@@ -0,0 +1,70 @@
+/*
+ * include/asm-v850/tlbflush.h
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_TLBFLUSH_H__
+#define __V850_TLBFLUSH_H__
+
+#include <asm/machdep.h>
+
+
+/*
+ * flush all user-space atc entries.
+ */
+static inline void __flush_tlb(void)
+{
+        BUG ();
+}
+
+static inline void __flush_tlb_one(unsigned long addr)
+{
+        BUG ();
+}
+
+#define flush_tlb() __flush_tlb()
+
+/*
+ * flush all atc entries (both kernel and user-space entries).
+ */
+static inline void flush_tlb_all(void)
+{
+        BUG ();
+}
+
+static inline void flush_tlb_mm(struct mm_struct *mm)
+{
+        BUG ();
+}
+
+static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
+{
+        BUG ();
+}
+
+static inline void flush_tlb_range(struct vm_area_struct *vma,
+                                   unsigned long start, unsigned long end)
+{
+        BUG ();
+}
+
+extern inline void flush_tlb_kernel_page(unsigned long addr)
+{
+        BUG ();
+}
+
+extern inline void flush_tlb_pgtables(struct mm_struct *mm,
+                                      unsigned long start, unsigned long end)
+{
+        BUG ();
+}
+
+#endif /* __V850_TLBFLUSH_H__ */
diff --git a/include/asm-v850/topology.h b/include/asm-v850/topology.h
new file mode 100644
index 000000000000..6040e41d7945
--- /dev/null
+++ b/include/asm-v850/topology.h
@@ -0,0 +1,6 @@
+#ifndef __V850_TOPOLOGY_H__
+#define __V850_TOPOLOGY_H__
+
+#include <asm-generic/topology.h>
+
+#endif /* __V850_TOPOLOGY_H__ */
diff --git a/include/asm-v850/types.h b/include/asm-v850/types.h
new file mode 100644
index 000000000000..e7cfe5b33a10
--- /dev/null
+++ b/include/asm-v850/types.h
@@ -0,0 +1,68 @@
+#ifndef __V850_TYPES_H__
+#define __V850_TYPES_H__
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This file is never included by application software unless
+ * explicitly requested (e.g., via linux/types.h) in which case the
+ * application is Linux specific so (user-) name space pollution is
+ * not a major issue.  However, for interoperability, libraries still
+ * need to be careful to avoid a name clashes.
+ */
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+#define BITS_PER_LONG 32
+
+#ifndef __ASSEMBLY__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+/* Dma addresses are 32-bits wide.  */
+
+typedef u32 dma_addr_t;
+
+typedef unsigned int kmem_bufctl_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* __V850_TYPES_H__ */
diff --git a/include/asm-v850/uaccess.h b/include/asm-v850/uaccess.h
new file mode 100644
index 000000000000..4386cfc6a8dd
--- /dev/null
+++ b/include/asm-v850/uaccess.h
@@ -0,0 +1,165 @@
+#ifndef __V850_UACCESS_H__
+#define __V850_UACCESS_H__
+
+/*
+ * User space memory access functions
+ */
+
+#include <linux/errno.h>
+#include <linux/string.h>
+
+#include <asm/segment.h>
+#include <asm/machdep.h>
+
+#define VERIFY_READ     0
+#define VERIFY_WRITE    1
+
+extern inline int access_ok (int type, const void *addr, unsigned long size)
+{
+        /* XXX I guess we should check against real ram bounds at least, and
+           possibly make sure ADDR is not within the kernel.
+           For now we just check to make sure it's not a small positive
+           or negative value, as that will at least catch some kinds of
+           error.  In particular, we make sure that ADDR's not within the
+           interrupt vector area, which we know starts at zero, or within the
+           peripheral-I/O area, which is located just _before_ zero.  */
+        unsigned long val = (unsigned long)addr;
+        return val >= (0x80 + NUM_CPU_IRQS*16) && val < 0xFFFFF000;
+}
+
+/* this function will go away soon - use access_ok() instead */
+extern inline int __deprecated verify_area (int type, const void *addr, unsigned long size)
+{
+        return access_ok (type, addr, size) ? 0 : -EFAULT;
+}
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue.  No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry
+{
+        unsigned long insn, fixup;
+};
+
+/* Returns 0 if exception not found and fixup otherwise.  */
+extern unsigned long search_exception_table (unsigned long);
+
+
+/*
+ * These are the main single-value transfer routines.  They automatically
+ * use the right size if we just have the right pointer type.
+ */
+
+extern int bad_user_access_length (void);
+
+#define __get_user(var, ptr)                                                  \
+  ({                                                                          \
+          int __gu_err = 0;                                                   \
+          typeof(*(ptr)) __gu_val = 0;                                        \
+          switch (sizeof (*(ptr))) {                                          \
+          case 1:                                                             \
+          case 2:                                                             \
+          case 4:                                                             \
+                  __gu_val = *(ptr);                                          \
+                  break;                                                      \
+          case 8:                                                             \
+                  memcpy(&__gu_val, ptr, sizeof(__gu_val));                   \
+                  break;                                                      \
+          default:                                                            \
+                  __gu_val = 0;                                               \
+                  __gu_err = __get_user_bad ();                               \
+                  break;                                                      \
+          }                                                                   \
+          (var) = __gu_val;                                                   \
+          __gu_err;                                                           \
+  })
+#define __get_user_bad()        (bad_user_access_length (), (-EFAULT))
+
+#define __put_user(var, ptr)                                                  \
+  ({                                                                          \
+          int __pu_err = 0;                                                   \
+          switch (sizeof (*(ptr))) {                                          \
+          case 1:                                                             \
+          case 2:                                                             \
+          case 4:                                                             \
+                  *(ptr) = (var);                                             \
+                  break;                                                      \
+          case 8: {                                                           \
+                  typeof(*(ptr)) __pu_val = 0;                                \
+                  memcpy(ptr, &__pu_val, sizeof(__pu_val));                   \
+                  }                                                           \
+                  break;                                                      \
+          default:                                                            \
+                  __pu_err = __put_user_bad ();                               \
+                  break;                                                      \
+          }                                                                   \
+          __pu_err;                                                           \
+  })
+#define __put_user_bad()        (bad_user_access_length (), (-EFAULT))
+
+#define put_user(x, ptr)        __put_user(x, ptr)
+#define get_user(x, ptr)        __get_user(x, ptr)
+
+#define __copy_from_user(to, from, n)   (memcpy (to, from, n), 0)
+#define __copy_to_user(to, from, n)     (memcpy(to, from, n), 0)
+
+#define __copy_to_user_inatomic __copy_to_user
+#define __copy_from_user_inatomic __copy_from_user
+
+#define copy_from_user(to, from, n)     __copy_from_user (to, from, n)
+#define copy_to_user(to, from, n)       __copy_to_user(to, from, n)
+
+#define copy_to_user_ret(to,from,n,retval) \
+  ({ if (copy_to_user (to,from,n)) return retval; })
+
+#define copy_from_user_ret(to,from,n,retval) \
+  ({ if (copy_from_user (to,from,n)) return retval; })
+
+/*
+ * Copy a null terminated string from userspace.
+ */
+
+static inline long
+strncpy_from_user (char *dst, const char *src, long count)
+{
+        char *tmp;
+        strncpy (dst, src, count);
+        for (tmp = dst; *tmp && count > 0; tmp++, count--)
+                ;
+        return tmp - dst;
+}
+
+/*
+ * Return the size of a string (including the ending 0)
+ *
+ * Return 0 on exception, a value greater than N if too long
+ */
+static inline long strnlen_user (const char *src, long n)
+{
+        return strlen (src) + 1;
+}
+
+#define strlen_user(str)        strnlen_user (str, 32767)
+
+/*
+ * Zero Userspace
+ */
+
+static inline unsigned long
+clear_user (void *to, unsigned long n)
+{
+        memset (to, 0, n);
+        return 0;
+}
+
+#endif /* __V850_UACCESS_H__ */
diff --git a/include/asm-v850/ucontext.h b/include/asm-v850/ucontext.h
new file mode 100644
index 000000000000..303c21590cff
--- /dev/null
+++ b/include/asm-v850/ucontext.h
@@ -0,0 +1,14 @@
+#ifndef __V850_UCONTEXT_H__
+#define __V850_UCONTEXT_H__
+
+#include <asm/sigcontext.h>
+
+struct ucontext {
+        unsigned long     uc_flags;
+        struct ucontext  *uc_link;
+        stack_t           uc_stack;
+        struct sigcontext uc_mcontext;
+        sigset_t          uc_sigmask;   /* mask last for extensibility */
+};
+
+#endif /* __V850_UCONTEXT_H__ */
diff --git a/include/asm-v850/unaligned.h b/include/asm-v850/unaligned.h
new file mode 100644
index 000000000000..65e38362142b
--- /dev/null
+++ b/include/asm-v850/unaligned.h
@@ -0,0 +1,130 @@
+/*
+ * include/asm-v850/unaligned.h -- Unaligned memory access
+ *
+ *  Copyright (C) 2001  NEC Corporation
+ *  Copyright (C) 2001  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This file is a copy of the arm version, include/asm-arm/unaligned.h
+ *
+ * Note that some v850 chips support unaligned access, but it seems too
+ * annoying to use.
+ */
+
+#ifndef __V850_UNALIGNED_H__
+#define __V850_UNALIGNED_H__
+
+#include <asm/types.h>
+
+extern int __bug_unaligned_x(void *ptr);
+
+/*
+ * What is the most efficient way of loading/storing an unaligned value?
+ *
+ * That is the subject of this file.  Efficiency here is defined as
+ * minimum code size with minimum register usage for the common cases.
+ * It is currently not believed that long longs are common, so we
+ * trade efficiency for the chars, shorts and longs against the long
+ * longs.
+ *
+ * Current stats with gcc 2.7.2.2 for these functions:
+ *
+ *      ptrsize get:    code    regs    put:    code    regs
+ *      1               1       1               1       2
+ *      2               3       2               3       2
+ *      4               7       3               7       3
+ *      8               20      6               16      6
+ *
+ * gcc 2.95.1 seems to code differently:
+ *
+ *      ptrsize get:    code    regs    put:    code    regs
+ *      1               1       1               1       2
+ *      2               3       2               3       2
+ *      4               7       4               7       4
+ *      8               19      8               15      6
+ *
+ * which may or may not be more efficient (depending upon whether
+ * you can afford the extra registers).  Hopefully the gcc 2.95
+ * is inteligent enough to decide if it is better to use the
+ * extra register, but evidence so far seems to suggest otherwise.
+ *
+ * Unfortunately, gcc is not able to optimise the high word
+ * out of long long >> 32, or the low word from long long << 32
+ */
+
+#define __get_unaligned_2(__p)                                  \
+        (__p[0] | __p[1] << 8)
+
+#define __get_unaligned_4(__p)                                  \
+        (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24)
+
+#define get_unaligned(ptr)                                      \
+        ({                                                      \
+                __typeof__(*(ptr)) __v;                         \
+                __u8 *__p = (__u8 *)(ptr);                      \
+                switch (sizeof(*(ptr))) {                       \
+                case 1: __v = *(ptr);                   break;  \
+                case 2: __v = __get_unaligned_2(__p);   break;  \
+                case 4: __v = __get_unaligned_4(__p);   break;  \
+                case 8: {                                       \
+                                unsigned int __v1, __v2;        \
+                                __v2 = __get_unaligned_4((__p+4)); \
+                                __v1 = __get_unaligned_4(__p);  \
+                                __v = ((unsigned long long)__v2 << 32 | __v1);  \
+                        }                                       \
+                        break;                                  \
+                default: __v = __bug_unaligned_x(__p);  break;  \
+                }                                               \
+                __v;                                            \
+        })
+
+
+extern inline void __put_unaligned_2(__u32 __v, register __u8 *__p)
+{
+        *__p++ = __v;
+        *__p++ = __v >> 8;
+}
+
+extern inline void __put_unaligned_4(__u32 __v, register __u8 *__p)
+{
+        __put_unaligned_2(__v >> 16, __p + 2);
+        __put_unaligned_2(__v, __p);
+}
+
+extern inline void __put_unaligned_8(const unsigned long long __v, register __u8 *__p)
+{
+        /*
+         * tradeoff: 8 bytes of stack for all unaligned puts (2
+         * instructions), or an extra register in the long long
+         * case - go for the extra register.
+         */
+        __put_unaligned_4(__v >> 32, __p+4);
+        __put_unaligned_4(__v, __p);
+}
+
+/*
+ * Try to store an unaligned value as efficiently as possible.
+ */
+#define put_unaligned(val,ptr)                                  \
+        ({                                                      \
+                switch (sizeof(*(ptr))) {                       \
+                case 1:                                         \
+                        *(ptr) = (val);                         \
+                        break;                                  \
+                case 2: __put_unaligned_2((val),(__u8 *)(ptr)); \
+                        break;                                  \
+                case 4: __put_unaligned_4((val),(__u8 *)(ptr)); \
+                        break;                                  \
+                case 8: __put_unaligned_8((val),(__u8 *)(ptr)); \
+                        break;                                  \
+                default: __bug_unaligned_x(ptr);                \
+                        break;                                  \
+                }                                               \
+                (void) 0;                                       \
+        })
+
+
+#endif /* __V850_UNALIGNED_H__ */
diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h
new file mode 100644
index 000000000000..3b552096c0e8
--- /dev/null
+++ b/include/asm-v850/unistd.h
@@ -0,0 +1,477 @@
+/*
+ * include/asm-v850/unistd.h -- System call numbers and invocation mechanism
+ *
+ *  Copyright (C) 2001,02,03,04  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03,04  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_UNISTD_H__
+#define __V850_UNISTD_H__
+
+#include <asm/clinkage.h>
+
+#define __NR_restart_syscall      0
+#define __NR_exit                 1
+#define __NR_fork                 2
+#define __NR_read                 3
+#define __NR_write                4
+#define __NR_open                 5
+#define __NR_close                6
+#define __NR_waitpid              7
+#define __NR_creat                8
+#define __NR_link                 9
+#define __NR_unlink              10
+#define __NR_execve              11
+#define __NR_chdir               12
+#define __NR_time                13
+#define __NR_mknod               14
+#define __NR_chmod               15
+#define __NR_chown               16
+#define __NR_break               17
+#define __NR_lseek               19
+#define __NR_getpid              20
+#define __NR_mount               21
+#define __NR_umount              22
+#define __NR_setuid              23
+#define __NR_getuid              24
+#define __NR_stime               25
+#define __NR_ptrace              26
+#define __NR_alarm               27
+#define __NR_pause               29
+#define __NR_utime               30
+#define __NR_stty                31
+#define __NR_gtty                32
+#define __NR_access              33
+#define __NR_nice                34
+#define __NR_ftime               35
+#define __NR_sync                36
+#define __NR_kill                37
+#define __NR_rename              38
+#define __NR_mkdir               39
+#define __NR_rmdir               40
+#define __NR_dup                 41
+#define __NR_pipe                42
+#define __NR_times               43
+#define __NR_prof                44
+#define __NR_brk                 45
+#define __NR_setgid              46
+#define __NR_getgid              47
+#define __NR_signal              48
+#define __NR_geteuid             49
+#define __NR_getegid             50
+#define __NR_acct                51
+#define __NR_umount2             52
+#define __NR_lock                53
+#define __NR_ioctl               54
+#define __NR_fcntl               55
+#define __NR_setpgid             57
+#define __NR_umask               60
+#define __NR_chroot              61
+#define __NR_ustat               62
+#define __NR_dup2                63
+#define __NR_getppid             64
+#define __NR_getpgrp             65
+#define __NR_setsid              66
+#define __NR_sigaction           67
+#define __NR_sgetmask            68
+#define __NR_ssetmask            69
+#define __NR_setreuid            70
+#define __NR_setregid            71
+#define __NR_sigsuspend          72
+#define __NR_sigpending          73
+#define __NR_sethostname         74
+#define __NR_setrlimit           75
+#define __NR_ugetrlimit          76
+#define __NR_getrusage           77
+#define __NR_gettimeofday        78
+#define __NR_settimeofday        79
+#define __NR_getgroups           80
+#define __NR_setgroups           81
+#define __NR_select              82
+#define __NR_symlink             83
+#define __NR_readlink            85
+#define __NR_uselib              86
+#define __NR_swapon              87
+#define __NR_reboot              88
+#define __NR_readdir             89
+#define __NR_mmap                90
+#define __NR_munmap              91
+#define __NR_truncate            92
+#define __NR_ftruncate           93
+#define __NR_fchmod              94
+#define __NR_fchown              95
+#define __NR_getpriority         96
+#define __NR_setpriority         97
+#define __NR_profil              98
+#define __NR_statfs              99
+#define __NR_fstatfs            100
+#define __NR_socketcall         102
+#define __NR_syslog             103
+#define __NR_setitimer          104
+#define __NR_getitimer          105
+#define __NR_stat               106
+#define __NR_lstat              107
+#define __NR_fstat              108
+#define __NR_vhangup            111
+#define __NR_wait4              114
+#define __NR_swapoff            115
+#define __NR_sysinfo            116
+#define __NR_ipc                117
+#define __NR_fsync              118
+#define __NR_sigreturn          119
+#define __NR_clone              120
+#define __NR_setdomainname      121
+#define __NR_uname              122
+#define __NR_cacheflush         123
+#define __NR_adjtimex           124
+#define __NR_mprotect           125
+#define __NR_sigprocmask        126
+#define __NR_create_module      127
+#define __NR_init_module        128
+#define __NR_delete_module      129
+#define __NR_get_kernel_syms    130
+#define __NR_quotactl           131
+#define __NR_getpgid            132
+#define __NR_fchdir             133
+#define __NR_bdflush            134
+#define __NR_sysfs              135
+#define __NR_personality        136
+#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
+#define __NR_setfsuid           138
+#define __NR_setfsgid           139
+#define __NR__llseek            140
+#define __NR_getdents           141
+#define __NR_flock              143
+#define __NR_msync              144
+#define __NR_readv              145
+#define __NR_writev             146
+#define __NR_getsid             147
+#define __NR_fdatasync          148
+#define __NR__sysctl            149
+#define __NR_mlock              150
+#define __NR_munlock            151
+#define __NR_mlockall           152
+#define __NR_munlockall         153
+#define __NR_sched_setparam             154
+#define __NR_sched_getparam             155
+#define __NR_sched_setscheduler         156
+#define __NR_sched_getscheduler         157
+#define __NR_sched_yield                158
+#define __NR_sched_get_priority_max     159
+#define __NR_sched_get_priority_min     160
+#define __NR_sched_rr_get_interval      161
+#define __NR_nanosleep          162
+#define __NR_mremap             163
+#define __NR_setresuid          164
+#define __NR_getresuid          165
+#define __NR_query_module       167
+#define __NR_poll               168
+#define __NR_nfsservctl         169
+#define __NR_setresgid          170
+#define __NR_getresgid          171
+#define __NR_prctl              172
+#define __NR_rt_sigreturn       173
+#define __NR_rt_sigaction       174
+#define __NR_rt_sigprocmask     175
+#define __NR_rt_sigpending      176
+#define __NR_rt_sigtimedwait    177
+#define __NR_rt_sigqueueinfo    178
+#define __NR_rt_sigsuspend      179
+#define __NR_pread              180
+#define __NR_pwrite             181
+#define __NR_lchown             182
+#define __NR_getcwd             183
+#define __NR_capget             184
+#define __NR_capset             185
+#define __NR_sigaltstack        186
+#define __NR_sendfile           187
+#define __NR_getpmsg            188     /* some people actually want streams */
+#define __NR_putpmsg            189     /* some people actually want streams */
+#define __NR_vfork              190
+#define __NR_mmap2              192
+#define __NR_truncate64         193
+#define __NR_ftruncate64        194
+#define __NR_stat64             195
+#define __NR_lstat64            196
+#define __NR_fstat64            197
+#define __NR_fcntl64            198
+#define __NR_getdents64         199
+#define __NR_pivot_root         200
+#define __NR_gettid             201
+#define __NR_tkill              202
+
+
+/* Syscall protocol:
+   Syscall number in r12, args in r6-r9, r13-r14
+   Return value in r10
+   Trap 0 for `short' syscalls, where all the args can fit in function
+   call argument registers, and trap 1 when there are additional args in
+   r13-r14.  */
+
+#define SYSCALL_NUM     "r12"
+#define SYSCALL_ARG0    "r6"
+#define SYSCALL_ARG1    "r7"
+#define SYSCALL_ARG2    "r8"
+#define SYSCALL_ARG3    "r9"
+#define SYSCALL_ARG4    "r13"
+#define SYSCALL_ARG5    "r14"
+#define SYSCALL_RET     "r10"
+
+#define SYSCALL_SHORT_TRAP      "0"
+#define SYSCALL_LONG_TRAP       "1"
+
+/* Registers clobbered by any syscall.  This _doesn't_ include the syscall
+   number (r12) or the `extended arg' registers (r13, r14), even though
+   they are actually clobbered too (this is because gcc's `asm' statement
+   doesn't allow a clobber to be used as an input or output).  */
+#define SYSCALL_CLOBBERS        "r1", "r5", "r11", "r15", "r16", \
+                                "r17", "r18", "r19"
+
+/* Registers clobbered by a `short' syscall.  This includes all clobbers
+   except the syscall number (r12).  */
+#define SYSCALL_SHORT_CLOBBERS  SYSCALL_CLOBBERS, "r13", "r14"
+
+
+/* User programs sometimes end up including this header file
+   (indirectly, via uClibc header files), so I'm a bit nervous just
+   including <linux/compiler.h>.  */
+#if !defined(__builtin_expect) && __GNUC__ == 2 && __GNUC_MINOR__ < 96
+#define __builtin_expect(x, expected_value) (x)
+#endif
+
+#define __syscall_return(type, res)                                           \
+  do {                                                                        \
+          /* user-visible error numbers are in the range -1 - -124:           \
+             see <asm-v850/errno.h> */                                        \
+          if (__builtin_expect ((unsigned long)(res) >= (unsigned long)(-125), 0)) { \
+                  errno = -(res);                                             \
+                  res = -1;                                                   \
+          }                                                                   \
+          return (type) (res);                                                \
+  } while (0)
+
+
+#define _syscall0(type, name)                                                 \
+type name (void)                                                              \
+{                                                                             \
+  register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name;       \
+  register unsigned long __ret __asm__ (SYSCALL_RET);                         \
+  __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP                            \
+                        : "=r" (__ret), "=r" (__syscall)                      \
+                        : "1" (__syscall)                                     \
+                        : SYSCALL_SHORT_CLOBBERS);                            \
+  __syscall_return (type, __ret);                                             \
+}
+
+#define _syscall1(type, name, atype, a)                                       \
+type name (atype a)                                                           \
+{                                                                             \
+  register atype __a __asm__ (SYSCALL_ARG0) = a;                              \
+  register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name;       \
+  register unsigned long __ret __asm__ (SYSCALL_RET);                         \
+  __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP                            \
+                        : "=r" (__ret), "=r" (__syscall)                      \
+                        : "1" (__syscall), "r" (__a)                          \
+                        : SYSCALL_SHORT_CLOBBERS);                            \
+  __syscall_return (type, __ret);                                             \
+}
+
+#define _syscall2(type, name, atype, a, btype, b)                             \
+type name (atype a, btype b)                                                  \
+{                                                                             \
+  register atype __a __asm__ (SYSCALL_ARG0) = a;                              \
+  register btype __b __asm__ (SYSCALL_ARG1) = b;                              \
+  register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name;       \
+  register unsigned long __ret __asm__ (SYSCALL_RET);                         \
+  __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP                            \
+                        : "=r" (__ret), "=r" (__syscall)                      \
+                        : "1" (__syscall), "r" (__a), "r" (__b)               \
+                        : SYSCALL_SHORT_CLOBBERS);                            \
+  __syscall_return (type, __ret);                                             \
+}
+
+#define _syscall3(type, name, atype, a, btype, b, ctype, c)                   \
+type name (atype a, btype b, ctype c)                                         \
+{                                                                             \
+  register atype __a __asm__ (SYSCALL_ARG0) = a;                              \
+  register btype __b __asm__ (SYSCALL_ARG1) = b;                              \
+  register ctype __c __asm__ (SYSCALL_ARG2) = c;                              \
+  register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name;       \
+  register unsigned long __ret __asm__ (SYSCALL_RET);                         \
+  __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP                            \
+                        : "=r" (__ret), "=r" (__syscall)                      \
+                        : "1" (__syscall), "r" (__a), "r" (__b), "r" (__c)    \
+                        : SYSCALL_SHORT_CLOBBERS);                            \
+  __syscall_return (type, __ret);                                             \
+}
+
+#define _syscall4(type, name, atype, a, btype, b, ctype, c, dtype, d)         \
+type name (atype a, btype b, ctype c, dtype d)                                \
+{                                                                             \
+  register atype __a __asm__ (SYSCALL_ARG0) = a;                              \
+  register btype __b __asm__ (SYSCALL_ARG1) = b;                              \
+  register ctype __c __asm__ (SYSCALL_ARG2) = c;                              \
+  register dtype __d __asm__ (SYSCALL_ARG3) = d;                              \
+  register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name;       \
+  register unsigned long __ret __asm__ (SYSCALL_RET);                         \
+  __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP                            \
+                        : "=r" (__ret), "=r" (__syscall)                      \
+                        : "1" (__syscall),                                    \
+                        "r" (__a), "r" (__b), "r" (__c), "r" (__d)            \
+                        : SYSCALL_SHORT_CLOBBERS);                            \
+  __syscall_return (type, __ret);                                             \
+}
+
+#define _syscall5(type, name, atype, a, btype, b, ctype, c, dtype, d, etype,e)\
+type name (atype a, btype b, ctype c, dtype d, etype e)                       \
+{                                                                             \
+  register atype __a __asm__ (SYSCALL_ARG0) = a;                              \
+  register btype __b __asm__ (SYSCALL_ARG1) = b;                              \
+  register ctype __c __asm__ (SYSCALL_ARG2) = c;                              \
+  register dtype __d __asm__ (SYSCALL_ARG3) = d;                              \
+  register etype __e __asm__ (SYSCALL_ARG4) = e;                              \
+  register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name;       \
+  register unsigned long __ret __asm__ (SYSCALL_RET);                         \
+  __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP                             \
+                        : "=r" (__ret), "=r" (__syscall), "=r" (__e)          \
+                        : "1" (__syscall),                                    \
+                        "r" (__a), "r" (__b), "r" (__c), "r" (__d), "2" (__e) \
+                        : SYSCALL_CLOBBERS);                                  \
+  __syscall_return (type, __ret);                                             \
+}
+
+#if __GNUC__ < 3
+/* In older versions of gcc, `asm' statements with more than 10
+   input/output arguments produce a fatal error.  To work around this
+   problem, we use two versions, one for gcc-3.x and one for earlier
+   versions of gcc (the `earlier gcc' version doesn't work with gcc-3.x
+   because gcc-3.x doesn't allow clobbers to also be input arguments).  */
+#define __SYSCALL6_TRAP(syscall, ret, a, b, c, d, e, f)                       \
+  __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP                             \
+                        : "=r" (ret), "=r" (syscall)                          \
+                        : "1" (syscall),                                      \
+                        "r" (a), "r" (b), "r" (c), "r" (d),                   \
+                        "r" (e), "r" (f)                                      \
+                        : SYSCALL_CLOBBERS, SYSCALL_ARG4, SYSCALL_ARG5);
+#else /* __GNUC__ >= 3 */
+#define __SYSCALL6_TRAP(syscall, ret, a, b, c, d, e, f)                       \
+  __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP                             \
+                        : "=r" (ret), "=r" (syscall),                         \
+                        "=r" (e), "=r" (f)                                    \
+                        : "1" (syscall),                                      \
+                        "r" (a), "r" (b), "r" (c), "r" (d),                   \
+                        "2" (e), "3" (f)                                      \
+                        : SYSCALL_CLOBBERS);
+#endif
+
+#define _syscall6(type, name, atype, a, btype, b, ctype, c, dtype, d, etype, e, ftype, f) \
+type name (atype a, btype b, ctype c, dtype d, etype e, ftype f)              \
+{                                                                             \
+  register atype __a __asm__ (SYSCALL_ARG0) = a;                              \
+  register btype __b __asm__ (SYSCALL_ARG1) = b;                              \
+  register ctype __c __asm__ (SYSCALL_ARG2) = c;                              \
+  register dtype __d __asm__ (SYSCALL_ARG3) = d;                              \
+  register etype __e __asm__ (SYSCALL_ARG4) = e;                              \
+  register etype __f __asm__ (SYSCALL_ARG5) = f;                              \
+  register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name;       \
+  register unsigned long __ret __asm__ (SYSCALL_RET);                         \
+  __SYSCALL6_TRAP(__syscall, __ret, __a, __b, __c, __d, __e, __f);            \
+  __syscall_return (type, __ret);                                             \
+}
+                
+
+#ifdef __KERNEL__
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+#endif
+
+#ifdef __KERNEL_SYSCALLS__
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+/*
+ * we need this inline - forking from kernel space will result
+ * in NO COPY ON WRITE (!!!), until an execve is executed. This
+ * is no problem, but for the stack. This is handled by not letting
+ * main() use the stack at all after fork(). Thus, no function
+ * calls - which means inline code for fork too, as otherwise we
+ * would use the stack upon exit from 'fork()'.
+ *
+ * Actually only pause and fork are needed inline, so that there
+ * won't be any messing with the stack from main(), but we define
+ * some others too.
+ */
+#define __NR__exit __NR_exit
+extern inline _syscall0(pid_t,setsid)
+extern inline _syscall3(int,write,int,fd,const char *,buf,off_t,count)
+extern inline _syscall3(int,read,int,fd,char *,buf,off_t,count)
+extern inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count)
+extern inline _syscall1(int,dup,int,fd)
+extern inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
+extern inline _syscall3(int,open,const char *,file,int,flag,int,mode)
+extern inline _syscall1(int,close,int,fd)
+extern inline _syscall1(int,_exit,int,exitcode)
+extern inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options)
+
+extern inline pid_t wait(int * wait_stat)
+{
+        return waitpid (-1, wait_stat, 0);
+}
+
+unsigned long sys_mmap(unsigned long addr, size_t len,
+                        unsigned long prot, unsigned long flags,
+                        unsigned long fd, off_t offset);
+unsigned long sys_mmap2(unsigned long addr, size_t len,
+                        unsigned long prot, unsigned long flags,
+                        unsigned long fd, unsigned long pgoff);
+struct pt_regs;
+int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs);
+int sys_pipe (int *fildes);
+int sys_ptrace(long request, long pid, long addr, long data);
+struct sigaction;
+asmlinkage long sys_rt_sigaction(int sig,
+                                const struct sigaction __user *act,
+                                struct sigaction __user *oact,
+                                size_t sigsetsize);
+
+#endif
+
+/*
+ * "Conditional" syscalls
+ */
+#define cond_syscall(name)                                                    \
+  asm (".weak\t" C_SYMBOL_STRING(name) ";"                                    \
+       ".set\t" C_SYMBOL_STRING(name) "," C_SYMBOL_STRING(sys_ni_syscall))
+#if 0
+/* This doesn't work if there's a function prototype for NAME visible,
+   because the argument types probably won't match.  */
+#define cond_syscall(name)  \
+  void name (void) __attribute__ ((weak, alias ("sys_ni_syscall")));
+#endif
+
+#endif /* __V850_UNISTD_H__ */
diff --git a/include/asm-v850/user.h b/include/asm-v850/user.h
new file mode 100644
index 000000000000..ccf4cea6dc9c
--- /dev/null
+++ b/include/asm-v850/user.h
@@ -0,0 +1,56 @@
+#ifndef __V850_USER_H__
+#define __V850_USER_H__
+
+/* Adapted from <asm-ppc/user.h>.  */
+
+#ifdef __KERNEL__
+
+#include <linux/ptrace.h>
+#include <asm/page.h>
+
+/*
+ * Core file format: The core file is written in such a way that gdb
+ * can understand it and provide useful information to the user (under
+ * linux we use the `trad-core' bfd, NOT the osf-core).  The file contents
+ * are as follows:
+ *
+ *  upage: 1 page consisting of a user struct that tells gdb
+ *      what is present in the file.  Directly after this is a
+ *      copy of the task_struct, which is currently not used by gdb,
+ *      but it may come in handy at some point.  All of the registers
+ *      are stored as part of the upage.  The upage should always be
+ *      only one page long.
+ *  data: The data segment follows next.  We use current->end_text to
+ *      current->brk to pick up all of the user variables, plus any memory
+ *      that may have been sbrk'ed.  No attempt is made to determine if a
+ *      page is demand-zero or if a page is totally unused, we just cover
+ *      the entire range.  All of the addresses are rounded in such a way
+ *      that an integral number of pages is written.
+ *  stack: We need the stack information in order to get a meaningful
+ *      backtrace.  We need to write the data from usp to
+ *      current->start_stack, so we round each of these in order to be able
+ *      to write an integer number of pages.
+ */
+struct user {
+        struct pt_regs  regs;                   /* entire machine state */
+        size_t          u_tsize;                /* text size (pages) */
+        size_t          u_dsize;                /* data size (pages) */
+        size_t          u_ssize;                /* stack size (pages) */
+        unsigned long   start_code;             /* text starting address */
+        unsigned long   start_data;             /* data starting address */
+        unsigned long   start_stack;            /* stack starting address */
+        long int        signal;                 /* signal causing core dump */
+        struct regs *   u_ar0;                  /* help gdb find registers */
+        unsigned long   magic;                  /* identifies a core file */
+        char            u_comm[32];             /* user command name */
+};
+
+#define NBPG                    PAGE_SIZE
+#define UPAGES                  1
+#define HOST_TEXT_START_ADDR    (u.start_code)
+#define HOST_DATA_START_ADDR    (u.start_data)
+#define HOST_STACK_END_ADDR     (u.start_stack + u.u_ssize * NBPG)
+
+#endif /* __KERNEL__ */
+
+#endif /* __V850_USER_H__ */
diff --git a/include/asm-v850/v850e.h b/include/asm-v850/v850e.h
new file mode 100644
index 000000000000..5a222eb5117f
--- /dev/null
+++ b/include/asm-v850/v850e.h
@@ -0,0 +1,21 @@
+/*
+ * include/asm-v850/v850e.h -- V850E CPU
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_V850E_H__
+#define __V850_V850E_H__
+
+#include <asm/v850e_intc.h>
+
+#define CPU_ARCH "v850e"
+
+#endif /* __V850_V850E_H__ */
diff --git a/include/asm-v850/v850e2.h b/include/asm-v850/v850e2.h
new file mode 100644
index 000000000000..48680408ab7e
--- /dev/null
+++ b/include/asm-v850/v850e2.h
@@ -0,0 +1,69 @@
+/*
+ * include/asm-v850/v850e2.h -- Machine-dependent defs for V850E2 CPUs
+ *
+ *  Copyright (C) 2002,03  NEC Electronics Corporation
+ *  Copyright (C) 2002,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_V850E2_H__
+#define __V850_V850E2_H__
+
+#include <asm/v850e_intc.h>     /* v850e-style interrupt system.  */
+
+
+#define CPU_ARCH "v850e2"
+
+
+/* Control registers.  */
+
+/* Chip area select control */ 
+#define V850E2_CSC_ADDR(n)      (0xFFFFF060 + (n) * 2)
+#define V850E2_CSC(n)           (*(volatile u16 *)V850E2_CSC_ADDR(n))
+/* I/O area select control */
+#define V850E2_BPC_ADDR         0xFFFFF064
+#define V850E2_BPC              (*(volatile u16 *)V850E2_BPC_ADDR)
+/* Bus size configuration */
+#define V850E2_BSC_ADDR         0xFFFFF066
+#define V850E2_BSC              (*(volatile u16 *)V850E2_BSC_ADDR)
+/* Endian configuration */
+#define V850E2_BEC_ADDR         0xFFFFF068
+#define V850E2_BEC              (*(volatile u16 *)V850E2_BEC_ADDR)
+/* Cache configuration */
+#define V850E2_BHC_ADDR         0xFFFFF06A
+#define V850E2_BHC              (*(volatile u16 *)V850E2_BHC_ADDR)
+/* NPB strobe-wait configuration */
+#define V850E2_VSWC_ADDR        0xFFFFF06E
+#define V850E2_VSWC             (*(volatile u16 *)V850E2_VSWC_ADDR)
+/* Bus cycle type */
+#define V850E2_BCT_ADDR(n)      (0xFFFFF480 + (n) * 2)
+#define V850E2_BCT(n)           (*(volatile u16 *)V850E2_BCT_ADDR(n))
+/* Data wait control */
+#define V850E2_DWC_ADDR(n)      (0xFFFFF484 + (n) * 2)
+#define V850E2_DWC(n)           (*(volatile u16 *)V850E2_DWC_ADDR(n))
+/* Bus cycle control */
+#define V850E2_BCC_ADDR         0xFFFFF488
+#define V850E2_BCC              (*(volatile u16 *)V850E2_BCC_ADDR)
+/* Address wait control */
+#define V850E2_ASC_ADDR         0xFFFFF48A
+#define V850E2_ASC              (*(volatile u16 *)V850E2_ASC_ADDR)
+/* Local bus sizing control */
+#define V850E2_LBS_ADDR         0xFFFFF48E
+#define V850E2_LBS              (*(volatile u16 *)V850E2_LBS_ADDR)
+/* Line buffer control */
+#define V850E2_LBC_ADDR(n)      (0xFFFFF490 + (n) * 2)
+#define V850E2_LBC(n)           (*(volatile u16 *)V850E2_LBC_ADDR(n))
+/* SDRAM configuration */
+#define V850E2_SCR_ADDR(n)      (0xFFFFF4A0 + (n) * 4)
+#define V850E2_SCR(n)           (*(volatile u16 *)V850E2_SCR_ADDR(n))
+/* SDRAM refresh cycle control */
+#define V850E2_RFS_ADDR(n)      (0xFFFFF4A2 + (n) * 4)
+#define V850E2_RFS(n)           (*(volatile u16 *)V850E2_RFS_ADDR(n))
+
+
+#endif /* __V850_V850E2_H__ */
diff --git a/include/asm-v850/v850e2_cache.h b/include/asm-v850/v850e2_cache.h
new file mode 100644
index 000000000000..61acda1023e8
--- /dev/null
+++ b/include/asm-v850/v850e2_cache.h
@@ -0,0 +1,74 @@
+/*
+ * include/asm-v850/v850e2_cache_cache.h -- Cache control for V850E2
+ *      cache memories
+ *
+ *  Copyright (C) 2003  NEC Electronics Corporation
+ *  Copyright (C) 2003  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_V850E2_CACHE_H__
+#define __V850_V850E2_CACHE_H__
+
+#include <asm/types.h>
+
+
+/* Cache control registers.  */
+
+/* Bus Transaction Control */
+#define V850E2_CACHE_BTSC_ADDR  0xFFFFF070
+#define V850E2_CACHE_BTSC       (*(volatile u16 *)V850E2_CACHE_BTSC_ADDR)
+#define V850E2_CACHE_BTSC_ICM   0x0001 /* icache enable */
+#define V850E2_CACHE_BTSC_DCM0  0x0004 /* dcache enable, bit 0 */
+#define V850E2_CACHE_BTSC_DCM1  0x0008 /* dcache enable, bit 1 */
+#define V850E2_CACHE_BTSC_DCM_WT                      /* write-through */ \
+                        V850E2_CACHE_BTSC_DCM0
+#ifdef CONFIG_V850E2_V850E2S
+# define V850E2_CACHE_BTSC_DCM_WB_NO_ALLOC    /* write-back, non-alloc */ \
+                        V850E2_CACHE_BTSC_DCM1  
+# define V850E2_CACHE_BTSC_DCM_WB_ALLOC       /* write-back, non-alloc */ \
+                        (V850E2_CACHE_BTSC_DCM1 | V850E2_CACHE_BTSC_DCM0)
+# define V850E2_CACHE_BTSC_ISEQ 0x0010 /* icache `address sequence mode' */
+# define V850E2_CACHE_BTSC_DSEQ 0x0020 /* dcache `address sequence mode' */
+# define V850E2_CACHE_BTSC_IRFC 0x0030
+# define V850E2_CACHE_BTSC_ILCD 0x4000
+# define V850E2_CACHE_BTSC_VABE 0x8000
+#endif /* CONFIG_V850E2_V850E2S */
+
+/* Cache operation start address register (low-bits).  */
+#define V850E2_CACHE_CADL_ADDR  0xFFFFF074
+#define V850E2_CACHE_CADL       (*(volatile u16 *)V850E2_CACHE_CADL_ADDR)
+/* Cache operation start address register (high-bits).  */
+#define V850E2_CACHE_CADH_ADDR  0xFFFFF076
+#define V850E2_CACHE_CADH       (*(volatile u16 *)V850E2_CACHE_CADH_ADDR)
+/* Cache operation count register.  */
+#define V850E2_CACHE_CCNT_ADDR  0xFFFFF078
+#define V850E2_CACHE_CCNT       (*(volatile u16 *)V850E2_CACHE_CCNT_ADDR)
+/* Cache operation specification register.  */
+#define V850E2_CACHE_COPR_ADDR  0xFFFFF07A
+#define V850E2_CACHE_COPR       (*(volatile u16 *)V850E2_CACHE_COPR_ADDR)
+#define V850E2_CACHE_COPR_STRT  0x0001 /* start cache operation */
+#define V850E2_CACHE_COPR_LBSL  0x0100 /* 0 = icache, 1 = dcache */
+#define V850E2_CACHE_COPR_WSLE  0x0200 /* operate on cache way */
+#define V850E2_CACHE_COPR_WSL(way) ((way) * 0x0400) /* way select */
+#define V850E2_CACHE_COPR_CFC(op)  ((op)  * 0x1000) /* cache function code */
+
+
+/* Size of a cache line in bytes.  */
+#define V850E2_CACHE_LINE_SIZE_BITS     4
+#define V850E2_CACHE_LINE_SIZE          (1 << V850E2_CACHE_LINE_SIZE_BITS)
+
+/* The size of each cache `way' in lines.  */
+#define V850E2_CACHE_WAY_SIZE           256
+
+
+/* For <asm/cache.h> */
+#define L1_CACHE_BYTES                  V850E2_CACHE_LINE_SIZE
+
+
+#endif /* __V850_V850E2_CACHE_H__ */
diff --git a/include/asm-v850/v850e_cache.h b/include/asm-v850/v850e_cache.h
new file mode 100644
index 000000000000..aa7d7eb9da50
--- /dev/null
+++ b/include/asm-v850/v850e_cache.h
@@ -0,0 +1,48 @@
+/*
+ * include/asm-v850/v850e_cache.h -- Cache control for V850E cache memories
+ *
+ *  Copyright (C) 2001,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+/* This file implements cache control for the rather simple cache used on
+   some V850E CPUs, specifically the NB85E/TEG CPU-core and the V850E/ME2
+   CPU.  V850E2 processors have their own (better) cache
+   implementation.  */
+
+#ifndef __V850_V850E_CACHE_H__
+#define __V850_V850E_CACHE_H__
+
+#include <asm/types.h>
+
+
+/* Cache control registers.  */
+#define V850E_CACHE_BHC_ADDR    0xFFFFF06A
+#define V850E_CACHE_BHC         (*(volatile u16 *)V850E_CACHE_BHC_ADDR)
+#define V850E_CACHE_ICC_ADDR    0xFFFFF070
+#define V850E_CACHE_ICC         (*(volatile u16 *)V850E_CACHE_ICC_ADDR)
+#define V850E_CACHE_ISI_ADDR    0xFFFFF072
+#define V850E_CACHE_ISI         (*(volatile u16 *)V850E_CACHE_ISI_ADDR)
+#define V850E_CACHE_DCC_ADDR    0xFFFFF078
+#define V850E_CACHE_DCC         (*(volatile u16 *)V850E_CACHE_DCC_ADDR)
+
+/* Size of a cache line in bytes.  */
+#define V850E_CACHE_LINE_SIZE   16
+
+/* For <asm/cache.h> */
+#define L1_CACHE_BYTES          V850E_CACHE_LINE_SIZE
+
+
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
+/* Set caching params via the BHC, ICC, and DCC registers.  */
+void v850e_cache_enable (u16 bhc, u16 icc, u16 dcc);
+#endif /* __KERNEL__ && !__ASSEMBLY__ */
+
+
+#endif /* __V850_V850E_CACHE_H__ */
diff --git a/include/asm-v850/v850e_intc.h b/include/asm-v850/v850e_intc.h
new file mode 100644
index 000000000000..6fdf95708317
--- /dev/null
+++ b/include/asm-v850/v850e_intc.h
@@ -0,0 +1,133 @@
+/*
+ * include/asm-v850/v850e_intc.h -- V850E CPU interrupt controller (INTC)
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_V850E_INTC_H__
+#define __V850_V850E_INTC_H__
+
+
+/* There are 4 16-bit `Interrupt Mask Registers' located contiguously
+   starting from this base.  Each interrupt uses a single bit to
+   indicated enabled/disabled status.  */
+#define V850E_INTC_IMR_BASE_ADDR  0xFFFFF100
+#define V850E_INTC_IMR_ADDR(irq)  (V850E_INTC_IMR_BASE_ADDR + ((irq) >> 3))
+#define V850E_INTC_IMR_BIT(irq)   ((irq) & 0x7)
+
+/* Each maskable interrupt has a single-byte control register at this
+   address.  */
+#define V850E_INTC_IC_BASE_ADDR   0xFFFFF110
+#define V850E_INTC_IC_ADDR(irq)   (V850E_INTC_IC_BASE_ADDR + ((irq) << 1))
+#define V850E_INTC_IC(irq)        (*(volatile u8 *)V850E_INTC_IC_ADDR(irq))
+/* Encode priority PR for storing in an interrupt control register.  */
+#define V850E_INTC_IC_PR(pr)      (pr)
+/* Interrupt disable bit in an interrupt control register.  */
+#define V850E_INTC_IC_MK_BIT      6
+#define V850E_INTC_IC_MK          (1 << V850E_INTC_IC_MK_BIT)
+/* Interrupt pending flag in an interrupt control register.  */
+#define V850E_INTC_IC_IF_BIT      7
+#define V850E_INTC_IC_IF          (1 << V850E_INTC_IC_IF_BIT)
+
+/* The ISPR (In-service priority register) contains one bit for each interrupt
+   priority level, which is set to one when that level is currently being
+   serviced (and thus blocking any interrupts of equal or lesser level).  */
+#define V850E_INTC_ISPR_ADDR      0xFFFFF1FA
+#define V850E_INTC_ISPR           (*(volatile u8 *)V850E_INTC_ISPR_ADDR)
+
+
+#ifndef __ASSEMBLY__
+
+/* Enable interrupt handling for interrupt IRQ.  */
+static inline void v850e_intc_enable_irq (unsigned irq)
+{
+        __asm__ __volatile__ ("clr1 %0, [%1]"
+                              :: "r" (V850E_INTC_IMR_BIT (irq)),
+                                 "r" (V850E_INTC_IMR_ADDR (irq))
+                              : "memory");
+}
+
+/* Disable interrupt handling for interrupt IRQ.  Note that any
+   interrupts received while disabled will be delivered once the
+   interrupt is enabled again, unless they are explicitly cleared using
+   `v850e_intc_clear_pending_irq'.  */
+static inline void v850e_intc_disable_irq (unsigned irq)
+{
+        __asm__ __volatile__ ("set1 %0, [%1]"
+                              :: "r" (V850E_INTC_IMR_BIT (irq)),
+                                 "r" (V850E_INTC_IMR_ADDR (irq))
+                              : "memory");
+}
+
+/* Return true if interrupt handling for interrupt IRQ is enabled.  */
+static inline int v850e_intc_irq_enabled (unsigned irq)
+{
+        int rval;
+        __asm__ __volatile__ ("tst1 %1, [%2]; setf z, %0"
+                              : "=r" (rval)
+                              : "r" (V850E_INTC_IMR_BIT (irq)),
+                                "r" (V850E_INTC_IMR_ADDR (irq)));
+        return rval;
+}
+
+/* Disable irqs from 0 until LIMIT.  LIMIT must be a multiple of 8.  */
+static inline void _v850e_intc_disable_irqs (unsigned limit)
+{
+        unsigned long addr;
+        for (addr = V850E_INTC_IMR_BASE_ADDR; limit >= 8; addr++, limit -= 8)
+                *(char *)addr = 0xFF;
+}
+
+/* Disable all irqs.  This is purposely a macro, because NUM_MACH_IRQS
+   will be only be defined later.  */
+#define v850e_intc_disable_irqs()   _v850e_intc_disable_irqs (NUM_MACH_IRQS)
+
+/* Clear any pending interrupts for IRQ.  */
+static inline void v850e_intc_clear_pending_irq (unsigned irq)
+{
+        __asm__ __volatile__ ("clr1 %0, 0[%1]"
+                              :: "i" (V850E_INTC_IC_IF_BIT),
+                                 "r" (V850E_INTC_IC_ADDR (irq))
+                              : "memory");
+}
+
+/* Return true if interrupt IRQ is pending (but disabled).  */
+static inline int v850e_intc_irq_pending (unsigned irq)
+{
+        int rval;
+        __asm__ __volatile__ ("tst1 %1, 0[%2]; setf nz, %0"
+                              : "=r" (rval)
+                              : "i" (V850E_INTC_IC_IF_BIT),
+                                "r" (V850E_INTC_IC_ADDR (irq)));
+        return rval;
+}
+
+
+struct v850e_intc_irq_init {
+        const char *name;       /* name of interrupt type */
+
+        /* Range of kernel irq numbers for this type:
+           BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM  */
+        unsigned base, num, interval;
+
+        unsigned priority;      /* interrupt priority to assign */
+};
+struct hw_interrupt_type;       /* fwd decl */
+
+/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array
+   INITS (which is terminated by an entry with the name field == 0).  */
+extern void v850e_intc_init_irq_types (struct v850e_intc_irq_init *inits,
+                                       struct hw_interrupt_type *hw_irq_types);
+
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_V850E_INTC_H__ */
diff --git a/include/asm-v850/v850e_timer_c.h b/include/asm-v850/v850e_timer_c.h
new file mode 100644
index 000000000000..f70575df6ea9
--- /dev/null
+++ b/include/asm-v850/v850e_timer_c.h
@@ -0,0 +1,48 @@
+/*
+ * include/asm-v850/v850e_timer_c.h -- `Timer C' component often used
+ *      with the V850E cpu core
+ *
+ *  Copyright (C) 2001,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+/* NOTE: this include file currently contains only enough to allow us to
+   use timer C as an interrupt pass-through.  */
+
+#ifndef __V850_V850E_TIMER_C_H__
+#define __V850_V850E_TIMER_C_H__
+
+#include <asm/types.h>
+#include <asm/machdep.h>        /* Pick up chip-specific defs.  */
+
+
+/* Timer C (16-bit interval timers).  */
+
+/* Control register 0 for timer C.  */
+#define V850E_TIMER_C_TMCC0_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x6 + 0x10 *(n))
+#define V850E_TIMER_C_TMCC0(n)    (*(volatile u8 *)V850E_TIMER_C_TMCC0_ADDR(n))
+#define V850E_TIMER_C_TMCC0_CAE   0x01 /* clock action enable */
+#define V850E_TIMER_C_TMCC0_CE    0x02 /* count enable */
+/* ... */
+
+/* Control register 1 for timer C.  */
+#define V850E_TIMER_C_TMCC1_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x8 + 0x10 *(n))
+#define V850E_TIMER_C_TMCC1(n)    (*(volatile u8 *)V850E_TIMER_C_TMCC1_ADDR(n))
+#define V850E_TIMER_C_TMCC1_CMS0  0x01 /* capture/compare mode select (ccc0) */
+#define V850E_TIMER_C_TMCC1_CMS1  0x02 /* capture/compare mode select (ccc1) */
+/* ... */
+
+/* Interrupt edge-sensitivity control for timer C.  */
+#define V850E_TIMER_C_SESC_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x9 + 0x10 *(n))
+#define V850E_TIMER_C_SESC(n)     (*(volatile u8 *)V850E_TIMER_C_SESC_ADDR(n))
+
+/* ...etc... */
+
+
+#endif /* __V850_V850E_TIMER_C_H__  */
diff --git a/include/asm-v850/v850e_timer_d.h b/include/asm-v850/v850e_timer_d.h
new file mode 100644
index 000000000000..417612c5b22f
--- /dev/null
+++ b/include/asm-v850/v850e_timer_d.h
@@ -0,0 +1,62 @@
+/*
+ * include/asm-v850/v850e_timer_d.h -- `Timer D' component often used
+ *      with the V850E cpu core
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_V850E_TIMER_D_H__
+#define __V850_V850E_TIMER_D_H__
+
+#include <asm/types.h>
+#include <asm/machdep.h>        /* Pick up chip-specific defs.  */
+
+
+/* Timer D (16-bit interval timers).  */
+
+/* Count registers for timer D.  */
+#define V850E_TIMER_D_TMD_ADDR(n) (V850E_TIMER_D_TMD_BASE_ADDR + 0x10 * (n))
+#define V850E_TIMER_D_TMD(n)      (*(volatile u16 *)V850E_TIMER_D_TMD_ADDR(n))
+
+/* Count compare registers for timer D.  */
+#define V850E_TIMER_D_CMD_ADDR(n) (V850E_TIMER_D_CMD_BASE_ADDR + 0x10 * (n))
+#define V850E_TIMER_D_CMD(n)      (*(volatile u16 *)V850E_TIMER_D_CMD_ADDR(n))
+
+/* Control registers for timer D.  */
+#define V850E_TIMER_D_TMCD_ADDR(n) (V850E_TIMER_D_TMCD_BASE_ADDR + 0x10 * (n))
+#define V850E_TIMER_D_TMCD(n)      (*(volatile u8 *)V850E_TIMER_D_TMCD_ADDR(n))
+/* Control bits for timer D.  */
+#define V850E_TIMER_D_TMCD_CE      0x2 /* count enable */
+#define V850E_TIMER_D_TMCD_CAE     0x1 /* clock action enable */
+/* Clock divider setting (log2).  */
+#define V850E_TIMER_D_TMCD_CS(divlog2) (((divlog2) - V850E_TIMER_D_TMCD_CS_MIN) << 4)
+/* Minimum clock divider setting (log2).  */
+#ifndef V850E_TIMER_D_TMCD_CS_MIN /* Can be overridden by mach-specific hdrs */
+#define V850E_TIMER_D_TMCD_CS_MIN  2 /* Default is correct for the v850e/ma1 */
+#endif
+/* Maximum clock divider setting (log2).  */
+#define V850E_TIMER_D_TMCD_CS_MAX  (V850E_TIMER_D_TMCD_CS_MIN + 7)
+
+/* Return the clock-divider (log2) of timer D unit N.  */
+#define V850E_TIMER_D_DIVLOG2(n) \
+  (((V850E_TIMER_D_TMCD(n) >> 4) & 0x7) + V850E_TIMER_D_TMCD_CS_MIN)
+
+
+#ifndef __ASSEMBLY__
+
+/* Start interval timer TIMER (0-3).  The timer will issue the
+   corresponding INTCMD interrupt RATE times per second.  This function
+   does not enable the interrupt.  */
+extern void v850e_timer_d_configure (unsigned timer, unsigned rate);
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_V850E_TIMER_D_H__  */
diff --git a/include/asm-v850/v850e_uart.h b/include/asm-v850/v850e_uart.h
new file mode 100644
index 000000000000..5930d5990b19
--- /dev/null
+++ b/include/asm-v850/v850e_uart.h
@@ -0,0 +1,77 @@
+/*
+ * include/asm-v850/v850e_uart.h -- common V850E on-chip UART driver
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+/* There's not actually a single UART implementation used by V850E CPUs,
+   but rather a series of implementations that are all `close' to one
+   another.  This file corresponds to the single driver which handles all
+   of them.  */
+
+#ifndef __V850_V850E_UART_H__
+#define __V850_V850E_UART_H__
+
+#include <linux/config.h>
+#include <linux/termios.h>
+
+#include <asm/v850e_utils.h>
+#include <asm/types.h>
+#include <asm/machdep.h>        /* Pick up chip-specific defs.  */
+
+
+/* Include model-specific definitions.  */
+#ifdef CONFIG_V850E_UART
+# ifdef CONFIG_V850E_UARTB
+#  include <asm-v850/v850e_uartb.h>
+# else
+#  include <asm-v850/v850e_uarta.h> /* original V850E UART */
+# endif
+#endif
+
+
+/* Optional capabilities some hardware provides.  */
+
+/* This UART doesn't implement RTS/CTS by default, but some platforms
+   implement them externally, so check to see if <asm/machdep.h> defined
+   anything.  */
+#ifdef V850E_UART_CTS
+#define v850e_uart_cts(n)               V850E_UART_CTS(n)
+#else
+#define v850e_uart_cts(n)               (1)
+#endif
+
+/* Do the same for RTS.  */
+#ifdef V850E_UART_SET_RTS
+#define v850e_uart_set_rts(n,v)         V850E_UART_SET_RTS(n,v)
+#else
+#define v850e_uart_set_rts(n,v)         ((void)0)
+#endif
+
+
+/* This is the serial channel to use for the boot console (if desired).  */
+#ifndef V850E_UART_CONSOLE_CHANNEL
+# define V850E_UART_CONSOLE_CHANNEL 0
+#endif
+
+
+#ifndef __ASSEMBLY__
+
+/* Setup a console using channel 0 of the builtin uart.  */
+extern void v850e_uart_cons_init (unsigned chan);
+
+/* Configure and turn on uart channel CHAN, using the termios `control
+   modes' bits in CFLAGS, and a baud-rate of BAUD.  */
+void v850e_uart_configure (unsigned chan, unsigned cflags, unsigned baud);
+
+#endif /* !__ASSEMBLY__ */
+
+
+#endif /* __V850_V850E_UART_H__ */
diff --git a/include/asm-v850/v850e_uarta.h b/include/asm-v850/v850e_uarta.h
new file mode 100644
index 000000000000..e483e0950725
--- /dev/null
+++ b/include/asm-v850/v850e_uarta.h
@@ -0,0 +1,278 @@
+/*
+ * include/asm-v850/v850e_uarta.h -- original V850E on-chip UART
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+/* This is the original V850E UART implementation is called just `UART' in
+   the docs, but we name this header file <asm/v850e_uarta.h> because the
+   name <asm/v850e_uart.h> is used for the common driver that handles both
+   `UART' and `UARTB' implementations.  */
+
+#ifndef __V850_V850E_UARTA_H__
+#define __V850_V850E_UARTA_H__
+
+
+/* Raw hardware interface.  */
+
+/* The base address of the UART control registers for channel N.
+   The default is the address used on the V850E/MA1.  */
+#ifndef V850E_UART_BASE_ADDR
+#define V850E_UART_BASE_ADDR(n)         (0xFFFFFA00 + 0x10 * (n))
+#endif 
+
+/* Addresses of specific UART control registers for channel N.
+   The defaults are the addresses used on the V850E/MA1; if a platform
+   wants to redefine any of these, it must redefine them all.  */
+#ifndef V850E_UART_ASIM_ADDR
+#define V850E_UART_ASIM_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x0)
+#define V850E_UART_RXB_ADDR(n)          (V850E_UART_BASE_ADDR(n) + 0x2)
+#define V850E_UART_ASIS_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x3)
+#define V850E_UART_TXB_ADDR(n)          (V850E_UART_BASE_ADDR(n) + 0x4)
+#define V850E_UART_ASIF_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x5)
+#define V850E_UART_CKSR_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x6)
+#define V850E_UART_BRGC_ADDR(n)         (V850E_UART_BASE_ADDR(n) + 0x7)
+#endif
+
+/* UART config registers.  */
+#define V850E_UART_ASIM(n)      (*(volatile u8 *)V850E_UART_ASIM_ADDR(n))
+/* Control bits for config registers.  */
+#define V850E_UART_ASIM_CAE     0x80 /* clock enable */
+#define V850E_UART_ASIM_TXE     0x40 /* transmit enable */
+#define V850E_UART_ASIM_RXE     0x20 /* receive enable */
+#define V850E_UART_ASIM_PS_MASK 0x18 /* mask covering parity-select bits */
+#define V850E_UART_ASIM_PS_NONE 0x00 /* no parity */
+#define V850E_UART_ASIM_PS_ZERO 0x08 /* zero parity */
+#define V850E_UART_ASIM_PS_ODD  0x10 /* odd parity */
+#define V850E_UART_ASIM_PS_EVEN 0x18 /* even parity */
+#define V850E_UART_ASIM_CL_8    0x04 /* char len is 8 bits (otherwise, 7) */
+#define V850E_UART_ASIM_SL_2    0x02 /* 2 stop bits (otherwise, 1) */
+#define V850E_UART_ASIM_ISRM    0x01 /* generate INTSR interrupt on errors
+                                        (otherwise, generate INTSER) */
+
+/* UART serial interface status registers.  */
+#define V850E_UART_ASIS(n)      (*(volatile u8 *)V850E_UART_ASIS_ADDR(n))
+/* Control bits for status registers.  */
+#define V850E_UART_ASIS_PE      0x04 /* parity error */
+#define V850E_UART_ASIS_FE      0x02 /* framing error */
+#define V850E_UART_ASIS_OVE     0x01 /* overrun error */
+
+/* UART serial interface transmission status registers.  */
+#define V850E_UART_ASIF(n)      (*(volatile u8 *)V850E_UART_ASIF_ADDR(n))
+#define V850E_UART_ASIF_TXBF    0x02 /* transmit buffer flag (data in TXB) */
+#define V850E_UART_ASIF_TXSF    0x01 /* transmit shift flag (sending data) */
+
+/* UART receive buffer register.  */
+#define V850E_UART_RXB(n)       (*(volatile u8 *)V850E_UART_RXB_ADDR(n))
+
+/* UART transmit buffer register.  */
+#define V850E_UART_TXB(n)       (*(volatile u8 *)V850E_UART_TXB_ADDR(n))
+
+/* UART baud-rate generator control registers.  */
+#define V850E_UART_CKSR(n)      (*(volatile u8 *)V850E_UART_CKSR_ADDR(n))
+#define V850E_UART_CKSR_MAX     11
+#define V850E_UART_BRGC(n)      (*(volatile u8 *)V850E_UART_BRGC_ADDR(n))
+#define V850E_UART_BRGC_MIN     8
+
+
+#ifndef V850E_UART_CKSR_MAX_FREQ
+#define V850E_UART_CKSR_MAX_FREQ (25*1000*1000)
+#endif
+
+/* Calculate the minimum value for CKSR on this processor.  */
+static inline unsigned v850e_uart_cksr_min (void)
+{
+        int min = 0;
+        unsigned freq = V850E_UART_BASE_FREQ;
+        while (freq > V850E_UART_CKSR_MAX_FREQ) {
+                freq >>= 1;
+                min++;
+        }
+        return min;
+}
+
+
+/* Slightly abstract interface used by driver.  */
+
+
+/* Interrupts used by the UART.  */
+
+/* Received when the most recently transmitted character has been sent.  */
+#define V850E_UART_TX_IRQ(chan)         IRQ_INTST (chan)
+/* Received when a new character has been received.  */
+#define V850E_UART_RX_IRQ(chan)         IRQ_INTSR (chan)
+
+
+/* UART clock generator interface.  */
+
+/* This type encapsulates a particular uart frequency.  */
+typedef struct {
+        unsigned clk_divlog2;
+        unsigned brgen_count;
+} v850e_uart_speed_t;
+
+/* Calculate a uart speed from BAUD for this uart.  */
+static inline v850e_uart_speed_t v850e_uart_calc_speed (unsigned baud)
+{
+        v850e_uart_speed_t speed;
+
+        /* Calculate the log2 clock divider and baud-rate counter values
+           (note that the UART divides the resulting clock by 2, so
+           multiply BAUD by 2 here to compensate).  */
+        calc_counter_params (V850E_UART_BASE_FREQ, baud * 2,
+                             v850e_uart_cksr_min(),
+                             V850E_UART_CKSR_MAX, 8/*bits*/,
+                             &speed.clk_divlog2, &speed.brgen_count);
+
+        return speed;
+}
+
+/* Return the current speed of uart channel CHAN.  */
+static inline v850e_uart_speed_t v850e_uart_speed (unsigned chan)
+{
+        v850e_uart_speed_t speed;
+        speed.clk_divlog2 = V850E_UART_CKSR (chan);
+        speed.brgen_count = V850E_UART_BRGC (chan);
+        return speed;
+}
+
+/* Set the current speed of uart channel CHAN.  */
+static inline void v850e_uart_set_speed(unsigned chan,v850e_uart_speed_t speed)
+{
+        V850E_UART_CKSR (chan) = speed.clk_divlog2;
+        V850E_UART_BRGC (chan) = speed.brgen_count;
+}
+
+static inline int
+v850e_uart_speed_eq (v850e_uart_speed_t speed1, v850e_uart_speed_t speed2)
+{
+        return speed1.clk_divlog2 == speed2.clk_divlog2
+                && speed1.brgen_count == speed2.brgen_count;
+}
+
+/* Minimum baud rate possible.  */
+#define v850e_uart_min_baud() \
+   ((V850E_UART_BASE_FREQ >> V850E_UART_CKSR_MAX) / (2 * 255) + 1)
+
+/* Maximum baud rate possible.  The error is quite high at max, though.  */
+#define v850e_uart_max_baud() \
+   ((V850E_UART_BASE_FREQ >> v850e_uart_cksr_min()) / (2 *V850E_UART_BRGC_MIN))
+
+/* The `maximum' clock rate the uart can used, which is wanted (though not
+   really used in any useful way) by the serial framework.  */
+#define v850e_uart_max_clock() \
+   ((V850E_UART_BASE_FREQ >> v850e_uart_cksr_min()) / 2)
+
+
+/* UART configuration interface.  */
+
+/* Type of the uart config register; must be a scalar.  */
+typedef u16 v850e_uart_config_t;
+
+/* The uart hardware config register for channel CHAN.  */
+#define V850E_UART_CONFIG(chan)         V850E_UART_ASIM (chan)
+
+/* This config bit set if the uart is enabled.  */
+#define V850E_UART_CONFIG_ENABLED       V850E_UART_ASIM_CAE
+/* If the uart _isn't_ enabled, store this value to it to do so.  */
+#define V850E_UART_CONFIG_INIT          V850E_UART_ASIM_CAE
+/* Store this config value to disable the uart channel completely.  */
+#define V850E_UART_CONFIG_FINI          0
+
+/* Setting/clearing these bits enable/disable TX/RX, respectively (but
+   otherwise generally leave things running).  */
+#define V850E_UART_CONFIG_RX_ENABLE     V850E_UART_ASIM_RXE
+#define V850E_UART_CONFIG_TX_ENABLE     V850E_UART_ASIM_TXE
+
+/* These masks define which config bits affect TX/RX modes, respectively.  */
+#define V850E_UART_CONFIG_RX_BITS \
+  (V850E_UART_ASIM_PS_MASK | V850E_UART_ASIM_CL_8 | V850E_UART_ASIM_ISRM)
+#define V850E_UART_CONFIG_TX_BITS \
+  (V850E_UART_ASIM_PS_MASK | V850E_UART_ASIM_CL_8 | V850E_UART_ASIM_SL_2)
+
+static inline v850e_uart_config_t v850e_uart_calc_config (unsigned cflags)
+{
+        v850e_uart_config_t config = 0;
+
+        /* Figure out new configuration of control register.  */
+        if (cflags & CSTOPB)
+                /* Number of stop bits, 1 or 2.  */
+                config |= V850E_UART_ASIM_SL_2;
+        if ((cflags & CSIZE) == CS8)
+                /* Number of data bits, 7 or 8.  */
+                config |= V850E_UART_ASIM_CL_8;
+        if (! (cflags & PARENB))
+                /* No parity check/generation.  */
+                config |= V850E_UART_ASIM_PS_NONE;
+        else if (cflags & PARODD)
+                /* Odd parity check/generation.  */
+                config |= V850E_UART_ASIM_PS_ODD;
+        else
+                /* Even parity check/generation.  */
+                config |= V850E_UART_ASIM_PS_EVEN;
+        if (cflags & CREAD)
+                /* Reading enabled.  */
+                config |= V850E_UART_ASIM_RXE;
+
+        config |= V850E_UART_ASIM_CAE;
+        config |= V850E_UART_ASIM_TXE; /* Writing is always enabled.  */
+        config |= V850E_UART_ASIM_ISRM; /* Errors generate a read-irq.  */
+
+        return config;
+}
+
+/* This should delay as long as necessary for a recently written config
+   setting to settle, before we turn the uart back on.  */
+static inline void
+v850e_uart_config_delay (v850e_uart_config_t config, v850e_uart_speed_t speed)
+{
+        /* The UART may not be reset properly unless we wait at least 2
+           `basic-clocks' until turning on the TXE/RXE bits again.
+           A `basic clock' is the clock used by the baud-rate generator,
+           i.e., the cpu clock divided by the 2^new_clk_divlog2.
+           The loop takes 2 insns, so loop CYCLES / 2 times.  */
+        register unsigned count = 1 << speed.clk_divlog2;
+        while (--count != 0)
+                /* nothing */;
+}
+
+
+/* RX/TX interface.  */
+
+/* Return true if all characters awaiting transmission on uart channel N
+   have been transmitted.  */
+#define v850e_uart_xmit_done(n)                                               \
+   (! (V850E_UART_ASIF(n) & V850E_UART_ASIF_TXBF))
+/* Wait for this to be true.  */
+#define v850e_uart_wait_for_xmit_done(n)                                      \
+   do { } while (! v850e_uart_xmit_done (n))
+
+/* Return true if uart channel N is ready to transmit a character.  */
+#define v850e_uart_xmit_ok(n)                                                 \
+   (v850e_uart_xmit_done(n) && v850e_uart_cts(n))
+/* Wait for this to be true.  */
+#define v850e_uart_wait_for_xmit_ok(n)                                        \
+   do { } while (! v850e_uart_xmit_ok (n))
+
+/* Write character CH to uart channel CHAN.  */
+#define v850e_uart_putc(chan, ch)       (V850E_UART_TXB(chan) = (ch))
+
+/* Return latest character read on channel CHAN.  */
+#define v850e_uart_getc(chan)           V850E_UART_RXB (chan)
+
+/* Return bit-mask of uart error status.  */
+#define v850e_uart_err(chan)            V850E_UART_ASIS (chan)
+/* Various error bits set in the error result.  */
+#define V850E_UART_ERR_OVERRUN          V850E_UART_ASIS_OVE
+#define V850E_UART_ERR_FRAME            V850E_UART_ASIS_FE
+#define V850E_UART_ERR_PARITY           V850E_UART_ASIS_PE
+
+
+#endif /* __V850_V850E_UARTA_H__ */
diff --git a/include/asm-v850/v850e_uartb.h b/include/asm-v850/v850e_uartb.h
new file mode 100644
index 000000000000..6d4767d5a835
--- /dev/null
+++ b/include/asm-v850/v850e_uartb.h
@@ -0,0 +1,262 @@
+/*
+ * include/asm-v850/v850e_uartb.h -- V850E on-chip `UARTB' UART
+ *
+ *  Copyright (C) 2001,02,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+/* The V850E UARTB is basically a superset of the original V850E UART, but
+   even where it's the same, the names and details have changed a bit.
+   It's similar enough to use the same driver (v850e_uart.c), but the
+   details have been abstracted slightly to do so.  */
+
+#ifndef __V850_V850E_UARTB_H__
+#define __V850_V850E_UARTB_H__
+
+
+/* Raw hardware interface.  */
+
+#define V850E_UARTB_BASE_ADDR(n)        (0xFFFFFA00 + 0x10 * (n))
+
+/* Addresses of specific UART control registers for channel N.  */
+#define V850E_UARTB_CTL0_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0x0)
+#define V850E_UARTB_CTL2_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0x2)
+#define V850E_UARTB_STR_ADDR(n)         (V850E_UARTB_BASE_ADDR(n) + 0x4)
+#define V850E_UARTB_RX_ADDR(n)          (V850E_UARTB_BASE_ADDR(n) + 0x6)
+#define V850E_UARTB_RXAP_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0x6)
+#define V850E_UARTB_TX_ADDR(n)          (V850E_UARTB_BASE_ADDR(n) + 0x8)
+#define V850E_UARTB_FIC0_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0xA)
+#define V850E_UARTB_FIC1_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0xB)
+#define V850E_UARTB_FIC2_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0xC)
+#define V850E_UARTB_FIS0_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0xE)
+#define V850E_UARTB_FIS1_ADDR(n)        (V850E_UARTB_BASE_ADDR(n) + 0xF)
+
+/* UARTB control register 0 (general config).  */
+#define V850E_UARTB_CTL0(n)     (*(volatile u8 *)V850E_UARTB_CTL0_ADDR(n))
+/* Control bits for config registers.  */
+#define V850E_UARTB_CTL0_PWR            0x80    /* clock enable */
+#define V850E_UARTB_CTL0_TXE            0x40    /* transmit enable */
+#define V850E_UARTB_CTL0_RXE            0x20    /* receive enable */
+#define V850E_UARTB_CTL0_DIR            0x10    /*  */
+#define V850E_UARTB_CTL0_PS1            0x08    /* parity */
+#define V850E_UARTB_CTL0_PS0            0x04    /* parity */
+#define V850E_UARTB_CTL0_CL             0x02    /* char len 1:8bit, 0:7bit */
+#define V850E_UARTB_CTL0_SL             0x01    /* stop bit 1:2bit, 0:1bit */
+#define V850E_UARTB_CTL0_PS_MASK        0x0C    /* mask covering parity bits */
+#define V850E_UARTB_CTL0_PS_NONE        0x00    /* no parity */
+#define V850E_UARTB_CTL0_PS_ZERO        0x04    /* zero parity */
+#define V850E_UARTB_CTL0_PS_ODD         0x08    /* odd parity */
+#define V850E_UARTB_CTL0_PS_EVEN        0x0C    /* even parity */
+#define V850E_UARTB_CTL0_CL_8           0x02    /* char len 1:8bit, 0:7bit */
+#define V850E_UARTB_CTL0_SL_2           0x01    /* stop bit 1:2bit, 0:1bit */
+
+/* UARTB control register 2 (clock divider).  */
+#define V850E_UARTB_CTL2(n)     (*(volatile u16 *)V850E_UARTB_CTL2_ADDR(n))
+#define V850E_UARTB_CTL2_MIN    4
+#define V850E_UARTB_CTL2_MAX    0xFFFF
+
+/* UARTB serial interface status register.  */
+#define V850E_UARTB_STR(n)      (*(volatile u8 *)V850E_UARTB_STR_ADDR(n))
+/* Control bits for status registers.  */
+#define V850E_UARTB_STR_TSF     0x80    /* UBTX or FIFO exist data  */
+#define V850E_UARTB_STR_OVF     0x08    /* overflow error */
+#define V850E_UARTB_STR_PE      0x04    /* parity error */
+#define V850E_UARTB_STR_FE      0x02    /* framing error */
+#define V850E_UARTB_STR_OVE     0x01    /* overrun error */
+
+/* UARTB receive data register.  */
+#define V850E_UARTB_RX(n)       (*(volatile u8 *)V850E_UARTB_RX_ADDR(n))
+#define V850E_UARTB_RXAP(n)     (*(volatile u16 *)V850E_UARTB_RXAP_ADDR(n))
+/* Control bits for status registers.  */
+#define V850E_UARTB_RXAP_PEF    0x0200 /* parity error */
+#define V850E_UARTB_RXAP_FEF    0x0100 /* framing error */
+
+/* UARTB transmit data register.  */
+#define V850E_UARTB_TX(n)       (*(volatile u8 *)V850E_UARTB_TX_ADDR(n))
+
+/* UARTB FIFO control register 0.  */
+#define V850E_UARTB_FIC0(n)     (*(volatile u8 *)V850E_UARTB_FIC0_ADDR(n))
+
+/* UARTB FIFO control register 1.  */
+#define V850E_UARTB_FIC1(n)     (*(volatile u8 *)V850E_UARTB_FIC1_ADDR(n))
+
+/* UARTB FIFO control register 2.  */
+#define V850E_UARTB_FIC2(n)     (*(volatile u16 *)V850E_UARTB_FIC2_ADDR(n))
+
+/* UARTB FIFO status register 0.  */
+#define V850E_UARTB_FIS0(n)     (*(volatile u8 *)V850E_UARTB_FIS0_ADDR(n))
+
+/* UARTB FIFO status register 1.  */
+#define V850E_UARTB_FIS1(n)     (*(volatile u8 *)V850E_UARTB_FIS1_ADDR(n))
+
+
+/* Slightly abstract interface used by driver.  */
+
+
+/* Interrupts used by the UART.  */
+
+/* Received when the most recently transmitted character has been sent.  */
+#define V850E_UART_TX_IRQ(chan)         IRQ_INTUBTIT (chan)
+/* Received when a new character has been received.  */
+#define V850E_UART_RX_IRQ(chan)         IRQ_INTUBTIR (chan)
+
+/* Use by serial driver for information purposes.  */
+#define V850E_UART_BASE_ADDR(chan)      V850E_UARTB_BASE_ADDR(chan)
+
+
+/* UART clock generator interface.  */
+
+/* This type encapsulates a particular uart frequency.  */
+typedef u16 v850e_uart_speed_t;
+
+/* Calculate a uart speed from BAUD for this uart.  */
+static inline v850e_uart_speed_t v850e_uart_calc_speed (unsigned baud)
+{
+        v850e_uart_speed_t speed;
+
+        /*
+         * V850E/ME2 UARTB baud rate is determined by the value of UBCTL2
+         * fx = V850E_UARTB_BASE_FREQ = CPU_CLOCK_FREQ/4
+         * baud = fx / 2*speed   [ speed >= 4 ]
+         */
+        speed = V850E_UARTB_CTL2_MIN;
+        while (((V850E_UARTB_BASE_FREQ / 2) / speed ) > baud)
+                speed++;
+
+        return speed;
+}
+
+/* Return the current speed of uart channel CHAN.  */
+#define v850e_uart_speed(chan)              V850E_UARTB_CTL2 (chan)
+
+/* Set the current speed of uart channel CHAN.  */
+#define v850e_uart_set_speed(chan, speed)   (V850E_UARTB_CTL2 (chan) = (speed))
+
+/* Return true if SPEED1 and SPEED2 are the same.  */
+#define v850e_uart_speed_eq(speed1, speed2) ((speed1) == (speed2))
+
+/* Minimum baud rate possible.  */
+#define v850e_uart_min_baud() \
+   ((V850E_UARTB_BASE_FREQ / 2) / V850E_UARTB_CTL2_MAX)
+
+/* Maximum baud rate possible.  The error is quite high at max, though.  */
+#define v850e_uart_max_baud() \
+   ((V850E_UARTB_BASE_FREQ / 2) / V850E_UARTB_CTL2_MIN)
+
+/* The `maximum' clock rate the uart can used, which is wanted (though not
+   really used in any useful way) by the serial framework.  */
+#define v850e_uart_max_clock() \
+   (V850E_UARTB_BASE_FREQ / 2)
+
+
+/* UART configuration interface.  */
+
+/* Type of the uart config register; must be a scalar.  */
+typedef u16 v850e_uart_config_t;
+
+/* The uart hardware config register for channel CHAN.  */
+#define V850E_UART_CONFIG(chan)         V850E_UARTB_CTL0 (chan)
+
+/* This config bit set if the uart is enabled.  */
+#define V850E_UART_CONFIG_ENABLED       V850E_UARTB_CTL0_PWR
+/* If the uart _isn't_ enabled, store this value to it to do so.  */
+#define V850E_UART_CONFIG_INIT          V850E_UARTB_CTL0_PWR
+/* Store this config value to disable the uart channel completely.  */
+#define V850E_UART_CONFIG_FINI          0
+
+/* Setting/clearing these bits enable/disable TX/RX, respectively (but
+   otherwise generally leave things running).  */
+#define V850E_UART_CONFIG_RX_ENABLE     V850E_UARTB_CTL0_RXE
+#define V850E_UART_CONFIG_TX_ENABLE     V850E_UARTB_CTL0_TXE
+
+/* These masks define which config bits affect TX/RX modes, respectively.  */
+#define V850E_UART_CONFIG_RX_BITS \
+  (V850E_UARTB_CTL0_PS_MASK | V850E_UARTB_CTL0_CL_8)
+#define V850E_UART_CONFIG_TX_BITS \
+  (V850E_UARTB_CTL0_PS_MASK | V850E_UARTB_CTL0_CL_8 | V850E_UARTB_CTL0_SL_2)
+
+static inline v850e_uart_config_t v850e_uart_calc_config (unsigned cflags)
+{
+        v850e_uart_config_t config = 0;
+
+        /* Figure out new configuration of control register.  */
+        if (cflags & CSTOPB)
+                /* Number of stop bits, 1 or 2.  */
+                config |= V850E_UARTB_CTL0_SL_2;
+        if ((cflags & CSIZE) == CS8)
+                /* Number of data bits, 7 or 8.  */
+                config |= V850E_UARTB_CTL0_CL_8;
+        if (! (cflags & PARENB))
+                /* No parity check/generation.  */
+                config |= V850E_UARTB_CTL0_PS_NONE;
+        else if (cflags & PARODD)
+                /* Odd parity check/generation.  */
+                config |= V850E_UARTB_CTL0_PS_ODD;
+        else
+                /* Even parity check/generation.  */
+                config |= V850E_UARTB_CTL0_PS_EVEN;
+        if (cflags & CREAD)
+                /* Reading enabled.  */
+                config |= V850E_UARTB_CTL0_RXE;
+
+        config |= V850E_UARTB_CTL0_PWR;
+        config |= V850E_UARTB_CTL0_TXE; /* Writing is always enabled.  */
+        config |= V850E_UARTB_CTL0_DIR; /* LSB first.  */
+
+        return config;
+}
+
+/* This should delay as long as necessary for a recently written config
+   setting to settle, before we turn the uart back on.  */
+static inline void
+v850e_uart_config_delay (v850e_uart_config_t config, v850e_uart_speed_t speed)
+{
+        /* The UART may not be reset properly unless we wait at least 2
+           `basic-clocks' until turning on the TXE/RXE bits again.
+           A `basic clock' is the clock used by the baud-rate generator,
+           i.e., the cpu clock divided by the 2^new_clk_divlog2.
+           The loop takes 2 insns, so loop CYCLES / 2 times.  */
+        register unsigned count = 1 << speed;
+        while (--count != 0)
+                /* nothing */;
+}
+
+
+/* RX/TX interface.  */
+
+/* Return true if all characters awaiting transmission on uart channel N
+   have been transmitted.  */
+#define v850e_uart_xmit_done(n)                                               \
+   (! (V850E_UARTB_STR(n) & V850E_UARTB_STR_TSF))
+/* Wait for this to be true.  */
+#define v850e_uart_wait_for_xmit_done(n)                                      \
+   do { } while (! v850e_uart_xmit_done (n))
+
+/* Return true if uart channel N is ready to transmit a character.  */
+#define v850e_uart_xmit_ok(n)                                                 \
+   (v850e_uart_xmit_done(n) && v850e_uart_cts(n))
+/* Wait for this to be true.  */
+#define v850e_uart_wait_for_xmit_ok(n)                                        \
+   do { } while (! v850e_uart_xmit_ok (n))
+
+/* Write character CH to uart channel CHAN.  */
+#define v850e_uart_putc(chan, ch)       (V850E_UARTB_TX(chan) = (ch))
+
+/* Return latest character read on channel CHAN.  */
+#define v850e_uart_getc(chan)           V850E_UARTB_RX (chan)
+
+/* Return bit-mask of uart error status.  */
+#define v850e_uart_err(chan)            V850E_UARTB_STR (chan)
+/* Various error bits set in the error result.  */
+#define V850E_UART_ERR_OVERRUN          V850E_UARTB_STR_OVE
+#define V850E_UART_ERR_FRAME            V850E_UARTB_STR_FE
+#define V850E_UART_ERR_PARITY           V850E_UARTB_STR_PE
+
+
+#endif /* __V850_V850E_UARTB_H__ */
diff --git a/include/asm-v850/v850e_utils.h b/include/asm-v850/v850e_utils.h
new file mode 100644
index 000000000000..52eb72822d3d
--- /dev/null
+++ b/include/asm-v850/v850e_utils.h
@@ -0,0 +1,35 @@
+/*
+ * include/asm-v850/v850e_utils.h -- Utility functions associated with
+ *      V850E CPUs
+ *
+ *  Copyright (C) 2001,03  NEC Electronics Corporation
+ *  Copyright (C) 2001,03  Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ */
+
+#ifndef __V850_V850E_UTILS_H__
+#define __V850_V850E_UTILS_H__
+
+/* Calculate counter clock-divider and count values to attain the
+   desired frequency RATE from the base frequency BASE_FREQ.  The
+   counter is expected to have a clock-divider, which can divide the
+   system cpu clock by a power of two value from MIN_DIVLOG2 to
+   MAX_DIV_LOG2, and a word-size of COUNTER_SIZE bits (the counter
+   counts up and resets whenever it's equal to the compare register,
+   generating an interrupt or whatever when it does so).  The returned
+   values are: *DIVLOG2 -- log2 of the desired clock divider and *COUNT
+   -- the counter compare value to use.  Returns true if it was possible
+   to find a reasonable value, otherwise false (and the other return
+   values will be set to be as good as possible).  */
+extern int calc_counter_params (unsigned long base_freq,
+                                unsigned long rate,
+                                unsigned min_divlog2, unsigned max_divlog2,
+                                unsigned counter_size,
+                                unsigned *divlog2, unsigned *count);
+
+#endif /* __V850_V850E_UTILS_H__ */