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authorAdrian Bunk <bunk@stusta.de>2005-10-03 20:37:02 -0400
committerDavid S. Miller <davem@davemloft.net>2005-10-03 20:37:02 -0400
commit3115624eda34d0f4e673fc6bcea36b7ad701ee33 (patch)
treea81c9e0f3d84a96725e109452d4ddc90f95b513a /include/asm-sparc
parented39f731ab2e77e58122232f6e27333331d7793d (diff)
[SPARC]: "extern inline" doesn't make much sense.
Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc')
-rw-r--r--include/asm-sparc/btfixup.h12
-rw-r--r--include/asm-sparc/cache.h18
-rw-r--r--include/asm-sparc/cypress.h8
-rw-r--r--include/asm-sparc/delay.h2
-rw-r--r--include/asm-sparc/dma.h2
-rw-r--r--include/asm-sparc/iommu.h4
-rw-r--r--include/asm-sparc/kdebug.h2
-rw-r--r--include/asm-sparc/mbus.h4
-rw-r--r--include/asm-sparc/msi.h2
-rw-r--r--include/asm-sparc/mxcc.h8
-rw-r--r--include/asm-sparc/obio.h30
-rw-r--r--include/asm-sparc/pci.h6
-rw-r--r--include/asm-sparc/pgtable.h28
-rw-r--r--include/asm-sparc/pgtsrmmu.h30
-rw-r--r--include/asm-sparc/processor.h2
-rw-r--r--include/asm-sparc/psr.h6
-rw-r--r--include/asm-sparc/sbi.h10
-rw-r--r--include/asm-sparc/sbus.h6
-rw-r--r--include/asm-sparc/smp.h26
-rw-r--r--include/asm-sparc/smpprim.h8
-rw-r--r--include/asm-sparc/spinlock.h10
-rw-r--r--include/asm-sparc/system.h2
-rw-r--r--include/asm-sparc/traps.h2
23 files changed, 114 insertions, 114 deletions
diff --git a/include/asm-sparc/btfixup.h b/include/asm-sparc/btfixup.h
index b84c96c89581..6b29503256fd 100644
--- a/include/asm-sparc/btfixup.h
+++ b/include/asm-sparc/btfixup.h
@@ -51,7 +51,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
51#define BTFIXUPDEF_SIMM13(__name) \ 51#define BTFIXUPDEF_SIMM13(__name) \
52 extern unsigned int ___sf_##__name(void) __attribute_const__; \ 52 extern unsigned int ___sf_##__name(void) __attribute_const__; \
53 extern unsigned ___ss_##__name[2]; \ 53 extern unsigned ___ss_##__name[2]; \
54 extern __inline__ unsigned int ___sf_##__name(void) { \ 54 static inline unsigned int ___sf_##__name(void) { \
55 unsigned int ret; \ 55 unsigned int ret; \
56 __asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret)); \ 56 __asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret)); \
57 return ret; \ 57 return ret; \
@@ -59,7 +59,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
59#define BTFIXUPDEF_SIMM13_INIT(__name,__val) \ 59#define BTFIXUPDEF_SIMM13_INIT(__name,__val) \
60 extern unsigned int ___sf_##__name(void) __attribute_const__; \ 60 extern unsigned int ___sf_##__name(void) __attribute_const__; \
61 extern unsigned ___ss_##__name[2]; \ 61 extern unsigned ___ss_##__name[2]; \
62 extern __inline__ unsigned int ___sf_##__name(void) { \ 62 static inline unsigned int ___sf_##__name(void) { \
63 unsigned int ret; \ 63 unsigned int ret; \
64 __asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ 64 __asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
65 return ret; \ 65 return ret; \
@@ -73,7 +73,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
73#define BTFIXUPDEF_HALF(__name) \ 73#define BTFIXUPDEF_HALF(__name) \
74 extern unsigned int ___af_##__name(void) __attribute_const__; \ 74 extern unsigned int ___af_##__name(void) __attribute_const__; \
75 extern unsigned ___as_##__name[2]; \ 75 extern unsigned ___as_##__name[2]; \
76 extern __inline__ unsigned int ___af_##__name(void) { \ 76 static inline unsigned int ___af_##__name(void) { \
77 unsigned int ret; \ 77 unsigned int ret; \
78 __asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret)); \ 78 __asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret)); \
79 return ret; \ 79 return ret; \
@@ -81,7 +81,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
81#define BTFIXUPDEF_HALF_INIT(__name,__val) \ 81#define BTFIXUPDEF_HALF_INIT(__name,__val) \
82 extern unsigned int ___af_##__name(void) __attribute_const__; \ 82 extern unsigned int ___af_##__name(void) __attribute_const__; \
83 extern unsigned ___as_##__name[2]; \ 83 extern unsigned ___as_##__name[2]; \
84 extern __inline__ unsigned int ___af_##__name(void) { \ 84 static inline unsigned int ___af_##__name(void) { \
85 unsigned int ret; \ 85 unsigned int ret; \
86 __asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ 86 __asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
87 return ret; \ 87 return ret; \
@@ -92,7 +92,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
92#define BTFIXUPDEF_SETHI(__name) \ 92#define BTFIXUPDEF_SETHI(__name) \
93 extern unsigned int ___hf_##__name(void) __attribute_const__; \ 93 extern unsigned int ___hf_##__name(void) __attribute_const__; \
94 extern unsigned ___hs_##__name[2]; \ 94 extern unsigned ___hs_##__name[2]; \
95 extern __inline__ unsigned int ___hf_##__name(void) { \ 95 static inline unsigned int ___hf_##__name(void) { \
96 unsigned int ret; \ 96 unsigned int ret; \
97 __asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret)); \ 97 __asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret)); \
98 return ret; \ 98 return ret; \
@@ -100,7 +100,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
100#define BTFIXUPDEF_SETHI_INIT(__name,__val) \ 100#define BTFIXUPDEF_SETHI_INIT(__name,__val) \
101 extern unsigned int ___hf_##__name(void) __attribute_const__; \ 101 extern unsigned int ___hf_##__name(void) __attribute_const__; \
102 extern unsigned ___hs_##__name[2]; \ 102 extern unsigned ___hs_##__name[2]; \
103 extern __inline__ unsigned int ___hf_##__name(void) { \ 103 static inline unsigned int ___hf_##__name(void) { \
104 unsigned int ret; \ 104 unsigned int ret; \
105 __asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : \ 105 __asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : \
106 "=r"(ret)); \ 106 "=r"(ret)); \
diff --git a/include/asm-sparc/cache.h b/include/asm-sparc/cache.h
index e6316fd7e1a4..a10522cb21b7 100644
--- a/include/asm-sparc/cache.h
+++ b/include/asm-sparc/cache.h
@@ -27,7 +27,7 @@
27 */ 27 */
28 28
29/* First, cache-tag access. */ 29/* First, cache-tag access. */
30extern __inline__ unsigned int get_icache_tag(int setnum, int tagnum) 30static inline unsigned int get_icache_tag(int setnum, int tagnum)
31{ 31{
32 unsigned int vaddr, retval; 32 unsigned int vaddr, retval;
33 33
@@ -38,7 +38,7 @@ extern __inline__ unsigned int get_icache_tag(int setnum, int tagnum)
38 return retval; 38 return retval;
39} 39}
40 40
41extern __inline__ void put_icache_tag(int setnum, int tagnum, unsigned int entry) 41static inline void put_icache_tag(int setnum, int tagnum, unsigned int entry)
42{ 42{
43 unsigned int vaddr; 43 unsigned int vaddr;
44 44
@@ -51,7 +51,7 @@ extern __inline__ void put_icache_tag(int setnum, int tagnum, unsigned int entry
51/* Second cache-data access. The data is returned two-32bit quantities 51/* Second cache-data access. The data is returned two-32bit quantities
52 * at a time. 52 * at a time.
53 */ 53 */
54extern __inline__ void get_icache_data(int setnum, int tagnum, int subblock, 54static inline void get_icache_data(int setnum, int tagnum, int subblock,
55 unsigned int *data) 55 unsigned int *data)
56{ 56{
57 unsigned int value1, value2, vaddr; 57 unsigned int value1, value2, vaddr;
@@ -67,7 +67,7 @@ extern __inline__ void get_icache_data(int setnum, int tagnum, int subblock,
67 data[0] = value1; data[1] = value2; 67 data[0] = value1; data[1] = value2;
68} 68}
69 69
70extern __inline__ void put_icache_data(int setnum, int tagnum, int subblock, 70static inline void put_icache_data(int setnum, int tagnum, int subblock,
71 unsigned int *data) 71 unsigned int *data)
72{ 72{
73 unsigned int value1, value2, vaddr; 73 unsigned int value1, value2, vaddr;
@@ -92,35 +92,35 @@ extern __inline__ void put_icache_data(int setnum, int tagnum, int subblock,
92 */ 92 */
93 93
94/* Flushes which clear out both the on-chip and external caches */ 94/* Flushes which clear out both the on-chip and external caches */
95extern __inline__ void flush_ei_page(unsigned int addr) 95static inline void flush_ei_page(unsigned int addr)
96{ 96{
97 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 97 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
98 "r" (addr), "i" (ASI_M_FLUSH_PAGE) : 98 "r" (addr), "i" (ASI_M_FLUSH_PAGE) :
99 "memory"); 99 "memory");
100} 100}
101 101
102extern __inline__ void flush_ei_seg(unsigned int addr) 102static inline void flush_ei_seg(unsigned int addr)
103{ 103{
104 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 104 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
105 "r" (addr), "i" (ASI_M_FLUSH_SEG) : 105 "r" (addr), "i" (ASI_M_FLUSH_SEG) :
106 "memory"); 106 "memory");
107} 107}
108 108
109extern __inline__ void flush_ei_region(unsigned int addr) 109static inline void flush_ei_region(unsigned int addr)
110{ 110{
111 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 111 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
112 "r" (addr), "i" (ASI_M_FLUSH_REGION) : 112 "r" (addr), "i" (ASI_M_FLUSH_REGION) :
113 "memory"); 113 "memory");
114} 114}
115 115
116extern __inline__ void flush_ei_ctx(unsigned int addr) 116static inline void flush_ei_ctx(unsigned int addr)
117{ 117{
118 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 118 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
119 "r" (addr), "i" (ASI_M_FLUSH_CTX) : 119 "r" (addr), "i" (ASI_M_FLUSH_CTX) :
120 "memory"); 120 "memory");
121} 121}
122 122
123extern __inline__ void flush_ei_user(unsigned int addr) 123static inline void flush_ei_user(unsigned int addr)
124{ 124{
125 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 125 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
126 "r" (addr), "i" (ASI_M_FLUSH_USER) : 126 "r" (addr), "i" (ASI_M_FLUSH_USER) :
diff --git a/include/asm-sparc/cypress.h b/include/asm-sparc/cypress.h
index fc92fc839c3f..99599533efbc 100644
--- a/include/asm-sparc/cypress.h
+++ b/include/asm-sparc/cypress.h
@@ -48,25 +48,25 @@
48#define CYPRESS_NFAULT 0x00000002 48#define CYPRESS_NFAULT 0x00000002
49#define CYPRESS_MENABLE 0x00000001 49#define CYPRESS_MENABLE 0x00000001
50 50
51extern __inline__ void cypress_flush_page(unsigned long page) 51static inline void cypress_flush_page(unsigned long page)
52{ 52{
53 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 53 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
54 "r" (page), "i" (ASI_M_FLUSH_PAGE)); 54 "r" (page), "i" (ASI_M_FLUSH_PAGE));
55} 55}
56 56
57extern __inline__ void cypress_flush_segment(unsigned long addr) 57static inline void cypress_flush_segment(unsigned long addr)
58{ 58{
59 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 59 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
60 "r" (addr), "i" (ASI_M_FLUSH_SEG)); 60 "r" (addr), "i" (ASI_M_FLUSH_SEG));
61} 61}
62 62
63extern __inline__ void cypress_flush_region(unsigned long addr) 63static inline void cypress_flush_region(unsigned long addr)
64{ 64{
65 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : 65 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
66 "r" (addr), "i" (ASI_M_FLUSH_REGION)); 66 "r" (addr), "i" (ASI_M_FLUSH_REGION));
67} 67}
68 68
69extern __inline__ void cypress_flush_context(void) 69static inline void cypress_flush_context(void)
70{ 70{
71 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : : 71 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
72 "i" (ASI_M_FLUSH_CTX)); 72 "i" (ASI_M_FLUSH_CTX));
diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h
index 6edf2cbb246b..7ec8e9f7ad4f 100644
--- a/include/asm-sparc/delay.h
+++ b/include/asm-sparc/delay.h
@@ -10,7 +10,7 @@
10#include <linux/config.h> 10#include <linux/config.h>
11#include <asm/cpudata.h> 11#include <asm/cpudata.h>
12 12
13extern __inline__ void __delay(unsigned long loops) 13static inline void __delay(unsigned long loops)
14{ 14{
15 __asm__ __volatile__("cmp %0, 0\n\t" 15 __asm__ __volatile__("cmp %0, 0\n\t"
16 "1: bne 1b\n\t" 16 "1: bne 1b\n\t"
diff --git a/include/asm-sparc/dma.h b/include/asm-sparc/dma.h
index 07e6368a2521..8ec206aa5f2e 100644
--- a/include/asm-sparc/dma.h
+++ b/include/asm-sparc/dma.h
@@ -198,7 +198,7 @@ extern void dvma_init(struct sbus_bus *);
198/* Pause until counter runs out or BIT isn't set in the DMA condition 198/* Pause until counter runs out or BIT isn't set in the DMA condition
199 * register. 199 * register.
200 */ 200 */
201extern __inline__ void sparc_dma_pause(struct sparc_dma_registers *regs, 201static inline void sparc_dma_pause(struct sparc_dma_registers *regs,
202 unsigned long bit) 202 unsigned long bit)
203{ 203{
204 int ctr = 50000; /* Let's find some bugs ;) */ 204 int ctr = 50000; /* Let's find some bugs ;) */
diff --git a/include/asm-sparc/iommu.h b/include/asm-sparc/iommu.h
index 8171362d56b9..70c589c05a10 100644
--- a/include/asm-sparc/iommu.h
+++ b/include/asm-sparc/iommu.h
@@ -108,12 +108,12 @@ struct iommu_struct {
108 struct bit_map usemap; 108 struct bit_map usemap;
109}; 109};
110 110
111extern __inline__ void iommu_invalidate(struct iommu_regs *regs) 111static inline void iommu_invalidate(struct iommu_regs *regs)
112{ 112{
113 regs->tlbflush = 0; 113 regs->tlbflush = 0;
114} 114}
115 115
116extern __inline__ void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba) 116static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba)
117{ 117{
118 regs->pageflush = (ba & PAGE_MASK); 118 regs->pageflush = (ba & PAGE_MASK);
119} 119}
diff --git a/include/asm-sparc/kdebug.h b/include/asm-sparc/kdebug.h
index 3ea4916635ee..fba92485fdba 100644
--- a/include/asm-sparc/kdebug.h
+++ b/include/asm-sparc/kdebug.h
@@ -46,7 +46,7 @@ struct kernel_debug {
46extern struct kernel_debug *linux_dbvec; 46extern struct kernel_debug *linux_dbvec;
47 47
48/* Use this macro in C-code to enter the debugger. */ 48/* Use this macro in C-code to enter the debugger. */
49extern __inline__ void sp_enter_debugger(void) 49static inline void sp_enter_debugger(void)
50{ 50{
51 __asm__ __volatile__("jmpl %0, %%o7\n\t" 51 __asm__ __volatile__("jmpl %0, %%o7\n\t"
52 "nop\n\t" : : 52 "nop\n\t" : :
diff --git a/include/asm-sparc/mbus.h b/include/asm-sparc/mbus.h
index 5f2749015342..ecacdf4075d7 100644
--- a/include/asm-sparc/mbus.h
+++ b/include/asm-sparc/mbus.h
@@ -83,7 +83,7 @@ extern unsigned int hwbug_bitmask;
83 */ 83 */
84#define TBR_ID_SHIFT 20 84#define TBR_ID_SHIFT 20
85 85
86extern __inline__ int get_cpuid(void) 86static inline int get_cpuid(void)
87{ 87{
88 register int retval; 88 register int retval;
89 __asm__ __volatile__("rd %%tbr, %0\n\t" 89 __asm__ __volatile__("rd %%tbr, %0\n\t"
@@ -93,7 +93,7 @@ extern __inline__ int get_cpuid(void)
93 return (retval & 3); 93 return (retval & 3);
94} 94}
95 95
96extern __inline__ int get_modid(void) 96static inline int get_modid(void)
97{ 97{
98 return (get_cpuid() | 0x8); 98 return (get_cpuid() | 0x8);
99} 99}
diff --git a/include/asm-sparc/msi.h b/include/asm-sparc/msi.h
index b69543dd3b46..ff72cbd946a4 100644
--- a/include/asm-sparc/msi.h
+++ b/include/asm-sparc/msi.h
@@ -19,7 +19,7 @@
19#define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */ 19#define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */
20 20
21 21
22extern __inline__ void msi_set_sync(void) 22static inline void msi_set_sync(void)
23{ 23{
24 __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t" 24 __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t"
25 "andn %%g3, %2, %%g3\n\t" 25 "andn %%g3, %2, %%g3\n\t"
diff --git a/include/asm-sparc/mxcc.h b/include/asm-sparc/mxcc.h
index 60ef9d6fe7bc..128fe9708135 100644
--- a/include/asm-sparc/mxcc.h
+++ b/include/asm-sparc/mxcc.h
@@ -85,7 +85,7 @@
85 85
86#ifndef __ASSEMBLY__ 86#ifndef __ASSEMBLY__
87 87
88extern __inline__ void mxcc_set_stream_src(unsigned long *paddr) 88static inline void mxcc_set_stream_src(unsigned long *paddr)
89{ 89{
90 unsigned long data0 = paddr[0]; 90 unsigned long data0 = paddr[0];
91 unsigned long data1 = paddr[1]; 91 unsigned long data1 = paddr[1];
@@ -98,7 +98,7 @@ extern __inline__ void mxcc_set_stream_src(unsigned long *paddr)
98 "i" (ASI_M_MXCC) : "g2", "g3"); 98 "i" (ASI_M_MXCC) : "g2", "g3");
99} 99}
100 100
101extern __inline__ void mxcc_set_stream_dst(unsigned long *paddr) 101static inline void mxcc_set_stream_dst(unsigned long *paddr)
102{ 102{
103 unsigned long data0 = paddr[0]; 103 unsigned long data0 = paddr[0];
104 unsigned long data1 = paddr[1]; 104 unsigned long data1 = paddr[1];
@@ -111,7 +111,7 @@ extern __inline__ void mxcc_set_stream_dst(unsigned long *paddr)
111 "i" (ASI_M_MXCC) : "g2", "g3"); 111 "i" (ASI_M_MXCC) : "g2", "g3");
112} 112}
113 113
114extern __inline__ unsigned long mxcc_get_creg(void) 114static inline unsigned long mxcc_get_creg(void)
115{ 115{
116 unsigned long mxcc_control; 116 unsigned long mxcc_control;
117 117
@@ -125,7 +125,7 @@ extern __inline__ unsigned long mxcc_get_creg(void)
125 return mxcc_control; 125 return mxcc_control;
126} 126}
127 127
128extern __inline__ void mxcc_set_creg(unsigned long mxcc_control) 128static inline void mxcc_set_creg(unsigned long mxcc_control)
129{ 129{
130 __asm__ __volatile__("sta %0, [%1] %2\n\t" : : 130 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
131 "r" (mxcc_control), "r" (MXCC_CREG), 131 "r" (mxcc_control), "r" (MXCC_CREG),
diff --git a/include/asm-sparc/obio.h b/include/asm-sparc/obio.h
index 62e1d77965f3..47854a2a12cf 100644
--- a/include/asm-sparc/obio.h
+++ b/include/asm-sparc/obio.h
@@ -98,7 +98,7 @@
98 98
99#ifndef __ASSEMBLY__ 99#ifndef __ASSEMBLY__
100 100
101extern __inline__ int bw_get_intr_mask(int sbus_level) 101static inline int bw_get_intr_mask(int sbus_level)
102{ 102{
103 int mask; 103 int mask;
104 104
@@ -109,7 +109,7 @@ extern __inline__ int bw_get_intr_mask(int sbus_level)
109 return mask; 109 return mask;
110} 110}
111 111
112extern __inline__ void bw_clear_intr_mask(int sbus_level, int mask) 112static inline void bw_clear_intr_mask(int sbus_level, int mask)
113{ 113{
114 __asm__ __volatile__ ("stha %0, [%1] %2" : : 114 __asm__ __volatile__ ("stha %0, [%1] %2" : :
115 "r" (mask), 115 "r" (mask),
@@ -117,7 +117,7 @@ extern __inline__ void bw_clear_intr_mask(int sbus_level, int mask)
117 "i" (ASI_M_CTL)); 117 "i" (ASI_M_CTL));
118} 118}
119 119
120extern __inline__ unsigned bw_get_prof_limit(int cpu) 120static inline unsigned bw_get_prof_limit(int cpu)
121{ 121{
122 unsigned limit; 122 unsigned limit;
123 123
@@ -128,7 +128,7 @@ extern __inline__ unsigned bw_get_prof_limit(int cpu)
128 return limit; 128 return limit;
129} 129}
130 130
131extern __inline__ void bw_set_prof_limit(int cpu, unsigned limit) 131static inline void bw_set_prof_limit(int cpu, unsigned limit)
132{ 132{
133 __asm__ __volatile__ ("sta %0, [%1] %2" : : 133 __asm__ __volatile__ ("sta %0, [%1] %2" : :
134 "r" (limit), 134 "r" (limit),
@@ -136,7 +136,7 @@ extern __inline__ void bw_set_prof_limit(int cpu, unsigned limit)
136 "i" (ASI_M_CTL)); 136 "i" (ASI_M_CTL));
137} 137}
138 138
139extern __inline__ unsigned bw_get_ctrl(int cpu) 139static inline unsigned bw_get_ctrl(int cpu)
140{ 140{
141 unsigned ctrl; 141 unsigned ctrl;
142 142
@@ -147,7 +147,7 @@ extern __inline__ unsigned bw_get_ctrl(int cpu)
147 return ctrl; 147 return ctrl;
148} 148}
149 149
150extern __inline__ void bw_set_ctrl(int cpu, unsigned ctrl) 150static inline void bw_set_ctrl(int cpu, unsigned ctrl)
151{ 151{
152 __asm__ __volatile__ ("sta %0, [%1] %2" : : 152 __asm__ __volatile__ ("sta %0, [%1] %2" : :
153 "r" (ctrl), 153 "r" (ctrl),
@@ -157,7 +157,7 @@ extern __inline__ void bw_set_ctrl(int cpu, unsigned ctrl)
157 157
158extern unsigned char cpu_leds[32]; 158extern unsigned char cpu_leds[32];
159 159
160extern __inline__ void show_leds(int cpuid) 160static inline void show_leds(int cpuid)
161{ 161{
162 cpuid &= 0x1e; 162 cpuid &= 0x1e;
163 __asm__ __volatile__ ("stba %0, [%1] %2" : : 163 __asm__ __volatile__ ("stba %0, [%1] %2" : :
@@ -166,7 +166,7 @@ extern __inline__ void show_leds(int cpuid)
166 "i" (ASI_M_CTL)); 166 "i" (ASI_M_CTL));
167} 167}
168 168
169extern __inline__ unsigned cc_get_ipen(void) 169static inline unsigned cc_get_ipen(void)
170{ 170{
171 unsigned pending; 171 unsigned pending;
172 172
@@ -177,7 +177,7 @@ extern __inline__ unsigned cc_get_ipen(void)
177 return pending; 177 return pending;
178} 178}
179 179
180extern __inline__ void cc_set_iclr(unsigned clear) 180static inline void cc_set_iclr(unsigned clear)
181{ 181{
182 __asm__ __volatile__ ("stha %0, [%1] %2" : : 182 __asm__ __volatile__ ("stha %0, [%1] %2" : :
183 "r" (clear), 183 "r" (clear),
@@ -185,7 +185,7 @@ extern __inline__ void cc_set_iclr(unsigned clear)
185 "i" (ASI_M_MXCC)); 185 "i" (ASI_M_MXCC));
186} 186}
187 187
188extern __inline__ unsigned cc_get_imsk(void) 188static inline unsigned cc_get_imsk(void)
189{ 189{
190 unsigned mask; 190 unsigned mask;
191 191
@@ -196,7 +196,7 @@ extern __inline__ unsigned cc_get_imsk(void)
196 return mask; 196 return mask;
197} 197}
198 198
199extern __inline__ void cc_set_imsk(unsigned mask) 199static inline void cc_set_imsk(unsigned mask)
200{ 200{
201 __asm__ __volatile__ ("stha %0, [%1] %2" : : 201 __asm__ __volatile__ ("stha %0, [%1] %2" : :
202 "r" (mask), 202 "r" (mask),
@@ -204,7 +204,7 @@ extern __inline__ void cc_set_imsk(unsigned mask)
204 "i" (ASI_M_MXCC)); 204 "i" (ASI_M_MXCC));
205} 205}
206 206
207extern __inline__ unsigned cc_get_imsk_other(int cpuid) 207static inline unsigned cc_get_imsk_other(int cpuid)
208{ 208{
209 unsigned mask; 209 unsigned mask;
210 210
@@ -215,7 +215,7 @@ extern __inline__ unsigned cc_get_imsk_other(int cpuid)
215 return mask; 215 return mask;
216} 216}
217 217
218extern __inline__ void cc_set_imsk_other(int cpuid, unsigned mask) 218static inline void cc_set_imsk_other(int cpuid, unsigned mask)
219{ 219{
220 __asm__ __volatile__ ("stha %0, [%1] %2" : : 220 __asm__ __volatile__ ("stha %0, [%1] %2" : :
221 "r" (mask), 221 "r" (mask),
@@ -223,7 +223,7 @@ extern __inline__ void cc_set_imsk_other(int cpuid, unsigned mask)
223 "i" (ASI_M_CTL)); 223 "i" (ASI_M_CTL));
224} 224}
225 225
226extern __inline__ void cc_set_igen(unsigned gen) 226static inline void cc_set_igen(unsigned gen)
227{ 227{
228 __asm__ __volatile__ ("sta %0, [%1] %2" : : 228 __asm__ __volatile__ ("sta %0, [%1] %2" : :
229 "r" (gen), 229 "r" (gen),
@@ -239,7 +239,7 @@ extern __inline__ void cc_set_igen(unsigned gen)
239#define IGEN_MESSAGE(bcast, devid, sid, levels) \ 239#define IGEN_MESSAGE(bcast, devid, sid, levels) \
240 (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels)) 240 (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels))
241 241
242extern __inline__ void sun4d_send_ipi(int cpu, int level) 242static inline void sun4d_send_ipi(int cpu, int level)
243{ 243{
244 cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1))); 244 cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1)));
245} 245}
diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h
index 97052baf90c1..38644742f011 100644
--- a/include/asm-sparc/pci.h
+++ b/include/asm-sparc/pci.h
@@ -15,12 +15,12 @@
15 15
16#define PCI_IRQ_NONE 0xffffffff 16#define PCI_IRQ_NONE 0xffffffff
17 17
18extern inline void pcibios_set_master(struct pci_dev *dev) 18static inline void pcibios_set_master(struct pci_dev *dev)
19{ 19{
20 /* No special bus mastering setup handling */ 20 /* No special bus mastering setup handling */
21} 21}
22 22
23extern inline void pcibios_penalize_isa_irq(int irq, int active) 23static inline void pcibios_penalize_isa_irq(int irq, int active)
24{ 24{
25 /* We don't do dynamic PCI IRQ allocation */ 25 /* We don't do dynamic PCI IRQ allocation */
26} 26}
@@ -137,7 +137,7 @@ extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist
137 * only drive the low 24-bits during PCI bus mastering, then 137 * only drive the low 24-bits during PCI bus mastering, then
138 * you would pass 0x00ffffff as the mask to this function. 138 * you would pass 0x00ffffff as the mask to this function.
139 */ 139 */
140extern inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) 140static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
141{ 141{
142 return 1; 142 return 1;
143} 143}
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index 8395ad2f1c09..ae883f295f1f 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -154,7 +154,7 @@ BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t)
154BTFIXUPDEF_CALL(void, pte_clear, pte_t *) 154BTFIXUPDEF_CALL(void, pte_clear, pte_t *)
155BTFIXUPDEF_CALL(int, pte_read, pte_t) 155BTFIXUPDEF_CALL(int, pte_read, pte_t)
156 156
157extern __inline__ int pte_none(pte_t pte) 157static inline int pte_none(pte_t pte)
158{ 158{
159 return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); 159 return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask));
160} 160}
@@ -167,7 +167,7 @@ BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t)
167BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) 167BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t)
168BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) 168BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *)
169 169
170extern __inline__ int pmd_none(pmd_t pmd) 170static inline int pmd_none(pmd_t pmd)
171{ 171{
172 return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); 172 return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask));
173} 173}
@@ -195,19 +195,19 @@ BTFIXUPDEF_HALF(pte_dirtyi)
195BTFIXUPDEF_HALF(pte_youngi) 195BTFIXUPDEF_HALF(pte_youngi)
196 196
197extern int pte_write(pte_t pte) __attribute_const__; 197extern int pte_write(pte_t pte) __attribute_const__;
198extern __inline__ int pte_write(pte_t pte) 198static inline int pte_write(pte_t pte)
199{ 199{
200 return pte_val(pte) & BTFIXUP_HALF(pte_writei); 200 return pte_val(pte) & BTFIXUP_HALF(pte_writei);
201} 201}
202 202
203extern int pte_dirty(pte_t pte) __attribute_const__; 203extern int pte_dirty(pte_t pte) __attribute_const__;
204extern __inline__ int pte_dirty(pte_t pte) 204static inline int pte_dirty(pte_t pte)
205{ 205{
206 return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); 206 return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi);
207} 207}
208 208
209extern int pte_young(pte_t pte) __attribute_const__; 209extern int pte_young(pte_t pte) __attribute_const__;
210extern __inline__ int pte_young(pte_t pte) 210static inline int pte_young(pte_t pte)
211{ 211{
212 return pte_val(pte) & BTFIXUP_HALF(pte_youngi); 212 return pte_val(pte) & BTFIXUP_HALF(pte_youngi);
213} 213}
@@ -218,7 +218,7 @@ extern __inline__ int pte_young(pte_t pte)
218BTFIXUPDEF_HALF(pte_filei) 218BTFIXUPDEF_HALF(pte_filei)
219 219
220extern int pte_file(pte_t pte) __attribute_const__; 220extern int pte_file(pte_t pte) __attribute_const__;
221extern __inline__ int pte_file(pte_t pte) 221static inline int pte_file(pte_t pte)
222{ 222{
223 return pte_val(pte) & BTFIXUP_HALF(pte_filei); 223 return pte_val(pte) & BTFIXUP_HALF(pte_filei);
224} 224}
@@ -230,19 +230,19 @@ BTFIXUPDEF_HALF(pte_mkcleani)
230BTFIXUPDEF_HALF(pte_mkoldi) 230BTFIXUPDEF_HALF(pte_mkoldi)
231 231
232extern pte_t pte_wrprotect(pte_t pte) __attribute_const__; 232extern pte_t pte_wrprotect(pte_t pte) __attribute_const__;
233extern __inline__ pte_t pte_wrprotect(pte_t pte) 233static inline pte_t pte_wrprotect(pte_t pte)
234{ 234{
235 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); 235 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti));
236} 236}
237 237
238extern pte_t pte_mkclean(pte_t pte) __attribute_const__; 238extern pte_t pte_mkclean(pte_t pte) __attribute_const__;
239extern __inline__ pte_t pte_mkclean(pte_t pte) 239static inline pte_t pte_mkclean(pte_t pte)
240{ 240{
241 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); 241 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani));
242} 242}
243 243
244extern pte_t pte_mkold(pte_t pte) __attribute_const__; 244extern pte_t pte_mkold(pte_t pte) __attribute_const__;
245extern __inline__ pte_t pte_mkold(pte_t pte) 245static inline pte_t pte_mkold(pte_t pte)
246{ 246{
247 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); 247 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi));
248} 248}
@@ -279,7 +279,7 @@ BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int)
279BTFIXUPDEF_INT(pte_modify_mask) 279BTFIXUPDEF_INT(pte_modify_mask)
280 280
281extern pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; 281extern pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;
282extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot) 282static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
283{ 283{
284 return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | 284 return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) |
285 pgprot_val(newprot)); 285 pgprot_val(newprot));
@@ -386,13 +386,13 @@ extern struct ctx_list ctx_used; /* Head of used contexts list */
386 386
387#define NO_CONTEXT -1 387#define NO_CONTEXT -1
388 388
389extern __inline__ void remove_from_ctx_list(struct ctx_list *entry) 389static inline void remove_from_ctx_list(struct ctx_list *entry)
390{ 390{
391 entry->next->prev = entry->prev; 391 entry->next->prev = entry->prev;
392 entry->prev->next = entry->next; 392 entry->prev->next = entry->next;
393} 393}
394 394
395extern __inline__ void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) 395static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry)
396{ 396{
397 entry->next = head; 397 entry->next = head;
398 (entry->prev = head->prev)->next = entry; 398 (entry->prev = head->prev)->next = entry;
@@ -401,7 +401,7 @@ extern __inline__ void add_to_ctx_list(struct ctx_list *head, struct ctx_list *e
401#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) 401#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry)
402#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) 402#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry)
403 403
404extern __inline__ unsigned long 404static inline unsigned long
405__get_phys (unsigned long addr) 405__get_phys (unsigned long addr)
406{ 406{
407 switch (sparc_cpu_model){ 407 switch (sparc_cpu_model){
@@ -416,7 +416,7 @@ __get_phys (unsigned long addr)
416 } 416 }
417} 417}
418 418
419extern __inline__ int 419static inline int
420__get_iospace (unsigned long addr) 420__get_iospace (unsigned long addr)
421{ 421{
422 switch (sparc_cpu_model){ 422 switch (sparc_cpu_model){
diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h
index ee3b9d93187c..edeb9811e728 100644
--- a/include/asm-sparc/pgtsrmmu.h
+++ b/include/asm-sparc/pgtsrmmu.h
@@ -148,7 +148,7 @@ extern void *srmmu_nocache_pool;
148#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) 148#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR))
149 149
150/* Accessing the MMU control register. */ 150/* Accessing the MMU control register. */
151extern __inline__ unsigned int srmmu_get_mmureg(void) 151static inline unsigned int srmmu_get_mmureg(void)
152{ 152{
153 unsigned int retval; 153 unsigned int retval;
154 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : 154 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
@@ -157,14 +157,14 @@ extern __inline__ unsigned int srmmu_get_mmureg(void)
157 return retval; 157 return retval;
158} 158}
159 159
160extern __inline__ void srmmu_set_mmureg(unsigned long regval) 160static inline void srmmu_set_mmureg(unsigned long regval)
161{ 161{
162 __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : : 162 __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : :
163 "r" (regval), "i" (ASI_M_MMUREGS) : "memory"); 163 "r" (regval), "i" (ASI_M_MMUREGS) : "memory");
164 164
165} 165}
166 166
167extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr) 167static inline void srmmu_set_ctable_ptr(unsigned long paddr)
168{ 168{
169 paddr = ((paddr >> 4) & SRMMU_CTX_PMASK); 169 paddr = ((paddr >> 4) & SRMMU_CTX_PMASK);
170 __asm__ __volatile__("sta %0, [%1] %2\n\t" : : 170 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
@@ -173,7 +173,7 @@ extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr)
173 "memory"); 173 "memory");
174} 174}
175 175
176extern __inline__ unsigned long srmmu_get_ctable_ptr(void) 176static inline unsigned long srmmu_get_ctable_ptr(void)
177{ 177{
178 unsigned int retval; 178 unsigned int retval;
179 179
@@ -184,14 +184,14 @@ extern __inline__ unsigned long srmmu_get_ctable_ptr(void)
184 return (retval & SRMMU_CTX_PMASK) << 4; 184 return (retval & SRMMU_CTX_PMASK) << 4;
185} 185}
186 186
187extern __inline__ void srmmu_set_context(int context) 187static inline void srmmu_set_context(int context)
188{ 188{
189 __asm__ __volatile__("sta %0, [%1] %2\n\t" : : 189 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
190 "r" (context), "r" (SRMMU_CTX_REG), 190 "r" (context), "r" (SRMMU_CTX_REG),
191 "i" (ASI_M_MMUREGS) : "memory"); 191 "i" (ASI_M_MMUREGS) : "memory");
192} 192}
193 193
194extern __inline__ int srmmu_get_context(void) 194static inline int srmmu_get_context(void)
195{ 195{
196 register int retval; 196 register int retval;
197 __asm__ __volatile__("lda [%1] %2, %0\n\t" : 197 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
@@ -201,7 +201,7 @@ extern __inline__ int srmmu_get_context(void)
201 return retval; 201 return retval;
202} 202}
203 203
204extern __inline__ unsigned int srmmu_get_fstatus(void) 204static inline unsigned int srmmu_get_fstatus(void)
205{ 205{
206 unsigned int retval; 206 unsigned int retval;
207 207
@@ -211,7 +211,7 @@ extern __inline__ unsigned int srmmu_get_fstatus(void)
211 return retval; 211 return retval;
212} 212}
213 213
214extern __inline__ unsigned int srmmu_get_faddr(void) 214static inline unsigned int srmmu_get_faddr(void)
215{ 215{
216 unsigned int retval; 216 unsigned int retval;
217 217
@@ -222,7 +222,7 @@ extern __inline__ unsigned int srmmu_get_faddr(void)
222} 222}
223 223
224/* This is guaranteed on all SRMMU's. */ 224/* This is guaranteed on all SRMMU's. */
225extern __inline__ void srmmu_flush_whole_tlb(void) 225static inline void srmmu_flush_whole_tlb(void)
226{ 226{
227 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : 227 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
228 "r" (0x400), /* Flush entire TLB!! */ 228 "r" (0x400), /* Flush entire TLB!! */
@@ -231,7 +231,7 @@ extern __inline__ void srmmu_flush_whole_tlb(void)
231} 231}
232 232
233/* These flush types are not available on all chips... */ 233/* These flush types are not available on all chips... */
234extern __inline__ void srmmu_flush_tlb_ctx(void) 234static inline void srmmu_flush_tlb_ctx(void)
235{ 235{
236 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : 236 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
237 "r" (0x300), /* Flush TLB ctx.. */ 237 "r" (0x300), /* Flush TLB ctx.. */
@@ -239,7 +239,7 @@ extern __inline__ void srmmu_flush_tlb_ctx(void)
239 239
240} 240}
241 241
242extern __inline__ void srmmu_flush_tlb_region(unsigned long addr) 242static inline void srmmu_flush_tlb_region(unsigned long addr)
243{ 243{
244 addr &= SRMMU_PGDIR_MASK; 244 addr &= SRMMU_PGDIR_MASK;
245 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : 245 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
@@ -249,7 +249,7 @@ extern __inline__ void srmmu_flush_tlb_region(unsigned long addr)
249} 249}
250 250
251 251
252extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr) 252static inline void srmmu_flush_tlb_segment(unsigned long addr)
253{ 253{
254 addr &= SRMMU_REAL_PMD_MASK; 254 addr &= SRMMU_REAL_PMD_MASK;
255 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : 255 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
@@ -258,7 +258,7 @@ extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr)
258 258
259} 259}
260 260
261extern __inline__ void srmmu_flush_tlb_page(unsigned long page) 261static inline void srmmu_flush_tlb_page(unsigned long page)
262{ 262{
263 page &= PAGE_MASK; 263 page &= PAGE_MASK;
264 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : 264 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
@@ -267,7 +267,7 @@ extern __inline__ void srmmu_flush_tlb_page(unsigned long page)
267 267
268} 268}
269 269
270extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr) 270static inline unsigned long srmmu_hwprobe(unsigned long vaddr)
271{ 271{
272 unsigned long retval; 272 unsigned long retval;
273 273
@@ -279,7 +279,7 @@ extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr)
279 return retval; 279 return retval;
280} 280}
281 281
282extern __inline__ int 282static inline int
283srmmu_get_pte (unsigned long addr) 283srmmu_get_pte (unsigned long addr)
284{ 284{
285 register unsigned long entry; 285 register unsigned long entry;
diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h
index 5a7a1a8d29ac..6fbb3f0af8d8 100644
--- a/include/asm-sparc/processor.h
+++ b/include/asm-sparc/processor.h
@@ -79,7 +79,7 @@ struct thread_struct {
79extern unsigned long thread_saved_pc(struct task_struct *t); 79extern unsigned long thread_saved_pc(struct task_struct *t);
80 80
81/* Do necessary setup to start up a newly executed thread. */ 81/* Do necessary setup to start up a newly executed thread. */
82extern __inline__ void start_thread(struct pt_regs * regs, unsigned long pc, 82static inline void start_thread(struct pt_regs * regs, unsigned long pc,
83 unsigned long sp) 83 unsigned long sp)
84{ 84{
85 register unsigned long zero asm("g1"); 85 register unsigned long zero asm("g1");
diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h
index 9778b8c8b15b..19c978051118 100644
--- a/include/asm-sparc/psr.h
+++ b/include/asm-sparc/psr.h
@@ -38,7 +38,7 @@
38 38
39#ifndef __ASSEMBLY__ 39#ifndef __ASSEMBLY__
40/* Get the %psr register. */ 40/* Get the %psr register. */
41extern __inline__ unsigned int get_psr(void) 41static inline unsigned int get_psr(void)
42{ 42{
43 unsigned int psr; 43 unsigned int psr;
44 __asm__ __volatile__( 44 __asm__ __volatile__(
@@ -53,7 +53,7 @@ extern __inline__ unsigned int get_psr(void)
53 return psr; 53 return psr;
54} 54}
55 55
56extern __inline__ void put_psr(unsigned int new_psr) 56static inline void put_psr(unsigned int new_psr)
57{ 57{
58 __asm__ __volatile__( 58 __asm__ __volatile__(
59 "wr %0, 0x0, %%psr\n\t" 59 "wr %0, 0x0, %%psr\n\t"
@@ -72,7 +72,7 @@ extern __inline__ void put_psr(unsigned int new_psr)
72 72
73extern unsigned int fsr_storage; 73extern unsigned int fsr_storage;
74 74
75extern __inline__ unsigned int get_fsr(void) 75static inline unsigned int get_fsr(void)
76{ 76{
77 unsigned int fsr = 0; 77 unsigned int fsr = 0;
78 78
diff --git a/include/asm-sparc/sbi.h b/include/asm-sparc/sbi.h
index 739ccac5dcf2..86a603ac7b20 100644
--- a/include/asm-sparc/sbi.h
+++ b/include/asm-sparc/sbi.h
@@ -65,7 +65,7 @@ struct sbi_regs {
65 65
66#ifndef __ASSEMBLY__ 66#ifndef __ASSEMBLY__
67 67
68extern __inline__ int acquire_sbi(int devid, int mask) 68static inline int acquire_sbi(int devid, int mask)
69{ 69{
70 __asm__ __volatile__ ("swapa [%2] %3, %0" : 70 __asm__ __volatile__ ("swapa [%2] %3, %0" :
71 "=r" (mask) : 71 "=r" (mask) :
@@ -75,7 +75,7 @@ extern __inline__ int acquire_sbi(int devid, int mask)
75 return mask; 75 return mask;
76} 76}
77 77
78extern __inline__ void release_sbi(int devid, int mask) 78static inline void release_sbi(int devid, int mask)
79{ 79{
80 __asm__ __volatile__ ("sta %0, [%1] %2" : : 80 __asm__ __volatile__ ("sta %0, [%1] %2" : :
81 "r" (mask), 81 "r" (mask),
@@ -83,7 +83,7 @@ extern __inline__ void release_sbi(int devid, int mask)
83 "i" (ASI_M_CTL)); 83 "i" (ASI_M_CTL));
84} 84}
85 85
86extern __inline__ void set_sbi_tid(int devid, int targetid) 86static inline void set_sbi_tid(int devid, int targetid)
87{ 87{
88 __asm__ __volatile__ ("sta %0, [%1] %2" : : 88 __asm__ __volatile__ ("sta %0, [%1] %2" : :
89 "r" (targetid), 89 "r" (targetid),
@@ -91,7 +91,7 @@ extern __inline__ void set_sbi_tid(int devid, int targetid)
91 "i" (ASI_M_CTL)); 91 "i" (ASI_M_CTL));
92} 92}
93 93
94extern __inline__ int get_sbi_ctl(int devid, int cfgno) 94static inline int get_sbi_ctl(int devid, int cfgno)
95{ 95{
96 int cfg; 96 int cfg;
97 97
@@ -102,7 +102,7 @@ extern __inline__ int get_sbi_ctl(int devid, int cfgno)
102 return cfg; 102 return cfg;
103} 103}
104 104
105extern __inline__ void set_sbi_ctl(int devid, int cfgno, int cfg) 105static inline void set_sbi_ctl(int devid, int cfgno, int cfg)
106{ 106{
107 __asm__ __volatile__ ("sta %0, [%1] %2" : : 107 __asm__ __volatile__ ("sta %0, [%1] %2" : :
108 "r" (cfg), 108 "r" (cfg),
diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h
index 3a8b3908728a..a13cddcecec5 100644
--- a/include/asm-sparc/sbus.h
+++ b/include/asm-sparc/sbus.h
@@ -28,12 +28,12 @@
28 * numbers + offsets, and vice versa. 28 * numbers + offsets, and vice versa.
29 */ 29 */
30 30
31extern __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset) 31static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
32{ 32{
33 return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset)); 33 return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset));
34} 34}
35 35
36extern __inline__ int sbus_dev_slot(unsigned long dev_addr) 36static inline int sbus_dev_slot(unsigned long dev_addr)
37{ 37{
38 return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25); 38 return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25);
39} 39}
@@ -80,7 +80,7 @@ struct sbus_bus {
80 80
81extern struct sbus_bus *sbus_root; 81extern struct sbus_bus *sbus_root;
82 82
83extern __inline__ int 83static inline int
84sbus_is_slave(struct sbus_dev *dev) 84sbus_is_slave(struct sbus_dev *dev)
85{ 85{
86 /* XXX Have to write this for sun4c's */ 86 /* XXX Have to write this for sun4c's */
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h
index 4f96d8333a12..580c51d011df 100644
--- a/include/asm-sparc/smp.h
+++ b/include/asm-sparc/smp.h
@@ -60,22 +60,22 @@ BTFIXUPDEF_BLACKBOX(load_current)
60#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) 60#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5)
61#define smp_message_pass(target,msg,data,wait) BTFIXUP_CALL(smp_message_pass)(target,msg,data,wait) 61#define smp_message_pass(target,msg,data,wait) BTFIXUP_CALL(smp_message_pass)(target,msg,data,wait)
62 62
63extern __inline__ void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } 63static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); }
64extern __inline__ void xc1(smpfunc_t func, unsigned long arg1) 64static inline void xc1(smpfunc_t func, unsigned long arg1)
65{ smp_cross_call(func, arg1, 0, 0, 0, 0); } 65{ smp_cross_call(func, arg1, 0, 0, 0, 0); }
66extern __inline__ void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) 66static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
67{ smp_cross_call(func, arg1, arg2, 0, 0, 0); } 67{ smp_cross_call(func, arg1, arg2, 0, 0, 0); }
68extern __inline__ void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, 68static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
69 unsigned long arg3) 69 unsigned long arg3)
70{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); } 70{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); }
71extern __inline__ void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, 71static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
72 unsigned long arg3, unsigned long arg4) 72 unsigned long arg3, unsigned long arg4)
73{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } 73{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); }
74extern __inline__ void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, 74static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
75 unsigned long arg3, unsigned long arg4, unsigned long arg5) 75 unsigned long arg3, unsigned long arg4, unsigned long arg5)
76{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } 76{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
77 77
78extern __inline__ int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait) 78static inline int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait)
79{ 79{
80 xc1((smpfunc_t)func, (unsigned long)info); 80 xc1((smpfunc_t)func, (unsigned long)info);
81 return 0; 81 return 0;
@@ -84,16 +84,16 @@ extern __inline__ int smp_call_function(void (*func)(void *info), void *info, in
84extern __volatile__ int __cpu_number_map[NR_CPUS]; 84extern __volatile__ int __cpu_number_map[NR_CPUS];
85extern __volatile__ int __cpu_logical_map[NR_CPUS]; 85extern __volatile__ int __cpu_logical_map[NR_CPUS];
86 86
87extern __inline__ int cpu_logical_map(int cpu) 87static inline int cpu_logical_map(int cpu)
88{ 88{
89 return __cpu_logical_map[cpu]; 89 return __cpu_logical_map[cpu];
90} 90}
91extern __inline__ int cpu_number_map(int cpu) 91static inline int cpu_number_map(int cpu)
92{ 92{
93 return __cpu_number_map[cpu]; 93 return __cpu_number_map[cpu];
94} 94}
95 95
96extern __inline__ int hard_smp4m_processor_id(void) 96static inline int hard_smp4m_processor_id(void)
97{ 97{
98 int cpuid; 98 int cpuid;
99 99
@@ -104,7 +104,7 @@ extern __inline__ int hard_smp4m_processor_id(void)
104 return cpuid; 104 return cpuid;
105} 105}
106 106
107extern __inline__ int hard_smp4d_processor_id(void) 107static inline int hard_smp4d_processor_id(void)
108{ 108{
109 int cpuid; 109 int cpuid;
110 110
@@ -114,7 +114,7 @@ extern __inline__ int hard_smp4d_processor_id(void)
114} 114}
115 115
116#ifndef MODULE 116#ifndef MODULE
117extern __inline__ int hard_smp_processor_id(void) 117static inline int hard_smp_processor_id(void)
118{ 118{
119 int cpuid; 119 int cpuid;
120 120
@@ -136,7 +136,7 @@ extern __inline__ int hard_smp_processor_id(void)
136 return cpuid; 136 return cpuid;
137} 137}
138#else 138#else
139extern __inline__ int hard_smp_processor_id(void) 139static inline int hard_smp_processor_id(void)
140{ 140{
141 int cpuid; 141 int cpuid;
142 142
diff --git a/include/asm-sparc/smpprim.h b/include/asm-sparc/smpprim.h
index 9b9c28ed748e..e7b6d346ae10 100644
--- a/include/asm-sparc/smpprim.h
+++ b/include/asm-sparc/smpprim.h
@@ -15,7 +15,7 @@
15 * atomic. 15 * atomic.
16 */ 16 */
17 17
18extern __inline__ __volatile__ char test_and_set(void *addr) 18static inline __volatile__ char test_and_set(void *addr)
19{ 19{
20 char state = 0; 20 char state = 0;
21 21
@@ -27,7 +27,7 @@ extern __inline__ __volatile__ char test_and_set(void *addr)
27} 27}
28 28
29/* Initialize a spin-lock. */ 29/* Initialize a spin-lock. */
30extern __inline__ __volatile__ smp_initlock(void *spinlock) 30static inline __volatile__ smp_initlock(void *spinlock)
31{ 31{
32 /* Unset the lock. */ 32 /* Unset the lock. */
33 *((unsigned char *) spinlock) = 0; 33 *((unsigned char *) spinlock) = 0;
@@ -36,7 +36,7 @@ extern __inline__ __volatile__ smp_initlock(void *spinlock)
36} 36}
37 37
38/* This routine spins until it acquires the lock at ADDR. */ 38/* This routine spins until it acquires the lock at ADDR. */
39extern __inline__ __volatile__ smp_lock(void *addr) 39static inline __volatile__ smp_lock(void *addr)
40{ 40{
41 while(test_and_set(addr) == 0xff) 41 while(test_and_set(addr) == 0xff)
42 ; 42 ;
@@ -46,7 +46,7 @@ extern __inline__ __volatile__ smp_lock(void *addr)
46} 46}
47 47
48/* This routine releases the lock at ADDR. */ 48/* This routine releases the lock at ADDR. */
49extern __inline__ __volatile__ smp_unlock(void *addr) 49static inline __volatile__ smp_unlock(void *addr)
50{ 50{
51 *((unsigned char *) addr) = 0; 51 *((unsigned char *) addr) = 0;
52} 52}
diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h
index 111727a2bb4e..e344c98a6f5f 100644
--- a/include/asm-sparc/spinlock.h
+++ b/include/asm-sparc/spinlock.h
@@ -17,7 +17,7 @@
17#define __raw_spin_unlock_wait(lock) \ 17#define __raw_spin_unlock_wait(lock) \
18 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) 18 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
19 19
20extern __inline__ void __raw_spin_lock(raw_spinlock_t *lock) 20static inline void __raw_spin_lock(raw_spinlock_t *lock)
21{ 21{
22 __asm__ __volatile__( 22 __asm__ __volatile__(
23 "\n1:\n\t" 23 "\n1:\n\t"
@@ -37,7 +37,7 @@ extern __inline__ void __raw_spin_lock(raw_spinlock_t *lock)
37 : "g2", "memory", "cc"); 37 : "g2", "memory", "cc");
38} 38}
39 39
40extern __inline__ int __raw_spin_trylock(raw_spinlock_t *lock) 40static inline int __raw_spin_trylock(raw_spinlock_t *lock)
41{ 41{
42 unsigned int result; 42 unsigned int result;
43 __asm__ __volatile__("ldstub [%1], %0" 43 __asm__ __volatile__("ldstub [%1], %0"
@@ -47,7 +47,7 @@ extern __inline__ int __raw_spin_trylock(raw_spinlock_t *lock)
47 return (result == 0); 47 return (result == 0);
48} 48}
49 49
50extern __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) 50static inline void __raw_spin_unlock(raw_spinlock_t *lock)
51{ 51{
52 __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); 52 __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory");
53} 53}
@@ -78,7 +78,7 @@ extern __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
78 * 78 *
79 * Unfortunately this scheme limits us to ~16,000,000 cpus. 79 * Unfortunately this scheme limits us to ~16,000,000 cpus.
80 */ 80 */
81extern __inline__ void __read_lock(raw_rwlock_t *rw) 81static inline void __read_lock(raw_rwlock_t *rw)
82{ 82{
83 register raw_rwlock_t *lp asm("g1"); 83 register raw_rwlock_t *lp asm("g1");
84 lp = rw; 84 lp = rw;
@@ -98,7 +98,7 @@ do { unsigned long flags; \
98 local_irq_restore(flags); \ 98 local_irq_restore(flags); \
99} while(0) 99} while(0)
100 100
101extern __inline__ void __read_unlock(raw_rwlock_t *rw) 101static inline void __read_unlock(raw_rwlock_t *rw)
102{ 102{
103 register raw_rwlock_t *lp asm("g1"); 103 register raw_rwlock_t *lp asm("g1");
104 lp = rw; 104 lp = rw;
diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h
index 3557781a4bfd..1f6b71f9e1b6 100644
--- a/include/asm-sparc/system.h
+++ b/include/asm-sparc/system.h
@@ -204,7 +204,7 @@ static inline unsigned long getipl(void)
204BTFIXUPDEF_CALL(void, ___xchg32, void) 204BTFIXUPDEF_CALL(void, ___xchg32, void)
205#endif 205#endif
206 206
207extern __inline__ unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) 207static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
208{ 208{
209#ifdef CONFIG_SMP 209#ifdef CONFIG_SMP
210 __asm__ __volatile__("swap [%2], %0" 210 __asm__ __volatile__("swap [%2], %0"
diff --git a/include/asm-sparc/traps.h b/include/asm-sparc/traps.h
index 6690ab956ea6..f62c7f878ee1 100644
--- a/include/asm-sparc/traps.h
+++ b/include/asm-sparc/traps.h
@@ -22,7 +22,7 @@ struct tt_entry {
22/* We set this to _start in system setup. */ 22/* We set this to _start in system setup. */
23extern struct tt_entry *sparc_ttable; 23extern struct tt_entry *sparc_ttable;
24 24
25extern __inline__ unsigned long get_tbr(void) 25static inline unsigned long get_tbr(void)
26{ 26{
27 unsigned long tbr; 27 unsigned long tbr;
28 28