diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-26 21:35:22 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-26 21:35:22 -0400 |
| commit | d55a4528f7f607ca2872fec18574bc8cec060f05 (patch) | |
| tree | d7fa9184df280c53efaf5a73d648a255ed142196 /include/asm-sparc64 | |
| parent | 08dcf29e01dcb786c13dc80045bd65f804117efb (diff) | |
| parent | c101b088ba0ed16d7109b2f3c2d16798d162a535 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC64]: Define TASK_SIZE_OF()
[SPARC64]: flush_ptrace_access() needs preemption disable.
[SPARC64]: Update defconfig.
[SPARC64]: Fix allnoconfig build, ptrace.c missing CONFIG_COMPAT checks.
[SPARC64]: Fix __get_cpu_var in preemption-enabled area.
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/signal.c
[SPARC64]: Fix most sparse warnings in arch/sparc64/kernel/sys_sparc.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/time.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/ptrace.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/irq.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/iommu.c
[SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/{cpu,setup}.c
[SPARC64]: Adjust {TLBTEMP,TSBMAP}_BASE.
[SPARC64]: Make save_stack_trace() more efficient.
Diffstat (limited to 'include/asm-sparc64')
| -rw-r--r-- | include/asm-sparc64/cpudata.h | 2 | ||||
| -rw-r--r-- | include/asm-sparc64/dcu.h | 41 | ||||
| -rw-r--r-- | include/asm-sparc64/irq.h | 1 | ||||
| -rw-r--r-- | include/asm-sparc64/pgtable.h | 12 | ||||
| -rw-r--r-- | include/asm-sparc64/processor.h | 3 | ||||
| -rw-r--r-- | include/asm-sparc64/stacktrace.h | 6 | ||||
| -rw-r--r-- | include/asm-sparc64/timer.h | 9 |
7 files changed, 45 insertions, 29 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index 542421460a12..532975ecfe10 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h | |||
| @@ -86,6 +86,8 @@ extern struct trap_per_cpu trap_block[NR_CPUS]; | |||
| 86 | extern void init_cur_cpu_trap(struct thread_info *); | 86 | extern void init_cur_cpu_trap(struct thread_info *); |
| 87 | extern void setup_tba(void); | 87 | extern void setup_tba(void); |
| 88 | extern int ncpus_probed; | 88 | extern int ncpus_probed; |
| 89 | extern void __init cpu_probe(void); | ||
| 90 | extern const struct seq_operations cpuinfo_op; | ||
| 89 | 91 | ||
| 90 | extern unsigned long real_hard_smp_processor_id(void); | 92 | extern unsigned long real_hard_smp_processor_id(void); |
| 91 | 93 | ||
diff --git a/include/asm-sparc64/dcu.h b/include/asm-sparc64/dcu.h index ecbed2ae548f..0f704e106a1b 100644 --- a/include/asm-sparc64/dcu.h +++ b/include/asm-sparc64/dcu.h | |||
| @@ -1,26 +1,27 @@ | |||
| 1 | /* $Id: dcu.h,v 1.2 2001/03/01 23:23:33 davem Exp $ */ | ||
| 2 | #ifndef _SPARC64_DCU_H | 1 | #ifndef _SPARC64_DCU_H |
| 3 | #define _SPARC64_DCU_H | 2 | #define _SPARC64_DCU_H |
| 4 | 3 | ||
| 4 | #include <linux/const.h> | ||
| 5 | |||
| 5 | /* UltraSparc-III Data Cache Unit Control Register */ | 6 | /* UltraSparc-III Data Cache Unit Control Register */ |
| 6 | #define DCU_CP 0x0002000000000000 /* Physical Cache Enable w/o mmu*/ | 7 | #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */ |
| 7 | #define DCU_CV 0x0001000000000000 /* Virtual Cache Enable w/o mmu */ | 8 | #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */ |
| 8 | #define DCU_ME 0x0000800000000000 /* NC-store Merging Enable */ | 9 | #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */ |
| 9 | #define DCU_RE 0x0000400000000000 /* RAW bypass Enable */ | 10 | #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */ |
| 10 | #define DCU_PE 0x0000200000000000 /* PCache Enable */ | 11 | #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */ |
| 11 | #define DCU_HPE 0x0000100000000000 /* HW prefetch Enable */ | 12 | #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */ |
| 12 | #define DCU_SPE 0x0000080000000000 /* SW prefetch Enable */ | 13 | #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */ |
| 13 | #define DCU_SL 0x0000040000000000 /* Secondary load steering Enab */ | 14 | #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/ |
| 14 | #define DCU_WE 0x0000020000000000 /* WCache enable */ | 15 | #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */ |
| 15 | #define DCU_PM 0x000001fe00000000 /* PA Watchpoint Byte Mask */ | 16 | #define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */ |
| 16 | #define DCU_VM 0x00000001fe000000 /* VA Watchpoint Byte Mask */ | 17 | #define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */ |
| 17 | #define DCU_PR 0x0000000001000000 /* PA Watchpoint Read Enable */ | 18 | #define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */ |
| 18 | #define DCU_PW 0x0000000000800000 /* PA Watchpoint Write Enable */ | 19 | #define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/ |
| 19 | #define DCU_VR 0x0000000000400000 /* VA Watchpoint Read Enable */ | 20 | #define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */ |
| 20 | #define DCU_VW 0x0000000000200000 /* VA Watchpoint Write Enable */ | 21 | #define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/ |
| 21 | #define DCU_DM 0x0000000000000008 /* DMMU Enable */ | 22 | #define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */ |
| 22 | #define DCU_IM 0x0000000000000004 /* IMMU Enable */ | 23 | #define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */ |
| 23 | #define DCU_DC 0x0000000000000002 /* Data Cache Enable */ | 24 | #define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */ |
| 24 | #define DCU_IC 0x0000000000000001 /* Instruction Cache Enable */ | 25 | #define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */ |
| 25 | 26 | ||
| 26 | #endif /* _SPARC64_DCU_H */ | 27 | #endif /* _SPARC64_DCU_H */ |
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index 30cb76b47be1..0bb9bf531745 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h | |||
| @@ -64,6 +64,7 @@ extern unsigned char virt_irq_alloc(unsigned int dev_handle, | |||
| 64 | extern void virt_irq_free(unsigned int virt_irq); | 64 | extern void virt_irq_free(unsigned int virt_irq); |
| 65 | #endif | 65 | #endif |
| 66 | 66 | ||
| 67 | extern void __init init_IRQ(void); | ||
| 67 | extern void fixup_irqs(void); | 68 | extern void fixup_irqs(void); |
| 68 | 69 | ||
| 69 | static inline void set_softint(unsigned long bits) | 70 | static inline void set_softint(unsigned long bits) |
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h index 3167ccff64f8..549e45266b68 100644 --- a/include/asm-sparc64/pgtable.h +++ b/include/asm-sparc64/pgtable.h | |||
| @@ -23,9 +23,9 @@ | |||
| 23 | #include <asm/page.h> | 23 | #include <asm/page.h> |
| 24 | #include <asm/processor.h> | 24 | #include <asm/processor.h> |
| 25 | 25 | ||
| 26 | /* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 32MB). | 26 | /* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). |
| 27 | * The page copy blockops can use 0x2000000 to 0x4000000. | 27 | * The page copy blockops can use 0x6000000 to 0x8000000. |
| 28 | * The TSB is mapped in the 0x4000000 to 0x6000000 range. | 28 | * The TSB is mapped in the 0x8000000 to 0xa000000 range. |
| 29 | * The PROM resides in an area spanning 0xf0000000 to 0x100000000. | 29 | * The PROM resides in an area spanning 0xf0000000 to 0x100000000. |
| 30 | * The vmalloc area spans 0x100000000 to 0x200000000. | 30 | * The vmalloc area spans 0x100000000 to 0x200000000. |
| 31 | * Since modules need to be in the lowest 32-bits of the address space, | 31 | * Since modules need to be in the lowest 32-bits of the address space, |
| @@ -33,8 +33,8 @@ | |||
| 33 | * There is a single static kernel PMD which maps from 0x0 to address | 33 | * There is a single static kernel PMD which maps from 0x0 to address |
| 34 | * 0x400000000. | 34 | * 0x400000000. |
| 35 | */ | 35 | */ |
| 36 | #define TLBTEMP_BASE _AC(0x0000000002000000,UL) | 36 | #define TLBTEMP_BASE _AC(0x0000000006000000,UL) |
| 37 | #define TSBMAP_BASE _AC(0x0000000004000000,UL) | 37 | #define TSBMAP_BASE _AC(0x0000000008000000,UL) |
| 38 | #define MODULES_VADDR _AC(0x0000000010000000,UL) | 38 | #define MODULES_VADDR _AC(0x0000000010000000,UL) |
| 39 | #define MODULES_LEN _AC(0x00000000e0000000,UL) | 39 | #define MODULES_LEN _AC(0x00000000e0000000,UL) |
| 40 | #define MODULES_END _AC(0x00000000f0000000,UL) | 40 | #define MODULES_END _AC(0x00000000f0000000,UL) |
| @@ -761,6 +761,8 @@ extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, | |||
| 761 | extern void pgtable_cache_init(void); | 761 | extern void pgtable_cache_init(void); |
| 762 | extern void sun4v_register_fault_status(void); | 762 | extern void sun4v_register_fault_status(void); |
| 763 | extern void sun4v_ktsb_register(void); | 763 | extern void sun4v_ktsb_register(void); |
| 764 | extern void __init cheetah_ecache_flush_init(void); | ||
| 765 | extern void sun4v_patch_tlb_handlers(void); | ||
| 764 | 766 | ||
| 765 | extern unsigned long cmdline_memory_size; | 767 | extern unsigned long cmdline_memory_size; |
| 766 | 768 | ||
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h index 8da484c19822..885b6a1dcae4 100644 --- a/include/asm-sparc64/processor.h +++ b/include/asm-sparc64/processor.h | |||
| @@ -37,6 +37,9 @@ | |||
| 37 | #endif | 37 | #endif |
| 38 | 38 | ||
| 39 | #define TASK_SIZE ((unsigned long)-VPTE_SIZE) | 39 | #define TASK_SIZE ((unsigned long)-VPTE_SIZE) |
| 40 | #define TASK_SIZE_OF(tsk) \ | ||
| 41 | (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ | ||
| 42 | (1UL << 32UL) : TASK_SIZE) | ||
| 40 | #ifdef __KERNEL__ | 43 | #ifdef __KERNEL__ |
| 41 | 44 | ||
| 42 | #define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) | 45 | #define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) |
diff --git a/include/asm-sparc64/stacktrace.h b/include/asm-sparc64/stacktrace.h new file mode 100644 index 000000000000..6cee39adf6d6 --- /dev/null +++ b/include/asm-sparc64/stacktrace.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _SPARC64_STACKTRACE_H | ||
| 2 | #define _SPARC64_STACKTRACE_H | ||
| 3 | |||
| 4 | extern void stack_trace_flush(void); | ||
| 5 | |||
| 6 | #endif /* _SPARC64_STACKTRACE_H */ | ||
diff --git a/include/asm-sparc64/timer.h b/include/asm-sparc64/timer.h index ccbd69448866..5b779fd1f788 100644 --- a/include/asm-sparc64/timer.h +++ b/include/asm-sparc64/timer.h | |||
| @@ -1,14 +1,13 @@ | |||
| 1 | /* $Id: timer.h,v 1.3 2000/05/09 17:40:15 davem Exp $ | 1 | /* timer.h: System timer definitions for sun5. |
| 2 | * timer.h: System timer definitions for sun5. | ||
| 3 | * | 2 | * |
| 4 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net) |
| 5 | */ | 4 | */ |
| 6 | 5 | ||
| 7 | #ifndef _SPARC64_TIMER_H | 6 | #ifndef _SPARC64_TIMER_H |
| 8 | #define _SPARC64_TIMER_H | 7 | #define _SPARC64_TIMER_H |
| 9 | 8 | ||
| 10 | #include <linux/types.h> | 9 | #include <linux/types.h> |
| 11 | 10 | #include <linux/init.h> | |
| 12 | 11 | ||
| 13 | struct sparc64_tick_ops { | 12 | struct sparc64_tick_ops { |
| 14 | unsigned long (*get_tick)(void); | 13 | unsigned long (*get_tick)(void); |
| @@ -25,5 +24,7 @@ struct sparc64_tick_ops { | |||
| 25 | extern struct sparc64_tick_ops *tick_ops; | 24 | extern struct sparc64_tick_ops *tick_ops; |
| 26 | 25 | ||
| 27 | extern unsigned long sparc64_get_clock_tick(unsigned int cpu); | 26 | extern unsigned long sparc64_get_clock_tick(unsigned int cpu); |
| 27 | extern void __devinit setup_sparc64_timer(void); | ||
| 28 | extern void __init time_init(void); | ||
| 28 | 29 | ||
| 29 | #endif /* _SPARC64_TIMER_H */ | 30 | #endif /* _SPARC64_TIMER_H */ |
