diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2007-10-27 03:13:04 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-10-27 03:13:04 -0400 |
commit | d979f1792d1a4867eda0028b3aac8c6d4a535bb7 (patch) | |
tree | 89a8a9471ad2fa57f7349426ac62d14f3f134c63 /include/asm-sparc64 | |
parent | ec3b67c11df42362ccda81261d62829042f223f0 (diff) |
[SPARC64]: __inline__ --> inline
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64')
-rw-r--r-- | include/asm-sparc64/atomic.h | 7 | ||||
-rw-r--r-- | include/asm-sparc64/byteorder.h | 7 | ||||
-rw-r--r-- | include/asm-sparc64/fpumacro.h | 4 | ||||
-rw-r--r-- | include/asm-sparc64/io.h | 29 | ||||
-rw-r--r-- | include/asm-sparc64/irq.h | 11 | ||||
-rw-r--r-- | include/asm-sparc64/mostek.h | 9 | ||||
-rw-r--r-- | include/asm-sparc64/ns87303.h | 5 | ||||
-rw-r--r-- | include/asm-sparc64/parport.h | 21 | ||||
-rw-r--r-- | include/asm-sparc64/posix_types.h | 8 | ||||
-rw-r--r-- | include/asm-sparc64/sbus.h | 4 | ||||
-rw-r--r-- | include/asm-sparc64/spitfire.h | 53 | ||||
-rw-r--r-- | include/asm-sparc64/system.h | 9 | ||||
-rw-r--r-- | include/asm-sparc64/upa.h | 17 | ||||
-rw-r--r-- | include/asm-sparc64/visasm.h | 3 |
14 files changed, 88 insertions, 99 deletions
diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h index 3fb4e1f7f186..2c71ec4a3b18 100644 --- a/include/asm-sparc64/atomic.h +++ b/include/asm-sparc64/atomic.h | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: atomic.h,v 1.22 2001/07/11 23:56:07 davem Exp $ | 1 | /* atomic.h: Thankfully the V9 is at least reasonable for this |
2 | * atomic.h: Thankfully the V9 is at least reasonable for this | ||
3 | * stuff. | 2 | * stuff. |
4 | * | 3 | * |
5 | * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) | 4 | * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) |
@@ -74,7 +73,7 @@ extern int atomic64_sub_ret(int, atomic64_t *); | |||
74 | #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) | 73 | #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) |
75 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | 74 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) |
76 | 75 | ||
77 | static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) | 76 | static inline int atomic_add_unless(atomic_t *v, int a, int u) |
78 | { | 77 | { |
79 | int c, old; | 78 | int c, old; |
80 | c = atomic_read(v); | 79 | c = atomic_read(v); |
@@ -95,7 +94,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) | |||
95 | ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) | 94 | ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) |
96 | #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) | 95 | #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) |
97 | 96 | ||
98 | static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) | 97 | static inline int atomic64_add_unless(atomic64_t *v, long a, long u) |
99 | { | 98 | { |
100 | long c, old; | 99 | long c, old; |
101 | c = atomic64_read(v); | 100 | c = atomic64_read(v); |
diff --git a/include/asm-sparc64/byteorder.h b/include/asm-sparc64/byteorder.h index c69b08af5fe0..3943022906fd 100644 --- a/include/asm-sparc64/byteorder.h +++ b/include/asm-sparc64/byteorder.h | |||
@@ -1,4 +1,3 @@ | |||
1 | /* $Id: byteorder.h,v 1.8 1997/12/18 02:44:14 ecd Exp $ */ | ||
2 | #ifndef _SPARC64_BYTEORDER_H | 1 | #ifndef _SPARC64_BYTEORDER_H |
3 | #define _SPARC64_BYTEORDER_H | 2 | #define _SPARC64_BYTEORDER_H |
4 | 3 | ||
@@ -7,7 +6,7 @@ | |||
7 | 6 | ||
8 | #ifdef __GNUC__ | 7 | #ifdef __GNUC__ |
9 | 8 | ||
10 | static __inline__ __u16 ___arch__swab16p(const __u16 *addr) | 9 | static inline __u16 ___arch__swab16p(const __u16 *addr) |
11 | { | 10 | { |
12 | __u16 ret; | 11 | __u16 ret; |
13 | 12 | ||
@@ -17,7 +16,7 @@ static __inline__ __u16 ___arch__swab16p(const __u16 *addr) | |||
17 | return ret; | 16 | return ret; |
18 | } | 17 | } |
19 | 18 | ||
20 | static __inline__ __u32 ___arch__swab32p(const __u32 *addr) | 19 | static inline __u32 ___arch__swab32p(const __u32 *addr) |
21 | { | 20 | { |
22 | __u32 ret; | 21 | __u32 ret; |
23 | 22 | ||
@@ -27,7 +26,7 @@ static __inline__ __u32 ___arch__swab32p(const __u32 *addr) | |||
27 | return ret; | 26 | return ret; |
28 | } | 27 | } |
29 | 28 | ||
30 | static __inline__ __u64 ___arch__swab64p(const __u64 *addr) | 29 | static inline __u64 ___arch__swab64p(const __u64 *addr) |
31 | { | 30 | { |
32 | __u64 ret; | 31 | __u64 ret; |
33 | 32 | ||
diff --git a/include/asm-sparc64/fpumacro.h b/include/asm-sparc64/fpumacro.h index d583e5efd75d..cc463fec806f 100644 --- a/include/asm-sparc64/fpumacro.h +++ b/include/asm-sparc64/fpumacro.h | |||
@@ -16,7 +16,7 @@ struct fpustate { | |||
16 | 16 | ||
17 | #define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs) | 17 | #define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs) |
18 | 18 | ||
19 | static __inline__ unsigned long fprs_read(void) | 19 | static inline unsigned long fprs_read(void) |
20 | { | 20 | { |
21 | unsigned long retval; | 21 | unsigned long retval; |
22 | 22 | ||
@@ -25,7 +25,7 @@ static __inline__ unsigned long fprs_read(void) | |||
25 | return retval; | 25 | return retval; |
26 | } | 26 | } |
27 | 27 | ||
28 | static __inline__ void fprs_write(unsigned long val) | 28 | static inline void fprs_write(unsigned long val) |
29 | { | 29 | { |
30 | __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val)); | 30 | __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val)); |
31 | } | 31 | } |
diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h index cd7ef3097ac2..c299b853b5ba 100644 --- a/include/asm-sparc64/io.h +++ b/include/asm-sparc64/io.h | |||
@@ -1,4 +1,3 @@ | |||
1 | /* $Id: io.h,v 1.47 2001/12/13 10:36:02 davem Exp $ */ | ||
2 | #ifndef __SPARC64_IO_H | 1 | #ifndef __SPARC64_IO_H |
3 | #define __SPARC64_IO_H | 2 | #define __SPARC64_IO_H |
4 | 3 | ||
@@ -19,7 +18,7 @@ extern unsigned long kern_base, kern_size; | |||
19 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | 18 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) |
20 | #define BIO_VMERGE_BOUNDARY 8192 | 19 | #define BIO_VMERGE_BOUNDARY 8192 |
21 | 20 | ||
22 | static __inline__ u8 _inb(unsigned long addr) | 21 | static inline u8 _inb(unsigned long addr) |
23 | { | 22 | { |
24 | u8 ret; | 23 | u8 ret; |
25 | 24 | ||
@@ -30,7 +29,7 @@ static __inline__ u8 _inb(unsigned long addr) | |||
30 | return ret; | 29 | return ret; |
31 | } | 30 | } |
32 | 31 | ||
33 | static __inline__ u16 _inw(unsigned long addr) | 32 | static inline u16 _inw(unsigned long addr) |
34 | { | 33 | { |
35 | u16 ret; | 34 | u16 ret; |
36 | 35 | ||
@@ -41,7 +40,7 @@ static __inline__ u16 _inw(unsigned long addr) | |||
41 | return ret; | 40 | return ret; |
42 | } | 41 | } |
43 | 42 | ||
44 | static __inline__ u32 _inl(unsigned long addr) | 43 | static inline u32 _inl(unsigned long addr) |
45 | { | 44 | { |
46 | u32 ret; | 45 | u32 ret; |
47 | 46 | ||
@@ -52,21 +51,21 @@ static __inline__ u32 _inl(unsigned long addr) | |||
52 | return ret; | 51 | return ret; |
53 | } | 52 | } |
54 | 53 | ||
55 | static __inline__ void _outb(u8 b, unsigned long addr) | 54 | static inline void _outb(u8 b, unsigned long addr) |
56 | { | 55 | { |
57 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" | 56 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" |
58 | : /* no outputs */ | 57 | : /* no outputs */ |
59 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 58 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); |
60 | } | 59 | } |
61 | 60 | ||
62 | static __inline__ void _outw(u16 w, unsigned long addr) | 61 | static inline void _outw(u16 w, unsigned long addr) |
63 | { | 62 | { |
64 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" | 63 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" |
65 | : /* no outputs */ | 64 | : /* no outputs */ |
66 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 65 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); |
67 | } | 66 | } |
68 | 67 | ||
69 | static __inline__ void _outl(u32 l, unsigned long addr) | 68 | static inline void _outl(u32 l, unsigned long addr) |
70 | { | 69 | { |
71 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" | 70 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" |
72 | : /* no outputs */ | 71 | : /* no outputs */ |
@@ -205,7 +204,7 @@ static inline void _writeq(u64 q, volatile void __iomem *addr) | |||
205 | #define writeq(__q, __addr) _writeq(__q, __addr) | 204 | #define writeq(__q, __addr) _writeq(__q, __addr) |
206 | 205 | ||
207 | /* Now versions without byte-swapping. */ | 206 | /* Now versions without byte-swapping. */ |
208 | static __inline__ u8 _raw_readb(unsigned long addr) | 207 | static inline u8 _raw_readb(unsigned long addr) |
209 | { | 208 | { |
210 | u8 ret; | 209 | u8 ret; |
211 | 210 | ||
@@ -216,7 +215,7 @@ static __inline__ u8 _raw_readb(unsigned long addr) | |||
216 | return ret; | 215 | return ret; |
217 | } | 216 | } |
218 | 217 | ||
219 | static __inline__ u16 _raw_readw(unsigned long addr) | 218 | static inline u16 _raw_readw(unsigned long addr) |
220 | { | 219 | { |
221 | u16 ret; | 220 | u16 ret; |
222 | 221 | ||
@@ -227,7 +226,7 @@ static __inline__ u16 _raw_readw(unsigned long addr) | |||
227 | return ret; | 226 | return ret; |
228 | } | 227 | } |
229 | 228 | ||
230 | static __inline__ u32 _raw_readl(unsigned long addr) | 229 | static inline u32 _raw_readl(unsigned long addr) |
231 | { | 230 | { |
232 | u32 ret; | 231 | u32 ret; |
233 | 232 | ||
@@ -238,7 +237,7 @@ static __inline__ u32 _raw_readl(unsigned long addr) | |||
238 | return ret; | 237 | return ret; |
239 | } | 238 | } |
240 | 239 | ||
241 | static __inline__ u64 _raw_readq(unsigned long addr) | 240 | static inline u64 _raw_readq(unsigned long addr) |
242 | { | 241 | { |
243 | u64 ret; | 242 | u64 ret; |
244 | 243 | ||
@@ -249,28 +248,28 @@ static __inline__ u64 _raw_readq(unsigned long addr) | |||
249 | return ret; | 248 | return ret; |
250 | } | 249 | } |
251 | 250 | ||
252 | static __inline__ void _raw_writeb(u8 b, unsigned long addr) | 251 | static inline void _raw_writeb(u8 b, unsigned long addr) |
253 | { | 252 | { |
254 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" | 253 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" |
255 | : /* no outputs */ | 254 | : /* no outputs */ |
256 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 255 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
257 | } | 256 | } |
258 | 257 | ||
259 | static __inline__ void _raw_writew(u16 w, unsigned long addr) | 258 | static inline void _raw_writew(u16 w, unsigned long addr) |
260 | { | 259 | { |
261 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" | 260 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" |
262 | : /* no outputs */ | 261 | : /* no outputs */ |
263 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 262 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
264 | } | 263 | } |
265 | 264 | ||
266 | static __inline__ void _raw_writel(u32 l, unsigned long addr) | 265 | static inline void _raw_writel(u32 l, unsigned long addr) |
267 | { | 266 | { |
268 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" | 267 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" |
269 | : /* no outputs */ | 268 | : /* no outputs */ |
270 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 269 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
271 | } | 270 | } |
272 | 271 | ||
273 | static __inline__ void _raw_writeq(u64 q, unsigned long addr) | 272 | static inline void _raw_writeq(u64 q, unsigned long addr) |
274 | { | 273 | { |
275 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" | 274 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" |
276 | : /* no outputs */ | 275 | : /* no outputs */ |
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index 182dba05c702..30cb76b47be1 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h | |||
@@ -1,7 +1,6 @@ | |||
1 | /* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $ | 1 | /* irq.h: IRQ registers on the 64-bit Sparc. |
2 | * irq.h: IRQ registers on the 64-bit Sparc. | ||
3 | * | 2 | * |
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1996 David S. Miller (davem@davemloft.net) |
5 | * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) | 4 | * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) |
6 | */ | 5 | */ |
7 | 6 | ||
@@ -67,21 +66,21 @@ extern void virt_irq_free(unsigned int virt_irq); | |||
67 | 66 | ||
68 | extern void fixup_irqs(void); | 67 | extern void fixup_irqs(void); |
69 | 68 | ||
70 | static __inline__ void set_softint(unsigned long bits) | 69 | static inline void set_softint(unsigned long bits) |
71 | { | 70 | { |
72 | __asm__ __volatile__("wr %0, 0x0, %%set_softint" | 71 | __asm__ __volatile__("wr %0, 0x0, %%set_softint" |
73 | : /* No outputs */ | 72 | : /* No outputs */ |
74 | : "r" (bits)); | 73 | : "r" (bits)); |
75 | } | 74 | } |
76 | 75 | ||
77 | static __inline__ void clear_softint(unsigned long bits) | 76 | static inline void clear_softint(unsigned long bits) |
78 | { | 77 | { |
79 | __asm__ __volatile__("wr %0, 0x0, %%clear_softint" | 78 | __asm__ __volatile__("wr %0, 0x0, %%clear_softint" |
80 | : /* No outputs */ | 79 | : /* No outputs */ |
81 | : "r" (bits)); | 80 | : "r" (bits)); |
82 | } | 81 | } |
83 | 82 | ||
84 | static __inline__ unsigned long get_softint(void) | 83 | static inline unsigned long get_softint(void) |
85 | { | 84 | { |
86 | unsigned long retval; | 85 | unsigned long retval; |
87 | 86 | ||
diff --git a/include/asm-sparc64/mostek.h b/include/asm-sparc64/mostek.h index d14dd8988161..c5652de2ace2 100644 --- a/include/asm-sparc64/mostek.h +++ b/include/asm-sparc64/mostek.h | |||
@@ -1,7 +1,6 @@ | |||
1 | /* $Id: mostek.h,v 1.4 2001/01/11 15:07:09 davem Exp $ | 1 | /* mostek.h: Describes the various Mostek time of day clock registers. |
2 | * mostek.h: Describes the various Mostek time of day clock registers. | ||
3 | * | 2 | * |
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1995 David S. Miller (davem@davemloft.net) |
5 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) | 4 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) |
6 | */ | 5 | */ |
7 | 6 | ||
@@ -38,7 +37,7 @@ | |||
38 | * | 37 | * |
39 | * We now deal with physical addresses for I/O to the chip. -DaveM | 38 | * We now deal with physical addresses for I/O to the chip. -DaveM |
40 | */ | 39 | */ |
41 | static __inline__ u8 mostek_read(void __iomem *addr) | 40 | static inline u8 mostek_read(void __iomem *addr) |
42 | { | 41 | { |
43 | u8 ret; | 42 | u8 ret; |
44 | 43 | ||
@@ -48,7 +47,7 @@ static __inline__ u8 mostek_read(void __iomem *addr) | |||
48 | return ret; | 47 | return ret; |
49 | } | 48 | } |
50 | 49 | ||
51 | static __inline__ void mostek_write(void __iomem *addr, u8 val) | 50 | static inline void mostek_write(void __iomem *addr, u8 val) |
52 | { | 51 | { |
53 | __asm__ __volatile__("stba %0, [%1] %2" | 52 | __asm__ __volatile__("stba %0, [%1] %2" |
54 | : /* no outputs */ | 53 | : /* no outputs */ |
diff --git a/include/asm-sparc64/ns87303.h b/include/asm-sparc64/ns87303.h index 6d58fdf349b5..686defe6aaa0 100644 --- a/include/asm-sparc64/ns87303.h +++ b/include/asm-sparc64/ns87303.h | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: ns87303.h,v 1.3 2000/01/09 15:16:34 ecd Exp $ | 1 | /* ns87303.h: Configuration Register Description for the |
2 | * ns87303.h: Configuration Register Description for the | ||
3 | * National Semiconductor PC87303 (SuperIO). | 2 | * National Semiconductor PC87303 (SuperIO). |
4 | * | 3 | * |
5 | * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) | 4 | * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) |
@@ -85,7 +84,7 @@ | |||
85 | 84 | ||
86 | extern spinlock_t ns87303_lock; | 85 | extern spinlock_t ns87303_lock; |
87 | 86 | ||
88 | static __inline__ int ns87303_modify(unsigned long port, unsigned int index, | 87 | static inline int ns87303_modify(unsigned long port, unsigned int index, |
89 | unsigned char clr, unsigned char set) | 88 | unsigned char clr, unsigned char set) |
90 | { | 89 | { |
91 | static unsigned char reserved[] = { | 90 | static unsigned char reserved[] = { |
diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h index 8116e8f6062c..e9555b246c8d 100644 --- a/include/asm-sparc64/parport.h +++ b/include/asm-sparc64/parport.h | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: parport.h,v 1.11 2001/05/11 07:54:24 davem Exp $ | 1 | /* parport.h: sparc64 specific parport initialization and dma. |
2 | * parport.h: sparc64 specific parport initialization and dma. | ||
3 | * | 2 | * |
4 | * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) | 3 | * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) |
5 | */ | 4 | */ |
@@ -42,7 +41,7 @@ static struct sparc_ebus_info { | |||
42 | 41 | ||
43 | static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); | 42 | static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); |
44 | 43 | ||
45 | static __inline__ int request_dma(unsigned int dmanr, const char *device_id) | 44 | static inline int request_dma(unsigned int dmanr, const char *device_id) |
46 | { | 45 | { |
47 | if (dmanr >= PARPORT_PC_MAX_PORTS) | 46 | if (dmanr >= PARPORT_PC_MAX_PORTS) |
48 | return -EINVAL; | 47 | return -EINVAL; |
@@ -51,7 +50,7 @@ static __inline__ int request_dma(unsigned int dmanr, const char *device_id) | |||
51 | return 0; | 50 | return 0; |
52 | } | 51 | } |
53 | 52 | ||
54 | static __inline__ void free_dma(unsigned int dmanr) | 53 | static inline void free_dma(unsigned int dmanr) |
55 | { | 54 | { |
56 | if (dmanr >= PARPORT_PC_MAX_PORTS) { | 55 | if (dmanr >= PARPORT_PC_MAX_PORTS) { |
57 | printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); | 56 | printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); |
@@ -63,7 +62,7 @@ static __inline__ void free_dma(unsigned int dmanr) | |||
63 | } | 62 | } |
64 | } | 63 | } |
65 | 64 | ||
66 | static __inline__ void enable_dma(unsigned int dmanr) | 65 | static inline void enable_dma(unsigned int dmanr) |
67 | { | 66 | { |
68 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); | 67 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); |
69 | 68 | ||
@@ -73,32 +72,32 @@ static __inline__ void enable_dma(unsigned int dmanr) | |||
73 | BUG(); | 72 | BUG(); |
74 | } | 73 | } |
75 | 74 | ||
76 | static __inline__ void disable_dma(unsigned int dmanr) | 75 | static inline void disable_dma(unsigned int dmanr) |
77 | { | 76 | { |
78 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); | 77 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); |
79 | } | 78 | } |
80 | 79 | ||
81 | static __inline__ void clear_dma_ff(unsigned int dmanr) | 80 | static inline void clear_dma_ff(unsigned int dmanr) |
82 | { | 81 | { |
83 | /* nothing */ | 82 | /* nothing */ |
84 | } | 83 | } |
85 | 84 | ||
86 | static __inline__ void set_dma_mode(unsigned int dmanr, char mode) | 85 | static inline void set_dma_mode(unsigned int dmanr, char mode) |
87 | { | 86 | { |
88 | ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); | 87 | ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); |
89 | } | 88 | } |
90 | 89 | ||
91 | static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int addr) | 90 | static inline void set_dma_addr(unsigned int dmanr, unsigned int addr) |
92 | { | 91 | { |
93 | sparc_ebus_dmas[dmanr].addr = addr; | 92 | sparc_ebus_dmas[dmanr].addr = addr; |
94 | } | 93 | } |
95 | 94 | ||
96 | static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) | 95 | static inline void set_dma_count(unsigned int dmanr, unsigned int count) |
97 | { | 96 | { |
98 | sparc_ebus_dmas[dmanr].count = count; | 97 | sparc_ebus_dmas[dmanr].count = count; |
99 | } | 98 | } |
100 | 99 | ||
101 | static __inline__ unsigned int get_dma_residue(unsigned int dmanr) | 100 | static inline unsigned int get_dma_residue(unsigned int dmanr) |
102 | { | 101 | { |
103 | return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); | 102 | return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); |
104 | } | 103 | } |
diff --git a/include/asm-sparc64/posix_types.h b/include/asm-sparc64/posix_types.h index c86b9452c683..3426a65ecd35 100644 --- a/include/asm-sparc64/posix_types.h +++ b/include/asm-sparc64/posix_types.h | |||
@@ -53,7 +53,7 @@ typedef struct { | |||
53 | #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) | 53 | #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) |
54 | 54 | ||
55 | #undef __FD_SET | 55 | #undef __FD_SET |
56 | static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) | 56 | static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) |
57 | { | 57 | { |
58 | unsigned long _tmp = fd / __NFDBITS; | 58 | unsigned long _tmp = fd / __NFDBITS; |
59 | unsigned long _rem = fd % __NFDBITS; | 59 | unsigned long _rem = fd % __NFDBITS; |
@@ -61,7 +61,7 @@ static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) | |||
61 | } | 61 | } |
62 | 62 | ||
63 | #undef __FD_CLR | 63 | #undef __FD_CLR |
64 | static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) | 64 | static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) |
65 | { | 65 | { |
66 | unsigned long _tmp = fd / __NFDBITS; | 66 | unsigned long _tmp = fd / __NFDBITS; |
67 | unsigned long _rem = fd % __NFDBITS; | 67 | unsigned long _rem = fd % __NFDBITS; |
@@ -69,7 +69,7 @@ static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) | |||
69 | } | 69 | } |
70 | 70 | ||
71 | #undef __FD_ISSET | 71 | #undef __FD_ISSET |
72 | static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) | 72 | static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) |
73 | { | 73 | { |
74 | unsigned long _tmp = fd / __NFDBITS; | 74 | unsigned long _tmp = fd / __NFDBITS; |
75 | unsigned long _rem = fd % __NFDBITS; | 75 | unsigned long _rem = fd % __NFDBITS; |
@@ -81,7 +81,7 @@ static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) | |||
81 | * for 256 and 1024-bit fd_sets respectively) | 81 | * for 256 and 1024-bit fd_sets respectively) |
82 | */ | 82 | */ |
83 | #undef __FD_ZERO | 83 | #undef __FD_ZERO |
84 | static __inline__ void __FD_ZERO(__kernel_fd_set *p) | 84 | static inline void __FD_ZERO(__kernel_fd_set *p) |
85 | { | 85 | { |
86 | unsigned long *tmp = p->fds_bits; | 86 | unsigned long *tmp = p->fds_bits; |
87 | int i; | 87 | int i; |
diff --git a/include/asm-sparc64/sbus.h b/include/asm-sparc64/sbus.h index 0151cad486f3..24a04a55cf85 100644 --- a/include/asm-sparc64/sbus.h +++ b/include/asm-sparc64/sbus.h | |||
@@ -29,12 +29,12 @@ | |||
29 | * numbers + offsets, and vice versa. | 29 | * numbers + offsets, and vice versa. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | static __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset) | 32 | static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) |
33 | { | 33 | { |
34 | return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); | 34 | return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); |
35 | } | 35 | } |
36 | 36 | ||
37 | static __inline__ int sbus_dev_slot(unsigned long dev_addr) | 37 | static inline int sbus_dev_slot(unsigned long dev_addr) |
38 | { | 38 | { |
39 | return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); | 39 | return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); |
40 | } | 40 | } |
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h index cf7807813e85..63b7040e8134 100644 --- a/include/asm-sparc64/spitfire.h +++ b/include/asm-sparc64/spitfire.h | |||
@@ -1,7 +1,6 @@ | |||
1 | /* $Id: spitfire.h,v 1.18 2001/11/29 16:42:10 kanoj Exp $ | 1 | /* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations. |
2 | * spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations. | ||
3 | * | 2 | * |
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | 3 | * Copyright (C) 1996 David S. Miller (davem@davemloft.net) |
5 | */ | 4 | */ |
6 | 5 | ||
7 | #ifndef _SPARC64_SPITFIRE_H | 6 | #ifndef _SPARC64_SPITFIRE_H |
@@ -67,7 +66,7 @@ extern void cheetah_enable_pcache(void); | |||
67 | /* The data cache is write through, so this just invalidates the | 66 | /* The data cache is write through, so this just invalidates the |
68 | * specified line. | 67 | * specified line. |
69 | */ | 68 | */ |
70 | static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) | 69 | static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) |
71 | { | 70 | { |
72 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 71 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
73 | "membar #Sync" | 72 | "membar #Sync" |
@@ -81,7 +80,7 @@ static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long | |||
81 | * a flush instruction (to any address) is sufficient to handle | 80 | * a flush instruction (to any address) is sufficient to handle |
82 | * this issue after the line is invalidated. | 81 | * this issue after the line is invalidated. |
83 | */ | 82 | */ |
84 | static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) | 83 | static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) |
85 | { | 84 | { |
86 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 85 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
87 | "membar #Sync" | 86 | "membar #Sync" |
@@ -89,7 +88,7 @@ static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long | |||
89 | : "r" (tag), "r" (addr), "i" (ASI_IC_TAG)); | 88 | : "r" (tag), "r" (addr), "i" (ASI_IC_TAG)); |
90 | } | 89 | } |
91 | 90 | ||
92 | static __inline__ unsigned long spitfire_get_dtlb_data(int entry) | 91 | static inline unsigned long spitfire_get_dtlb_data(int entry) |
93 | { | 92 | { |
94 | unsigned long data; | 93 | unsigned long data; |
95 | 94 | ||
@@ -103,7 +102,7 @@ static __inline__ unsigned long spitfire_get_dtlb_data(int entry) | |||
103 | return data; | 102 | return data; |
104 | } | 103 | } |
105 | 104 | ||
106 | static __inline__ unsigned long spitfire_get_dtlb_tag(int entry) | 105 | static inline unsigned long spitfire_get_dtlb_tag(int entry) |
107 | { | 106 | { |
108 | unsigned long tag; | 107 | unsigned long tag; |
109 | 108 | ||
@@ -113,7 +112,7 @@ static __inline__ unsigned long spitfire_get_dtlb_tag(int entry) | |||
113 | return tag; | 112 | return tag; |
114 | } | 113 | } |
115 | 114 | ||
116 | static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data) | 115 | static inline void spitfire_put_dtlb_data(int entry, unsigned long data) |
117 | { | 116 | { |
118 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 117 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
119 | "membar #Sync" | 118 | "membar #Sync" |
@@ -122,7 +121,7 @@ static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data) | |||
122 | "i" (ASI_DTLB_DATA_ACCESS)); | 121 | "i" (ASI_DTLB_DATA_ACCESS)); |
123 | } | 122 | } |
124 | 123 | ||
125 | static __inline__ unsigned long spitfire_get_itlb_data(int entry) | 124 | static inline unsigned long spitfire_get_itlb_data(int entry) |
126 | { | 125 | { |
127 | unsigned long data; | 126 | unsigned long data; |
128 | 127 | ||
@@ -136,7 +135,7 @@ static __inline__ unsigned long spitfire_get_itlb_data(int entry) | |||
136 | return data; | 135 | return data; |
137 | } | 136 | } |
138 | 137 | ||
139 | static __inline__ unsigned long spitfire_get_itlb_tag(int entry) | 138 | static inline unsigned long spitfire_get_itlb_tag(int entry) |
140 | { | 139 | { |
141 | unsigned long tag; | 140 | unsigned long tag; |
142 | 141 | ||
@@ -146,7 +145,7 @@ static __inline__ unsigned long spitfire_get_itlb_tag(int entry) | |||
146 | return tag; | 145 | return tag; |
147 | } | 146 | } |
148 | 147 | ||
149 | static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) | 148 | static inline void spitfire_put_itlb_data(int entry, unsigned long data) |
150 | { | 149 | { |
151 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 150 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
152 | "membar #Sync" | 151 | "membar #Sync" |
@@ -155,7 +154,7 @@ static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) | |||
155 | "i" (ASI_ITLB_DATA_ACCESS)); | 154 | "i" (ASI_ITLB_DATA_ACCESS)); |
156 | } | 155 | } |
157 | 156 | ||
158 | static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page) | 157 | static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page) |
159 | { | 158 | { |
160 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" | 159 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" |
161 | "membar #Sync" | 160 | "membar #Sync" |
@@ -163,7 +162,7 @@ static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page) | |||
163 | : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP)); | 162 | : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP)); |
164 | } | 163 | } |
165 | 164 | ||
166 | static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page) | 165 | static inline void spitfire_flush_itlb_nucleus_page(unsigned long page) |
167 | { | 166 | { |
168 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" | 167 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" |
169 | "membar #Sync" | 168 | "membar #Sync" |
@@ -172,7 +171,7 @@ static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page) | |||
172 | } | 171 | } |
173 | 172 | ||
174 | /* Cheetah has "all non-locked" tlb flushes. */ | 173 | /* Cheetah has "all non-locked" tlb flushes. */ |
175 | static __inline__ void cheetah_flush_dtlb_all(void) | 174 | static inline void cheetah_flush_dtlb_all(void) |
176 | { | 175 | { |
177 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" | 176 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" |
178 | "membar #Sync" | 177 | "membar #Sync" |
@@ -180,7 +179,7 @@ static __inline__ void cheetah_flush_dtlb_all(void) | |||
180 | : "r" (0x80), "i" (ASI_DMMU_DEMAP)); | 179 | : "r" (0x80), "i" (ASI_DMMU_DEMAP)); |
181 | } | 180 | } |
182 | 181 | ||
183 | static __inline__ void cheetah_flush_itlb_all(void) | 182 | static inline void cheetah_flush_itlb_all(void) |
184 | { | 183 | { |
185 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" | 184 | __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" |
186 | "membar #Sync" | 185 | "membar #Sync" |
@@ -202,7 +201,7 @@ static __inline__ void cheetah_flush_itlb_all(void) | |||
202 | * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes | 201 | * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes |
203 | * the problem for me. -DaveM | 202 | * the problem for me. -DaveM |
204 | */ | 203 | */ |
205 | static __inline__ unsigned long cheetah_get_ldtlb_data(int entry) | 204 | static inline unsigned long cheetah_get_ldtlb_data(int entry) |
206 | { | 205 | { |
207 | unsigned long data; | 206 | unsigned long data; |
208 | 207 | ||
@@ -215,7 +214,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_data(int entry) | |||
215 | return data; | 214 | return data; |
216 | } | 215 | } |
217 | 216 | ||
218 | static __inline__ unsigned long cheetah_get_litlb_data(int entry) | 217 | static inline unsigned long cheetah_get_litlb_data(int entry) |
219 | { | 218 | { |
220 | unsigned long data; | 219 | unsigned long data; |
221 | 220 | ||
@@ -228,7 +227,7 @@ static __inline__ unsigned long cheetah_get_litlb_data(int entry) | |||
228 | return data; | 227 | return data; |
229 | } | 228 | } |
230 | 229 | ||
231 | static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry) | 230 | static inline unsigned long cheetah_get_ldtlb_tag(int entry) |
232 | { | 231 | { |
233 | unsigned long tag; | 232 | unsigned long tag; |
234 | 233 | ||
@@ -240,7 +239,7 @@ static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry) | |||
240 | return tag; | 239 | return tag; |
241 | } | 240 | } |
242 | 241 | ||
243 | static __inline__ unsigned long cheetah_get_litlb_tag(int entry) | 242 | static inline unsigned long cheetah_get_litlb_tag(int entry) |
244 | { | 243 | { |
245 | unsigned long tag; | 244 | unsigned long tag; |
246 | 245 | ||
@@ -252,7 +251,7 @@ static __inline__ unsigned long cheetah_get_litlb_tag(int entry) | |||
252 | return tag; | 251 | return tag; |
253 | } | 252 | } |
254 | 253 | ||
255 | static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data) | 254 | static inline void cheetah_put_ldtlb_data(int entry, unsigned long data) |
256 | { | 255 | { |
257 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 256 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
258 | "membar #Sync" | 257 | "membar #Sync" |
@@ -262,7 +261,7 @@ static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data) | |||
262 | "i" (ASI_DTLB_DATA_ACCESS)); | 261 | "i" (ASI_DTLB_DATA_ACCESS)); |
263 | } | 262 | } |
264 | 263 | ||
265 | static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data) | 264 | static inline void cheetah_put_litlb_data(int entry, unsigned long data) |
266 | { | 265 | { |
267 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 266 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
268 | "membar #Sync" | 267 | "membar #Sync" |
@@ -272,7 +271,7 @@ static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data) | |||
272 | "i" (ASI_ITLB_DATA_ACCESS)); | 271 | "i" (ASI_ITLB_DATA_ACCESS)); |
273 | } | 272 | } |
274 | 273 | ||
275 | static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb) | 274 | static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb) |
276 | { | 275 | { |
277 | unsigned long data; | 276 | unsigned long data; |
278 | 277 | ||
@@ -284,7 +283,7 @@ static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb) | |||
284 | return data; | 283 | return data; |
285 | } | 284 | } |
286 | 285 | ||
287 | static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb) | 286 | static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb) |
288 | { | 287 | { |
289 | unsigned long tag; | 288 | unsigned long tag; |
290 | 289 | ||
@@ -294,7 +293,7 @@ static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb) | |||
294 | return tag; | 293 | return tag; |
295 | } | 294 | } |
296 | 295 | ||
297 | static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb) | 296 | static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb) |
298 | { | 297 | { |
299 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 298 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
300 | "membar #Sync" | 299 | "membar #Sync" |
@@ -304,7 +303,7 @@ static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int | |||
304 | "i" (ASI_DTLB_DATA_ACCESS)); | 303 | "i" (ASI_DTLB_DATA_ACCESS)); |
305 | } | 304 | } |
306 | 305 | ||
307 | static __inline__ unsigned long cheetah_get_itlb_data(int entry) | 306 | static inline unsigned long cheetah_get_itlb_data(int entry) |
308 | { | 307 | { |
309 | unsigned long data; | 308 | unsigned long data; |
310 | 309 | ||
@@ -317,7 +316,7 @@ static __inline__ unsigned long cheetah_get_itlb_data(int entry) | |||
317 | return data; | 316 | return data; |
318 | } | 317 | } |
319 | 318 | ||
320 | static __inline__ unsigned long cheetah_get_itlb_tag(int entry) | 319 | static inline unsigned long cheetah_get_itlb_tag(int entry) |
321 | { | 320 | { |
322 | unsigned long tag; | 321 | unsigned long tag; |
323 | 322 | ||
@@ -327,7 +326,7 @@ static __inline__ unsigned long cheetah_get_itlb_tag(int entry) | |||
327 | return tag; | 326 | return tag; |
328 | } | 327 | } |
329 | 328 | ||
330 | static __inline__ void cheetah_put_itlb_data(int entry, unsigned long data) | 329 | static inline void cheetah_put_itlb_data(int entry, unsigned long data) |
331 | { | 330 | { |
332 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" | 331 | __asm__ __volatile__("stxa %0, [%1] %2\n\t" |
333 | "membar #Sync" | 332 | "membar #Sync" |
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index 3f175fa7e6d2..159e62b51d70 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h | |||
@@ -1,4 +1,3 @@ | |||
1 | /* $Id: system.h,v 1.69 2002/02/09 19:49:31 davem Exp $ */ | ||
2 | #ifndef __SPARC64_SYSTEM_H | 1 | #ifndef __SPARC64_SYSTEM_H |
3 | #define __SPARC64_SYSTEM_H | 2 | #define __SPARC64_SYSTEM_H |
4 | 3 | ||
@@ -240,7 +239,7 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long | |||
240 | 239 | ||
241 | extern void __xchg_called_with_bad_pointer(void); | 240 | extern void __xchg_called_with_bad_pointer(void); |
242 | 241 | ||
243 | static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr, | 242 | static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, |
244 | int size) | 243 | int size) |
245 | { | 244 | { |
246 | switch (size) { | 245 | switch (size) { |
@@ -263,7 +262,7 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret | |||
263 | 262 | ||
264 | #define __HAVE_ARCH_CMPXCHG 1 | 263 | #define __HAVE_ARCH_CMPXCHG 1 |
265 | 264 | ||
266 | static __inline__ unsigned long | 265 | static inline unsigned long |
267 | __cmpxchg_u32(volatile int *m, int old, int new) | 266 | __cmpxchg_u32(volatile int *m, int old, int new) |
268 | { | 267 | { |
269 | __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" | 268 | __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" |
@@ -276,7 +275,7 @@ __cmpxchg_u32(volatile int *m, int old, int new) | |||
276 | return new; | 275 | return new; |
277 | } | 276 | } |
278 | 277 | ||
279 | static __inline__ unsigned long | 278 | static inline unsigned long |
280 | __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) | 279 | __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) |
281 | { | 280 | { |
282 | __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" | 281 | __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" |
@@ -293,7 +292,7 @@ __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) | |||
293 | if something tries to do an invalid cmpxchg(). */ | 292 | if something tries to do an invalid cmpxchg(). */ |
294 | extern void __cmpxchg_called_with_bad_pointer(void); | 293 | extern void __cmpxchg_called_with_bad_pointer(void); |
295 | 294 | ||
296 | static __inline__ unsigned long | 295 | static inline unsigned long |
297 | __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) | 296 | __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) |
298 | { | 297 | { |
299 | switch (size) { | 298 | switch (size) { |
diff --git a/include/asm-sparc64/upa.h b/include/asm-sparc64/upa.h index 7ae09a22e408..5b1633223f92 100644 --- a/include/asm-sparc64/upa.h +++ b/include/asm-sparc64/upa.h | |||
@@ -1,4 +1,3 @@ | |||
1 | /* $Id: upa.h,v 1.3 1999/09/21 14:39:47 davem Exp $ */ | ||
2 | #ifndef _SPARC64_UPA_H | 1 | #ifndef _SPARC64_UPA_H |
3 | #define _SPARC64_UPA_H | 2 | #define _SPARC64_UPA_H |
4 | 3 | ||
@@ -25,7 +24,7 @@ | |||
25 | 24 | ||
26 | /* UPA I/O space accessors */ | 25 | /* UPA I/O space accessors */ |
27 | #if defined(__KERNEL__) && !defined(__ASSEMBLY__) | 26 | #if defined(__KERNEL__) && !defined(__ASSEMBLY__) |
28 | static __inline__ unsigned char _upa_readb(unsigned long addr) | 27 | static inline unsigned char _upa_readb(unsigned long addr) |
29 | { | 28 | { |
30 | unsigned char ret; | 29 | unsigned char ret; |
31 | 30 | ||
@@ -36,7 +35,7 @@ static __inline__ unsigned char _upa_readb(unsigned long addr) | |||
36 | return ret; | 35 | return ret; |
37 | } | 36 | } |
38 | 37 | ||
39 | static __inline__ unsigned short _upa_readw(unsigned long addr) | 38 | static inline unsigned short _upa_readw(unsigned long addr) |
40 | { | 39 | { |
41 | unsigned short ret; | 40 | unsigned short ret; |
42 | 41 | ||
@@ -47,7 +46,7 @@ static __inline__ unsigned short _upa_readw(unsigned long addr) | |||
47 | return ret; | 46 | return ret; |
48 | } | 47 | } |
49 | 48 | ||
50 | static __inline__ unsigned int _upa_readl(unsigned long addr) | 49 | static inline unsigned int _upa_readl(unsigned long addr) |
51 | { | 50 | { |
52 | unsigned int ret; | 51 | unsigned int ret; |
53 | 52 | ||
@@ -58,7 +57,7 @@ static __inline__ unsigned int _upa_readl(unsigned long addr) | |||
58 | return ret; | 57 | return ret; |
59 | } | 58 | } |
60 | 59 | ||
61 | static __inline__ unsigned long _upa_readq(unsigned long addr) | 60 | static inline unsigned long _upa_readq(unsigned long addr) |
62 | { | 61 | { |
63 | unsigned long ret; | 62 | unsigned long ret; |
64 | 63 | ||
@@ -69,28 +68,28 @@ static __inline__ unsigned long _upa_readq(unsigned long addr) | |||
69 | return ret; | 68 | return ret; |
70 | } | 69 | } |
71 | 70 | ||
72 | static __inline__ void _upa_writeb(unsigned char b, unsigned long addr) | 71 | static inline void _upa_writeb(unsigned char b, unsigned long addr) |
73 | { | 72 | { |
74 | __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */" | 73 | __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */" |
75 | : /* no outputs */ | 74 | : /* no outputs */ |
76 | : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 75 | : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
77 | } | 76 | } |
78 | 77 | ||
79 | static __inline__ void _upa_writew(unsigned short w, unsigned long addr) | 78 | static inline void _upa_writew(unsigned short w, unsigned long addr) |
80 | { | 79 | { |
81 | __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */" | 80 | __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */" |
82 | : /* no outputs */ | 81 | : /* no outputs */ |
83 | : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 82 | : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
84 | } | 83 | } |
85 | 84 | ||
86 | static __inline__ void _upa_writel(unsigned int l, unsigned long addr) | 85 | static inline void _upa_writel(unsigned int l, unsigned long addr) |
87 | { | 86 | { |
88 | __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */" | 87 | __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */" |
89 | : /* no outputs */ | 88 | : /* no outputs */ |
90 | : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 89 | : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
91 | } | 90 | } |
92 | 91 | ||
93 | static __inline__ void _upa_writeq(unsigned long q, unsigned long addr) | 92 | static inline void _upa_writeq(unsigned long q, unsigned long addr) |
94 | { | 93 | { |
95 | __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */" | 94 | __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */" |
96 | : /* no outputs */ | 95 | : /* no outputs */ |
diff --git a/include/asm-sparc64/visasm.h b/include/asm-sparc64/visasm.h index a74078551e0f..34f2ec64933b 100644 --- a/include/asm-sparc64/visasm.h +++ b/include/asm-sparc64/visasm.h | |||
@@ -1,4 +1,3 @@ | |||
1 | /* $Id: visasm.h,v 1.5 2001/04/24 01:09:12 davem Exp $ */ | ||
2 | #ifndef _SPARC64_VISASM_H | 1 | #ifndef _SPARC64_VISASM_H |
3 | #define _SPARC64_VISASM_H | 2 | #define _SPARC64_VISASM_H |
4 | 3 | ||
@@ -44,7 +43,7 @@ | |||
44 | wr %o5, 0, %fprs; | 43 | wr %o5, 0, %fprs; |
45 | 44 | ||
46 | #ifndef __ASSEMBLY__ | 45 | #ifndef __ASSEMBLY__ |
47 | static __inline__ void save_and_clear_fpu(void) { | 46 | static inline void save_and_clear_fpu(void) { |
48 | __asm__ __volatile__ ( | 47 | __asm__ __volatile__ ( |
49 | " rd %%fprs, %%o5\n" | 48 | " rd %%fprs, %%o5\n" |
50 | " andcc %%o5, %0, %%g0\n" | 49 | " andcc %%o5, %0, %%g0\n" |