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authorDave Airlie <airlied@starflyer.(none)>2005-07-07 06:08:27 -0400
committerDave Airlie <airlied@linux.ie>2005-07-07 06:08:27 -0400
commit717cb906bd43a9ac00631d600adda5c6546843a6 (patch)
treef41b250e9e0fa1e664f002fa9c4608d94527f2f2 /include/asm-sparc64
parent22f579c621e2f264e6d093b07d75f99bc97d5df2 (diff)
parentc101f3136cc98a003d0d16be6fab7d0d950581a6 (diff)
Merge ../linux-2.6/
Diffstat (limited to 'include/asm-sparc64')
-rw-r--r--include/asm-sparc64/irq.h49
-rw-r--r--include/asm-sparc64/parport.h4
-rw-r--r--include/asm-sparc64/pbm.h3
-rw-r--r--include/asm-sparc64/pci.h19
-rw-r--r--include/asm-sparc64/signal.h15
5 files changed, 44 insertions, 46 deletions
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index 018e2e46082b..8b70edcb80dc 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -16,6 +16,18 @@
16#include <asm/pil.h> 16#include <asm/pil.h>
17#include <asm/ptrace.h> 17#include <asm/ptrace.h>
18 18
19struct ino_bucket;
20
21#define MAX_IRQ_DESC_ACTION 4
22
23struct irq_desc {
24 void (*pre_handler)(struct ino_bucket *, void *, void *);
25 void *pre_handler_arg1;
26 void *pre_handler_arg2;
27 u32 action_active_mask;
28 struct irqaction action[MAX_IRQ_DESC_ACTION];
29};
30
19/* You should not mess with this directly. That's the job of irq.c. 31/* You should not mess with this directly. That's the job of irq.c.
20 * 32 *
21 * If you make changes here, please update hand coded assembler of 33 * If you make changes here, please update hand coded assembler of
@@ -42,24 +54,11 @@ struct ino_bucket {
42 /* Miscellaneous flags. */ 54 /* Miscellaneous flags. */
43/*0x06*/unsigned char flags; 55/*0x06*/unsigned char flags;
44 56
45 /* This is used to deal with IBF_DMA_SYNC on 57 /* Currently unused. */
46 * Sabre systems. 58/*0x07*/unsigned char __pad;
47 */ 59
48/*0x07*/unsigned char synctab_ent; 60 /* Reference to IRQ descriptor for this bucket. */
49 61/*0x08*/struct irq_desc *irq_info;
50 /* Reference to handler for this IRQ. If this is
51 * non-NULL this means it is active and should be
52 * serviced. Else the pending member is set to one
53 * and later registry of the interrupt checks for
54 * this condition.
55 *
56 * Normally this is just an irq_action structure.
57 * But, on PCI, if multiple interrupt sources behind
58 * a bridge have multiple interrupt sources that share
59 * the same INO bucket, this points to an array of
60 * pointers to four IRQ action structures.
61 */
62/*0x08*/void *irq_info;
63 62
64 /* Sun5 Interrupt Clear Register. */ 63 /* Sun5 Interrupt Clear Register. */
65/*0x10*/unsigned long iclr; 64/*0x10*/unsigned long iclr;
@@ -69,12 +68,6 @@ struct ino_bucket {
69 68
70}; 69};
71 70
72#ifdef CONFIG_PCI
73extern unsigned long pci_dma_wsync;
74extern unsigned long dma_sync_reg_table[256];
75extern unsigned char dma_sync_reg_table_entry;
76#endif
77
78/* IMAP/ICLR register defines */ 71/* IMAP/ICLR register defines */
79#define IMAP_VALID 0x80000000 /* IRQ Enabled */ 72#define IMAP_VALID 0x80000000 /* IRQ Enabled */
80#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ 73#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */
@@ -90,11 +83,9 @@ extern unsigned char dma_sync_reg_table_entry;
90#define ICLR_PENDING 0x00000003 /* Pending state */ 83#define ICLR_PENDING 0x00000003 /* Pending state */
91 84
92/* Only 8-bits are available, be careful. -DaveM */ 85/* Only 8-bits are available, be careful. -DaveM */
93#define IBF_DMA_SYNC 0x01 /* DMA synchronization behind PCI bridge needed. */ 86#define IBF_PCI 0x02 /* PSYCHO/SABRE/SCHIZO PCI interrupt. */
94#define IBF_PCI 0x02 /* Indicates PSYCHO/SABRE/SCHIZO PCI interrupt. */ 87#define IBF_ACTIVE 0x04 /* Interrupt is active and has a handler.*/
95#define IBF_ACTIVE 0x04 /* This interrupt is active and has a handler. */ 88#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */
96#define IBF_MULTI 0x08 /* On PCI, indicates shared bucket. */
97#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */
98 89
99#define NUM_IVECS (IMAP_INR + 1) 90#define NUM_IVECS (IMAP_INR + 1)
100extern struct ino_bucket ivector_table[NUM_IVECS]; 91extern struct ino_bucket ivector_table[NUM_IVECS];
diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h
index b7e635544cec..56b5197d7898 100644
--- a/include/asm-sparc64/parport.h
+++ b/include/asm-sparc64/parport.h
@@ -27,12 +27,12 @@ static struct sparc_ebus_info {
27 27
28static __inline__ void enable_dma(unsigned int dmanr) 28static __inline__ void enable_dma(unsigned int dmanr)
29{ 29{
30 ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
31
30 if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info, 32 if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info,
31 sparc_ebus_dmas[dmanr].addr, 33 sparc_ebus_dmas[dmanr].addr,
32 sparc_ebus_dmas[dmanr].count)) 34 sparc_ebus_dmas[dmanr].count))
33 BUG(); 35 BUG();
34
35 ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
36} 36}
37 37
38static __inline__ void disable_dma(unsigned int dmanr) 38static __inline__ void disable_dma(unsigned int dmanr)
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h
index 4c15610a2bac..38bbbccb4068 100644
--- a/include/asm-sparc64/pbm.h
+++ b/include/asm-sparc64/pbm.h
@@ -145,6 +145,9 @@ struct pci_pbm_info {
145 /* Physical address base of PBM registers. */ 145 /* Physical address base of PBM registers. */
146 unsigned long pbm_regs; 146 unsigned long pbm_regs;
147 147
148 /* Physical address of DMA sync register, if any. */
149 unsigned long sync_reg;
150
148 /* Opaque 32-bit system bus Port ID. */ 151 /* Opaque 32-bit system bus Port ID. */
149 u32 portid; 152 u32 portid;
150 153
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h
index 2a0c85cd1c11..84e41c1ef3f8 100644
--- a/include/asm-sparc64/pci.h
+++ b/include/asm-sparc64/pci.h
@@ -220,6 +220,25 @@ static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
220 return (dma_addr == PCI_DMA_ERROR_CODE); 220 return (dma_addr == PCI_DMA_ERROR_CODE);
221} 221}
222 222
223#ifdef CONFIG_PCI
224static inline void pci_dma_burst_advice(struct pci_dev *pdev,
225 enum pci_dma_burst_strategy *strat,
226 unsigned long *strategy_parameter)
227{
228 unsigned long cacheline_size;
229 u8 byte;
230
231 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
232 if (byte == 0)
233 cacheline_size = 1024;
234 else
235 cacheline_size = (int) byte * 4;
236
237 *strat = PCI_DMA_BURST_BOUNDARY;
238 *strategy_parameter = cacheline_size;
239}
240#endif
241
223/* Return the index of the PCI controller for device PDEV. */ 242/* Return the index of the PCI controller for device PDEV. */
224 243
225extern int pci_domain_nr(struct pci_bus *bus); 244extern int pci_domain_nr(struct pci_bus *bus);
diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h
index becdf1bc5924..e3059bb4a465 100644
--- a/include/asm-sparc64/signal.h
+++ b/include/asm-sparc64/signal.h
@@ -162,21 +162,6 @@ struct sigstack {
162#define MINSIGSTKSZ 4096 162#define MINSIGSTKSZ 4096
163#define SIGSTKSZ 16384 163#define SIGSTKSZ 16384
164 164
165#ifdef __KERNEL__
166/*
167 * DJHR
168 * SA_STATIC_ALLOC is used for the SPARC system to indicate that this
169 * interrupt handler's irq structure should be statically allocated
170 * by the request_irq routine.
171 * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge
172 * of interrupt usage and that sucks. Also without a flag like this
173 * it may be possible for the free_irq routine to attempt to free
174 * statically allocated data.. which is NOT GOOD.
175 *
176 */
177#define SA_STATIC_ALLOC 0x80
178#endif
179
180#include <asm-generic/signal.h> 165#include <asm-generic/signal.h>
181 166
182struct __new_sigaction { 167struct __new_sigaction {