[SPARC64]: Fix some SUN4V TLB miss bugs.

Code patching did not sign extend negative branch
offsets correctly.

Kernel TLB miss path needs patching and %g4 register
preservation in order to handle SUN4V correctly.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 5 insertions, 5 deletions

diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h
index 6bb86a7a5b42..9e28b240f3aa 100644
--- a/include/asm-sparc64/ttable.h
+++ b/include/asm-sparc64/ttable.h
@@ -186,19 +186,19 @@
         ldx     [%g2 + HV_FAULT_I_CTX_OFFSET], %g5;     \
         srlx    %g4, 22, %g7;                           \
         sllx    %g5, 48, %g6;                           \
-        brz,pn  %g5, kvmap_itlb_4v;                     \
+        ba,pt   %xcc, sun4v_itsb_miss;                  \
          or     %g6, %g7, %g6;                          \
-        ba,a,pt %xcc, sun4v_itsb_miss;
+        nop;
 
-#define SUN4V_DTSB_MISS                         \
+#define SUN4V_DTSB_MISS                                 \
         ldxa    [%g0] ASI_SCRATCHPAD, %g2;              \
         ldx     [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4;    \
         ldx     [%g2 + HV_FAULT_D_CTX_OFFSET], %g5;     \
         srlx    %g4, 22, %g7;                           \
         sllx    %g5, 48, %g6;                           \
-        brz,pn  %g5, kvmap_dtlb_4v;                     \
+        ba,pt   %xcc, sun4v_dtsb_miss;                  \
          or     %g6, %g7, %g6;                          \
-        ba,a,pt %xcc, sun4v_dtsb_miss;
+        nop;
 
 /* Before touching these macros, you owe it to yourself to go and
  * see how arch/sparc64/kernel/winfixup.S works... -DaveM