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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-04 03:10:01 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:11:36 -0500
commit314ef6859750b6539eac48d78059bb7986f29cb1 (patch)
tree26c7da386349c1cf377225356e1012ae62da6f07 /include/asm-sparc64/ttable.h
parentffe483d55229fadbaf4cc7316d47024a24ecd1a2 (diff)
[SPARC64]: Refine register window trap handling.
When saving and restoing trap state, do the window spill/fill handling inline so that we never trap deeper than 2 trap levels. This is important for chips like Niagara. The window fixup code is massively simplified, and many more improvements are now possible. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/ttable.h')
-rw-r--r--include/asm-sparc64/ttable.h234
1 files changed, 233 insertions, 1 deletions
diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h
index f557db4faf84..f912f52c0c7f 100644
--- a/include/asm-sparc64/ttable.h
+++ b/include/asm-sparc64/ttable.h
@@ -93,7 +93,7 @@
93 93
94#define SYSCALL_TRAP(routine, systbl) \ 94#define SYSCALL_TRAP(routine, systbl) \
95 sethi %hi(109f), %g7; \ 95 sethi %hi(109f), %g7; \
96 ba,pt %xcc, scetrap; \ 96 ba,pt %xcc, etrap; \
97109: or %g7, %lo(109b), %g7; \ 97109: or %g7, %lo(109b), %g7; \
98 sethi %hi(systbl), %l7; \ 98 sethi %hi(systbl), %l7; \
99 ba,pt %xcc, routine; \ 99 ba,pt %xcc, routine; \
@@ -219,6 +219,31 @@
219 saved; retry; nop; nop; nop; nop; nop; nop; \ 219 saved; retry; nop; nop; nop; nop; nop; nop; \
220 nop; nop; nop; nop; nop; nop; nop; nop; 220 nop; nop; nop; nop; nop; nop; nop; nop;
221 221
222#define SPILL_0_NORMAL_ETRAP \
223etrap_kernel_spill: \
224 stx %l0, [%sp + STACK_BIAS + 0x00]; \
225 stx %l1, [%sp + STACK_BIAS + 0x08]; \
226 stx %l2, [%sp + STACK_BIAS + 0x10]; \
227 stx %l3, [%sp + STACK_BIAS + 0x18]; \
228 stx %l4, [%sp + STACK_BIAS + 0x20]; \
229 stx %l5, [%sp + STACK_BIAS + 0x28]; \
230 stx %l6, [%sp + STACK_BIAS + 0x30]; \
231 stx %l7, [%sp + STACK_BIAS + 0x38]; \
232 stx %i0, [%sp + STACK_BIAS + 0x40]; \
233 stx %i1, [%sp + STACK_BIAS + 0x48]; \
234 stx %i2, [%sp + STACK_BIAS + 0x50]; \
235 stx %i3, [%sp + STACK_BIAS + 0x58]; \
236 stx %i4, [%sp + STACK_BIAS + 0x60]; \
237 stx %i5, [%sp + STACK_BIAS + 0x68]; \
238 stx %i6, [%sp + STACK_BIAS + 0x70]; \
239 stx %i7, [%sp + STACK_BIAS + 0x78]; \
240 saved; \
241 sub %g1, 2, %g1; \
242 ba,pt %xcc, etrap_save; \
243 wrpr %g1, %cwp; \
244 nop; nop; nop; nop; nop; nop; nop; nop; \
245 nop; nop; nop; nop;
246
222/* Normal 64bit spill */ 247/* Normal 64bit spill */
223#define SPILL_1_GENERIC(ASI) \ 248#define SPILL_1_GENERIC(ASI) \
224 add %sp, STACK_BIAS + 0x00, %g1; \ 249 add %sp, STACK_BIAS + 0x00, %g1; \
@@ -252,6 +277,67 @@
252 b,a,pt %xcc, spill_fixup_mna; \ 277 b,a,pt %xcc, spill_fixup_mna; \
253 b,a,pt %xcc, spill_fixup; 278 b,a,pt %xcc, spill_fixup;
254 279
280#define SPILL_1_GENERIC_ETRAP \
281etrap_user_spill_64bit: \
282 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
283 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
284 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
285 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
286 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
287 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
288 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
289 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
290 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
291 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
292 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
293 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
294 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
295 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
296 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
297 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
298 saved; \
299 sub %g1, 2, %g1; \
300 ba,pt %xcc, etrap_save; \
301 wrpr %g1, %cwp; \
302 nop; nop; nop; nop; nop; \
303 nop; nop; nop; nop; \
304 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
305 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
306 ba,a,pt %xcc, etrap_spill_fixup_64bit;
307
308#define SPILL_1_GENERIC_ETRAP_FIXUP \
309etrap_spill_fixup_64bit: \
310 ldub [%g6 + TI_WSAVED], %g1; \
311 sll %g1, 3, %g3; \
312 add %g6, %g3, %g3; \
313 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
314 sll %g1, 7, %g3; \
315 add %g6, %g3, %g3; \
316 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
317 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
318 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
319 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
320 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
321 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
322 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
323 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
324 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
325 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
326 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
327 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
328 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
329 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
330 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
331 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
332 add %g1, 1, %g1; \
333 stb %g1, [%g6 + TI_WSAVED]; \
334 saved; \
335 rdpr %cwp, %g1; \
336 sub %g1, 2, %g1; \
337 ba,pt %xcc, etrap_save; \
338 wrpr %g1, %cwp; \
339 nop; nop; nop
340
255/* Normal 32bit spill */ 341/* Normal 32bit spill */
256#define SPILL_2_GENERIC(ASI) \ 342#define SPILL_2_GENERIC(ASI) \
257 srl %sp, 0, %sp; \ 343 srl %sp, 0, %sp; \
@@ -285,6 +371,68 @@
285 b,a,pt %xcc, spill_fixup_mna; \ 371 b,a,pt %xcc, spill_fixup_mna; \
286 b,a,pt %xcc, spill_fixup; 372 b,a,pt %xcc, spill_fixup;
287 373
374#define SPILL_2_GENERIC_ETRAP \
375etrap_user_spill_32bit: \
376 srl %sp, 0, %sp; \
377 stwa %l0, [%sp + 0x00] %asi; \
378 stwa %l1, [%sp + 0x04] %asi; \
379 stwa %l2, [%sp + 0x08] %asi; \
380 stwa %l3, [%sp + 0x0c] %asi; \
381 stwa %l4, [%sp + 0x10] %asi; \
382 stwa %l5, [%sp + 0x14] %asi; \
383 stwa %l6, [%sp + 0x18] %asi; \
384 stwa %l7, [%sp + 0x1c] %asi; \
385 stwa %i0, [%sp + 0x20] %asi; \
386 stwa %i1, [%sp + 0x24] %asi; \
387 stwa %i2, [%sp + 0x28] %asi; \
388 stwa %i3, [%sp + 0x2c] %asi; \
389 stwa %i4, [%sp + 0x30] %asi; \
390 stwa %i5, [%sp + 0x34] %asi; \
391 stwa %i6, [%sp + 0x38] %asi; \
392 stwa %i7, [%sp + 0x3c] %asi; \
393 saved; \
394 sub %g1, 2, %g1; \
395 ba,pt %xcc, etrap_save; \
396 wrpr %g1, %cwp; \
397 nop; nop; nop; nop; \
398 nop; nop; nop; nop; \
399 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
400 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
401 ba,a,pt %xcc, etrap_spill_fixup_32bit;
402
403#define SPILL_2_GENERIC_ETRAP_FIXUP \
404etrap_spill_fixup_32bit: \
405 ldub [%g6 + TI_WSAVED], %g1; \
406 sll %g1, 3, %g3; \
407 add %g6, %g3, %g3; \
408 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
409 sll %g1, 7, %g3; \
410 add %g6, %g3, %g3; \
411 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
412 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
413 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
414 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
415 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
416 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
417 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
418 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
419 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
420 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
421 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
422 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
423 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
424 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
425 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
426 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
427 add %g1, 1, %g1; \
428 stb %g1, [%g6 + TI_WSAVED]; \
429 saved; \
430 rdpr %cwp, %g1; \
431 sub %g1, 2, %g1; \
432 ba,pt %xcc, etrap_save; \
433 wrpr %g1, %cwp; \
434 nop; nop; nop
435
288#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP) 436#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
289#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP) 437#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
290#define SPILL_3_NORMAL SPILL_0_NORMAL 438#define SPILL_3_NORMAL SPILL_0_NORMAL
@@ -323,6 +471,35 @@
323 restored; retry; nop; nop; nop; nop; nop; nop; \ 471 restored; retry; nop; nop; nop; nop; nop; nop; \
324 nop; nop; nop; nop; nop; nop; nop; nop; 472 nop; nop; nop; nop; nop; nop; nop; nop;
325 473
474#define FILL_0_NORMAL_RTRAP \
475kern_rtt_fill: \
476 rdpr %cwp, %g1; \
477 sub %g1, 1, %g1; \
478 wrpr %g1, %cwp; \
479 ldx [%sp + STACK_BIAS + 0x00], %l0; \
480 ldx [%sp + STACK_BIAS + 0x08], %l1; \
481 ldx [%sp + STACK_BIAS + 0x10], %l2; \
482 ldx [%sp + STACK_BIAS + 0x18], %l3; \
483 ldx [%sp + STACK_BIAS + 0x20], %l4; \
484 ldx [%sp + STACK_BIAS + 0x28], %l5; \
485 ldx [%sp + STACK_BIAS + 0x30], %l6; \
486 ldx [%sp + STACK_BIAS + 0x38], %l7; \
487 ldx [%sp + STACK_BIAS + 0x40], %i0; \
488 ldx [%sp + STACK_BIAS + 0x48], %i1; \
489 ldx [%sp + STACK_BIAS + 0x50], %i2; \
490 ldx [%sp + STACK_BIAS + 0x58], %i3; \
491 ldx [%sp + STACK_BIAS + 0x60], %i4; \
492 ldx [%sp + STACK_BIAS + 0x68], %i5; \
493 ldx [%sp + STACK_BIAS + 0x70], %i6; \
494 ldx [%sp + STACK_BIAS + 0x78], %i7; \
495 restored; \
496 add %g1, 1, %g1; \
497 ba,pt %xcc, kern_rtt_restore; \
498 wrpr %g1, %cwp; \
499 nop; nop; nop; nop; nop; \
500 nop; nop; nop; nop;
501
502
326/* Normal 64bit fill */ 503/* Normal 64bit fill */
327#define FILL_1_GENERIC(ASI) \ 504#define FILL_1_GENERIC(ASI) \
328 add %sp, STACK_BIAS + 0x00, %g1; \ 505 add %sp, STACK_BIAS + 0x00, %g1; \
@@ -354,6 +531,33 @@
354 b,a,pt %xcc, fill_fixup_mna; \ 531 b,a,pt %xcc, fill_fixup_mna; \
355 b,a,pt %xcc, fill_fixup; 532 b,a,pt %xcc, fill_fixup;
356 533
534#define FILL_1_GENERIC_RTRAP \
535user_rtt_fill_64bit: \
536 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
537 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
538 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
539 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
540 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
541 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
542 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
543 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
544 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
545 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
546 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
547 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
548 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
549 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
550 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
551 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
552 ba,pt %xcc, user_rtt_pre_restore; \
553 restored; \
554 nop; nop; nop; nop; nop; nop; \
555 nop; nop; nop; nop; nop; \
556 ba,a,pt %xcc, user_rtt_fill_fixup; \
557 ba,a,pt %xcc, user_rtt_fill_fixup; \
558 ba,a,pt %xcc, user_rtt_fill_fixup;
559
560
357/* Normal 32bit fill */ 561/* Normal 32bit fill */
358#define FILL_2_GENERIC(ASI) \ 562#define FILL_2_GENERIC(ASI) \
359 srl %sp, 0, %sp; \ 563 srl %sp, 0, %sp; \
@@ -385,6 +589,34 @@
385 b,a,pt %xcc, fill_fixup_mna; \ 589 b,a,pt %xcc, fill_fixup_mna; \
386 b,a,pt %xcc, fill_fixup; 590 b,a,pt %xcc, fill_fixup;
387 591
592#define FILL_2_GENERIC_RTRAP \
593user_rtt_fill_32bit: \
594 srl %sp, 0, %sp; \
595 lduwa [%sp + 0x00] %asi, %l0; \
596 lduwa [%sp + 0x04] %asi, %l1; \
597 lduwa [%sp + 0x08] %asi, %l2; \
598 lduwa [%sp + 0x0c] %asi, %l3; \
599 lduwa [%sp + 0x10] %asi, %l4; \
600 lduwa [%sp + 0x14] %asi, %l5; \
601 lduwa [%sp + 0x18] %asi, %l6; \
602 lduwa [%sp + 0x1c] %asi, %l7; \
603 lduwa [%sp + 0x20] %asi, %i0; \
604 lduwa [%sp + 0x24] %asi, %i1; \
605 lduwa [%sp + 0x28] %asi, %i2; \
606 lduwa [%sp + 0x2c] %asi, %i3; \
607 lduwa [%sp + 0x30] %asi, %i4; \
608 lduwa [%sp + 0x34] %asi, %i5; \
609 lduwa [%sp + 0x38] %asi, %i6; \
610 lduwa [%sp + 0x3c] %asi, %i7; \
611 ba,pt %xcc, user_rtt_pre_restore; \
612 restored; \
613 nop; nop; nop; nop; nop; \
614 nop; nop; nop; nop; nop; \
615 ba,a,pt %xcc, user_rtt_fill_fixup; \
616 ba,a,pt %xcc, user_rtt_fill_fixup; \
617 ba,a,pt %xcc, user_rtt_fill_fixup;
618
619
388#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP) 620#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
389#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP) 621#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
390#define FILL_3_NORMAL FILL_0_NORMAL 622#define FILL_3_NORMAL FILL_0_NORMAL
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