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authorDavid S. Miller <davem@davemloft.net>2008-04-23 08:40:25 -0400
committerDavid S. Miller <davem@davemloft.net>2008-04-24 02:32:17 -0400
commit919ee677b656c52c5f86d3d916786891220d5452 (patch)
treedd1202209945b4c2529af074effdb7300edda684 /include/asm-sparc64/topology.h
parent1f261ef53ba06658dfeb5a9c3007d0ad1b85cadf (diff)
[SPARC64]: Add NUMA support.
Currently there is only code to parse NUMA attributes on sun4v/niagara systems, but later on we will add such parsing for older systems. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/topology.h')
-rw-r--r--include/asm-sparc64/topology.h73
1 files changed, 71 insertions, 2 deletions
diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h
index c6b557034f68..001c04027c82 100644
--- a/include/asm-sparc64/topology.h
+++ b/include/asm-sparc64/topology.h
@@ -1,6 +1,77 @@
1#ifndef _ASM_SPARC64_TOPOLOGY_H 1#ifndef _ASM_SPARC64_TOPOLOGY_H
2#define _ASM_SPARC64_TOPOLOGY_H 2#define _ASM_SPARC64_TOPOLOGY_H
3 3
4#ifdef CONFIG_NUMA
5
6#include <asm/mmzone.h>
7
8static inline int cpu_to_node(int cpu)
9{
10 return numa_cpu_lookup_table[cpu];
11}
12
13#define parent_node(node) (node)
14
15static inline cpumask_t node_to_cpumask(int node)
16{
17 return numa_cpumask_lookup_table[node];
18}
19
20/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
21#define node_to_cpumask_ptr(v, node) \
22 cpumask_t *v = &(numa_cpumask_lookup_table[node])
23
24#define node_to_cpumask_ptr_next(v, node) \
25 v = &(numa_cpumask_lookup_table[node])
26
27static inline int node_to_first_cpu(int node)
28{
29 cpumask_t tmp;
30 tmp = node_to_cpumask(node);
31 return first_cpu(tmp);
32}
33
34struct pci_bus;
35#ifdef CONFIG_PCI
36extern int pcibus_to_node(struct pci_bus *pbus);
37#else
38static inline int pcibus_to_node(struct pci_bus *pbus)
39{
40 return -1;
41}
42#endif
43
44#define pcibus_to_cpumask(bus) \
45 (pcibus_to_node(bus) == -1 ? \
46 CPU_MASK_ALL : \
47 node_to_cpumask(pcibus_to_node(bus)))
48
49#define SD_NODE_INIT (struct sched_domain) { \
50 .min_interval = 8, \
51 .max_interval = 32, \
52 .busy_factor = 32, \
53 .imbalance_pct = 125, \
54 .cache_nice_tries = 2, \
55 .busy_idx = 3, \
56 .idle_idx = 2, \
57 .newidle_idx = 0, \
58 .wake_idx = 1, \
59 .forkexec_idx = 1, \
60 .flags = SD_LOAD_BALANCE \
61 | SD_BALANCE_FORK \
62 | SD_BALANCE_EXEC \
63 | SD_SERIALIZE \
64 | SD_WAKE_BALANCE, \
65 .last_balance = jiffies, \
66 .balance_interval = 1, \
67}
68
69#else /* CONFIG_NUMA */
70
71#include <asm-generic/topology.h>
72
73#endif /* !(CONFIG_NUMA) */
74
4#ifdef CONFIG_SMP 75#ifdef CONFIG_SMP
5#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id) 76#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id)
6#define topology_core_id(cpu) (cpu_data(cpu).core_id) 77#define topology_core_id(cpu) (cpu_data(cpu).core_id)
@@ -10,8 +81,6 @@
10#define smt_capable() (sparc64_multi_core) 81#define smt_capable() (sparc64_multi_core)
11#endif /* CONFIG_SMP */ 82#endif /* CONFIG_SMP */
12 83
13#include <asm-generic/topology.h>
14
15#define cpu_coregroup_map(cpu) (cpu_core_map[cpu]) 84#define cpu_coregroup_map(cpu) (cpu_core_map[cpu])
16 85
17#endif /* _ASM_SPARC64_TOPOLOGY_H */ 86#endif /* _ASM_SPARC64_TOPOLOGY_H */