[SPARC64]: More fully work around Spitfire Errata 51.

It appears that a memory barrier soon after a mispredicted
branch, not just in the delay slot, can cause the hang
condition of this cpu errata.

So move them out-of-line, and explicitly put them into
a "branch always, predict taken" delay slot which should
fully kill this problem.

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 10 insertions, 7 deletions

diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index ee4bdfc6b88f..5e94c05dc2fc 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -28,6 +28,14 @@ enum sparc_cpu {
 #define ARCH_SUN4C_SUN4 0
 #define ARCH_SUN4 0
 
+extern void mb(void);
+extern void rmb(void);
+extern void wmb(void);
+extern void membar_storeload(void);
+extern void membar_storeload_storestore(void);
+extern void membar_storeload_loadload(void);
+extern void membar_storestore_loadstore(void);
+
 #endif
 
 #define setipl(__new_ipl) \
@@ -78,16 +86,11 @@ enum sparc_cpu {
 
 #define nop()           __asm__ __volatile__ ("nop")
 
-#define membar(type)    __asm__ __volatile__ ("membar " type : : : "memory")
-#define mb()            \
-        membar("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad")
-#define rmb()           membar("#LoadLoad")
-#define wmb()           membar("#StoreStore")
 #define read_barrier_depends()          do { } while(0)
 #define set_mb(__var, __value) \
-        do { __var = __value; membar("#StoreLoad | #StoreStore"); } while(0)
+        do { __var = __value; membar_storeload_storestore(); } while(0)
 #define set_wmb(__var, __value) \
-        do { __var = __value; membar("#StoreStore"); } while(0)
+        do { __var = __value; wmb(); } while(0)
 
 #ifdef CONFIG_SMP
 #define smp_mb()        mb()