diff options
author | Sam Ravnborg <sam@ravnborg.org> | 2008-07-18 00:55:51 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-07-18 00:55:51 -0400 |
commit | f5e706ad886b6a5eb59637830110b09ccebf01c5 (patch) | |
tree | ea043a0a28e16a2ac6395c35d737f52698a165b7 /include/asm-sparc64/mmu.h | |
parent | 5e3609f60c09f0f15f71f80c6d7933b2c7be71a6 (diff) |
sparc: join the remaining header files
With this commit all sparc64 header files are moved to asm-sparc.
The remaining files (71 files) were too different to be trivially
merged so divide them up in a _32.h and a _64.h file which
are both included from the file with no bit size.
The following script were used:
cd include
FILES=`wc -l asm-sparc64/*h | grep -v '^ 1' | cut -b 20-`
for FILE in ${FILES}; do
echo $FILE:
BASE=`echo $FILE | cut -d '.' -f 1`
FN32=${BASE}_32.h
FN64=${BASE}_64.h
GUARD=___ASM_SPARC_`echo $BASE | tr '-' '_' | tr [:lower:] [:upper:]`_H
git mv asm-sparc/$FILE asm-sparc/$FN32
git mv asm-sparc64/$FILE asm-sparc/$FN64
echo git mv done
printf "#ifndef %s\n" $GUARD > asm-sparc/$FILE
printf "#define %s\n" $GUARD >> asm-sparc/$FILE
printf "#if defined(__sparc__) && defined(__arch64__)\n" >> asm-sparc/$FILE
printf "#include <asm-sparc/%s>\n" $FN64 >> asm-sparc/$FILE
printf "#else\n" >> asm-sparc/$FILE
printf "#include <asm-sparc/%s>\n" $FN32 >> asm-sparc/$FILE
printf "#endif\n" >> asm-sparc/$FILE
printf "#endif\n" >> asm-sparc/$FILE
git add asm-sparc/$FILE
echo new file done
printf "#include <asm-sparc/%s>\n" $FILE > asm-sparc64/$FILE
git add asm-sparc64/$FILE
echo sparc64 file done
done
The guard contains three '_' to avoid conflict with existing guards.
In additing the two Kbuild files are emptied to avoid breaking
headers_* targets.
We will reintroduce the exported header files when the necessary
kbuild changes are merged.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/mmu.h')
-rw-r--r-- | include/asm-sparc64/mmu.h | 128 |
1 files changed, 1 insertions, 127 deletions
diff --git a/include/asm-sparc64/mmu.h b/include/asm-sparc64/mmu.h index 8abc58f0f9d7..e677a64d8db1 100644 --- a/include/asm-sparc64/mmu.h +++ b/include/asm-sparc64/mmu.h | |||
@@ -1,127 +1 @@ | |||
1 | #ifndef __MMU_H | #include <asm-sparc/mmu.h> | |
2 | #define __MMU_H | ||
3 | |||
4 | #include <linux/const.h> | ||
5 | #include <asm/page.h> | ||
6 | #include <asm/hypervisor.h> | ||
7 | |||
8 | #define CTX_NR_BITS 13 | ||
9 | |||
10 | #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) | ||
11 | |||
12 | /* UltraSPARC-III+ and later have a feature whereby you can | ||
13 | * select what page size the various Data-TLB instances in the | ||
14 | * chip. In order to gracefully support this, we put the version | ||
15 | * field in a spot outside of the areas of the context register | ||
16 | * where this parameter is specified. | ||
17 | */ | ||
18 | #define CTX_VERSION_SHIFT 22 | ||
19 | #define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT) | ||
20 | |||
21 | #define CTX_PGSZ_8KB _AC(0x0,UL) | ||
22 | #define CTX_PGSZ_64KB _AC(0x1,UL) | ||
23 | #define CTX_PGSZ_512KB _AC(0x2,UL) | ||
24 | #define CTX_PGSZ_4MB _AC(0x3,UL) | ||
25 | #define CTX_PGSZ_BITS _AC(0x7,UL) | ||
26 | #define CTX_PGSZ0_NUC_SHIFT 61 | ||
27 | #define CTX_PGSZ1_NUC_SHIFT 58 | ||
28 | #define CTX_PGSZ0_SHIFT 16 | ||
29 | #define CTX_PGSZ1_SHIFT 19 | ||
30 | #define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \ | ||
31 | (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT)) | ||
32 | |||
33 | #if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) | ||
34 | #define CTX_PGSZ_BASE CTX_PGSZ_8KB | ||
35 | #elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) | ||
36 | #define CTX_PGSZ_BASE CTX_PGSZ_64KB | ||
37 | #elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB) | ||
38 | #define CTX_PGSZ_BASE CTX_PGSZ_512KB | ||
39 | #elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB) | ||
40 | #define CTX_PGSZ_BASE CTX_PGSZ_4MB | ||
41 | #else | ||
42 | #error No page size specified in kernel configuration | ||
43 | #endif | ||
44 | |||
45 | #if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) | ||
46 | #define CTX_PGSZ_HUGE CTX_PGSZ_4MB | ||
47 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) | ||
48 | #define CTX_PGSZ_HUGE CTX_PGSZ_512KB | ||
49 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | ||
50 | #define CTX_PGSZ_HUGE CTX_PGSZ_64KB | ||
51 | #endif | ||
52 | |||
53 | #define CTX_PGSZ_KERN CTX_PGSZ_4MB | ||
54 | |||
55 | /* Thus, when running on UltraSPARC-III+ and later, we use the following | ||
56 | * PRIMARY_CONTEXT register values for the kernel context. | ||
57 | */ | ||
58 | #define CTX_CHEETAH_PLUS_NUC \ | ||
59 | ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \ | ||
60 | (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT)) | ||
61 | |||
62 | #define CTX_CHEETAH_PLUS_CTX0 \ | ||
63 | ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \ | ||
64 | (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT)) | ||
65 | |||
66 | /* If you want "the TLB context number" use CTX_NR_MASK. If you | ||
67 | * want "the bits I program into the context registers" use | ||
68 | * CTX_HW_MASK. | ||
69 | */ | ||
70 | #define CTX_NR_MASK TAG_CONTEXT_BITS | ||
71 | #define CTX_HW_MASK (CTX_NR_MASK | CTX_PGSZ_MASK) | ||
72 | |||
73 | #define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL)) | ||
74 | #define CTX_VALID(__ctx) \ | ||
75 | (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK)) | ||
76 | #define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK) | ||
77 | #define CTX_NRBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_NR_MASK) | ||
78 | |||
79 | #ifndef __ASSEMBLY__ | ||
80 | |||
81 | #define TSB_ENTRY_ALIGNMENT 16 | ||
82 | |||
83 | struct tsb { | ||
84 | unsigned long tag; | ||
85 | unsigned long pte; | ||
86 | } __attribute__((aligned(TSB_ENTRY_ALIGNMENT))); | ||
87 | |||
88 | extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte); | ||
89 | extern void tsb_flush(unsigned long ent, unsigned long tag); | ||
90 | extern void tsb_init(struct tsb *tsb, unsigned long size); | ||
91 | |||
92 | struct tsb_config { | ||
93 | struct tsb *tsb; | ||
94 | unsigned long tsb_rss_limit; | ||
95 | unsigned long tsb_nentries; | ||
96 | unsigned long tsb_reg_val; | ||
97 | unsigned long tsb_map_vaddr; | ||
98 | unsigned long tsb_map_pte; | ||
99 | }; | ||
100 | |||
101 | #define MM_TSB_BASE 0 | ||
102 | |||
103 | #ifdef CONFIG_HUGETLB_PAGE | ||
104 | #define MM_TSB_HUGE 1 | ||
105 | #define MM_NUM_TSBS 2 | ||
106 | #else | ||
107 | #define MM_NUM_TSBS 1 | ||
108 | #endif | ||
109 | |||
110 | typedef struct { | ||
111 | spinlock_t lock; | ||
112 | unsigned long sparc64_ctx_val; | ||
113 | unsigned long huge_pte_count; | ||
114 | struct tsb_config tsb_block[MM_NUM_TSBS]; | ||
115 | struct hv_tsb_descr tsb_descr[MM_NUM_TSBS]; | ||
116 | } mm_context_t; | ||
117 | |||
118 | #endif /* !__ASSEMBLY__ */ | ||
119 | |||
120 | #define TSB_CONFIG_TSB 0x00 | ||
121 | #define TSB_CONFIG_RSS_LIMIT 0x08 | ||
122 | #define TSB_CONFIG_NENTRIES 0x10 | ||
123 | #define TSB_CONFIG_REG_VAL 0x18 | ||
124 | #define TSB_CONFIG_MAP_VADDR 0x20 | ||
125 | #define TSB_CONFIG_MAP_PTE 0x28 | ||
126 | |||
127 | #endif /* __MMU_H */ | ||