aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-sparc64/irq.h
diff options
context:
space:
mode:
authorJeff Garzik <jeff@garzik.org>2006-06-22 22:51:46 -0400
committerJeff Garzik <jeff@garzik.org>2006-06-22 22:51:46 -0400
commitdbe1ab9514c231c9b062140a107d9dea0eabefcc (patch)
tree0001c7143cf923fc704215f0a0e54221e9e5cbb9 /include/asm-sparc64/irq.h
parent612eff0e3715a6faff5ba1b74873b99e036c59fe (diff)
parentd588fcbe5a7ba8bba2cebf7799ab2d573717a806 (diff)
Merge branch 'master' into upstream
Diffstat (limited to 'include/asm-sparc64/irq.h')
-rw-r--r--include/asm-sparc64/irq.h97
1 files changed, 12 insertions, 85 deletions
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index de33d6e1afb5..905e59b4a737 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -8,7 +8,6 @@
8#ifndef _SPARC64_IRQ_H 8#ifndef _SPARC64_IRQ_H
9#define _SPARC64_IRQ_H 9#define _SPARC64_IRQ_H
10 10
11#include <linux/config.h>
12#include <linux/linkage.h> 11#include <linux/linkage.h>
13#include <linux/kernel.h> 12#include <linux/kernel.h>
14#include <linux/errno.h> 13#include <linux/errno.h>
@@ -16,58 +15,6 @@
16#include <asm/pil.h> 15#include <asm/pil.h>
17#include <asm/ptrace.h> 16#include <asm/ptrace.h>
18 17
19struct ino_bucket;
20
21#define MAX_IRQ_DESC_ACTION 4
22
23struct irq_desc {
24 void (*pre_handler)(struct ino_bucket *, void *, void *);
25 void *pre_handler_arg1;
26 void *pre_handler_arg2;
27 u32 action_active_mask;
28 struct irqaction action[MAX_IRQ_DESC_ACTION];
29};
30
31/* You should not mess with this directly. That's the job of irq.c.
32 *
33 * If you make changes here, please update hand coded assembler of
34 * the vectored interrupt trap handler in entry.S -DaveM
35 *
36 * This is currently one DCACHE line, two buckets per L2 cache
37 * line. Keep this in mind please.
38 */
39struct ino_bucket {
40 /* Next handler in per-CPU PIL worklist. We know that
41 * bucket pointers have the high 32-bits clear, so to
42 * save space we only store the bits we need.
43 */
44/*0x00*/unsigned int irq_chain;
45
46 /* PIL to schedule this IVEC at. */
47/*0x04*/unsigned char pil;
48
49 /* If an IVEC arrives while irq_info is NULL, we
50 * set this to notify request_irq() about the event.
51 */
52/*0x05*/unsigned char pending;
53
54 /* Miscellaneous flags. */
55/*0x06*/unsigned char flags;
56
57 /* Currently unused. */
58/*0x07*/unsigned char __pad;
59
60 /* Reference to IRQ descriptor for this bucket. */
61/*0x08*/struct irq_desc *irq_info;
62
63 /* Sun5 Interrupt Clear Register. */
64/*0x10*/unsigned long iclr;
65
66 /* Sun5 Interrupt Mapping Register. */
67/*0x18*/unsigned long imap;
68
69};
70
71/* IMAP/ICLR register defines */ 18/* IMAP/ICLR register defines */
72#define IMAP_VALID 0x80000000 /* IRQ Enabled */ 19#define IMAP_VALID 0x80000000 /* IRQ Enabled */
73#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ 20#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */
@@ -85,36 +32,20 @@ struct ino_bucket {
85#define ICLR_TRANSMIT 0x00000001 /* Transmit state */ 32#define ICLR_TRANSMIT 0x00000001 /* Transmit state */
86#define ICLR_PENDING 0x00000003 /* Pending state */ 33#define ICLR_PENDING 0x00000003 /* Pending state */
87 34
88/* Only 8-bits are available, be careful. -DaveM */ 35/* The largest number of unique interrupt sources we support.
89#define IBF_PCI 0x02 /* PSYCHO/SABRE/SCHIZO PCI interrupt. */ 36 * If this needs to ever be larger than 255, you need to change
90#define IBF_ACTIVE 0x04 /* Interrupt is active and has a handler.*/ 37 * the type of ino_bucket->virt_irq as appropriate.
91#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */ 38 *
92 39 * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
93#define NUM_IVECS (IMAP_INR + 1) 40 */
94extern struct ino_bucket ivector_table[NUM_IVECS]; 41#define NR_IRQS 255
95
96#define __irq_ino(irq) \
97 (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
98#define __irq_pil(irq) ((struct ino_bucket *)(unsigned long)(irq))->pil
99#define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
100#define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
101
102static __inline__ char *__irq_itoa(unsigned int irq)
103{
104 static char buff[16];
105
106 sprintf(buff, "%d,%x", __irq_pil(irq), (unsigned int)__irq_ino(irq));
107 return buff;
108}
109
110#define NR_IRQS 16
111 42
43extern void irq_install_pre_handler(int virt_irq,
44 void (*func)(unsigned int, void *, void *),
45 void *arg1, void *arg2);
112#define irq_canonicalize(irq) (irq) 46#define irq_canonicalize(irq) (irq)
113extern void disable_irq(unsigned int); 47extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
114#define disable_irq_nosync disable_irq 48extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
115extern void enable_irq(unsigned int);
116extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap);
117extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, int pil, unsigned char flags);
118extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); 49extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
119 50
120static __inline__ void set_softint(unsigned long bits) 51static __inline__ void set_softint(unsigned long bits)
@@ -140,8 +71,4 @@ static __inline__ unsigned long get_softint(void)
140 return retval; 71 return retval;
141} 72}
142 73
143struct irqaction;
144struct pt_regs;
145int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
146
147#endif 74#endif