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authorDavid S. Miller <davem@sunset.davemloft.net>2007-05-02 20:31:36 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-05-07 01:44:06 -0400
commit861fe90656b8e20d750d73c57088dc52d316ce7b (patch)
tree3f7df274478242ecf9f4186637c9cc38f59b5b8a /include/asm-sparc64/iommu.h
parent4cad69174f385c183b2bcb369fb4304d8624ab96 (diff)
[SPARC64]: SUN4U PCI-E controller support.
Some minor refactoring in the generic code was necessary for this: 1) This controller requires 8-byte access to the interrupt map and clear register. They are 64-bits on all the other SBUS and PCI controllers anyways, so this was easy to cure. 2) The IMAP register has a different layout and some bits that we need to preserve, so use a read/modify/write when making changes to the IMAP register in generic code. 3) Flushing the entire IOMMU TLB is best done with a single write to a register on this PCI controller, add a iommu->iommu_flushinv for this. Still lacks MSI support, that will come later. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/iommu.h')
-rw-r--r--include/asm-sparc64/iommu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h
index e199594a1e9b..0b1813f41045 100644
--- a/include/asm-sparc64/iommu.h
+++ b/include/asm-sparc64/iommu.h
@@ -32,6 +32,7 @@ struct iommu {
32 unsigned long iommu_control; 32 unsigned long iommu_control;
33 unsigned long iommu_tsbbase; 33 unsigned long iommu_tsbbase;
34 unsigned long iommu_flush; 34 unsigned long iommu_flush;
35 unsigned long iommu_flushinv;
35 unsigned long iommu_ctxflush; 36 unsigned long iommu_ctxflush;
36 unsigned long write_complete_reg; 37 unsigned long write_complete_reg;
37 unsigned long dummy_page; 38 unsigned long dummy_page;