diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-05-30 05:01:28 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-05-30 05:01:28 -0400 |
commit | fbaa20f66a8283359523dfe961ebe66f0b8fac59 (patch) | |
tree | b176ff3c8310544405a5949a9d32d91f2615725a /include/asm-sparc64/io.h | |
parent | 551dec47bb5964478db594385a896eb0d4ab2b0a (diff) |
sparc64: IO accessors fix
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
I added a full memory clobber on all asm accessors except the _raw
ones.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/io.h')
-rw-r--r-- | include/asm-sparc64/io.h | 66 |
1 files changed, 44 insertions, 22 deletions
diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h index c299b853b5ba..3158960f3eb5 100644 --- a/include/asm-sparc64/io.h +++ b/include/asm-sparc64/io.h | |||
@@ -24,7 +24,8 @@ static inline u8 _inb(unsigned long addr) | |||
24 | 24 | ||
25 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */" | 25 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */" |
26 | : "=r" (ret) | 26 | : "=r" (ret) |
27 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 27 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
28 | : "memory"); | ||
28 | 29 | ||
29 | return ret; | 30 | return ret; |
30 | } | 31 | } |
@@ -35,7 +36,8 @@ static inline u16 _inw(unsigned long addr) | |||
35 | 36 | ||
36 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */" | 37 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */" |
37 | : "=r" (ret) | 38 | : "=r" (ret) |
38 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 39 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
40 | : "memory"); | ||
39 | 41 | ||
40 | return ret; | 42 | return ret; |
41 | } | 43 | } |
@@ -46,7 +48,8 @@ static inline u32 _inl(unsigned long addr) | |||
46 | 48 | ||
47 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */" | 49 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */" |
48 | : "=r" (ret) | 50 | : "=r" (ret) |
49 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 51 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
52 | : "memory"); | ||
50 | 53 | ||
51 | return ret; | 54 | return ret; |
52 | } | 55 | } |
@@ -55,21 +58,24 @@ static inline void _outb(u8 b, unsigned long addr) | |||
55 | { | 58 | { |
56 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" | 59 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" |
57 | : /* no outputs */ | 60 | : /* no outputs */ |
58 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 61 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
62 | : "memory"); | ||
59 | } | 63 | } |
60 | 64 | ||
61 | static inline void _outw(u16 w, unsigned long addr) | 65 | static inline void _outw(u16 w, unsigned long addr) |
62 | { | 66 | { |
63 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" | 67 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" |
64 | : /* no outputs */ | 68 | : /* no outputs */ |
65 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 69 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
70 | : "memory"); | ||
66 | } | 71 | } |
67 | 72 | ||
68 | static inline void _outl(u32 l, unsigned long addr) | 73 | static inline void _outl(u32 l, unsigned long addr) |
69 | { | 74 | { |
70 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" | 75 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" |
71 | : /* no outputs */ | 76 | : /* no outputs */ |
72 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 77 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
78 | : "memory"); | ||
73 | } | 79 | } |
74 | 80 | ||
75 | #define inb(__addr) (_inb((unsigned long)(__addr))) | 81 | #define inb(__addr) (_inb((unsigned long)(__addr))) |
@@ -128,7 +134,8 @@ static inline u8 _readb(const volatile void __iomem *addr) | |||
128 | 134 | ||
129 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" | 135 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" |
130 | : "=r" (ret) | 136 | : "=r" (ret) |
131 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 137 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
138 | : "memory"); | ||
132 | return ret; | 139 | return ret; |
133 | } | 140 | } |
134 | 141 | ||
@@ -137,7 +144,8 @@ static inline u16 _readw(const volatile void __iomem *addr) | |||
137 | 144 | ||
138 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" | 145 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" |
139 | : "=r" (ret) | 146 | : "=r" (ret) |
140 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 147 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
148 | : "memory"); | ||
141 | 149 | ||
142 | return ret; | 150 | return ret; |
143 | } | 151 | } |
@@ -147,7 +155,8 @@ static inline u32 _readl(const volatile void __iomem *addr) | |||
147 | 155 | ||
148 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" | 156 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" |
149 | : "=r" (ret) | 157 | : "=r" (ret) |
150 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 158 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
159 | : "memory"); | ||
151 | 160 | ||
152 | return ret; | 161 | return ret; |
153 | } | 162 | } |
@@ -157,7 +166,8 @@ static inline u64 _readq(const volatile void __iomem *addr) | |||
157 | 166 | ||
158 | __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" | 167 | __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" |
159 | : "=r" (ret) | 168 | : "=r" (ret) |
160 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 169 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
170 | : "memory"); | ||
161 | 171 | ||
162 | return ret; | 172 | return ret; |
163 | } | 173 | } |
@@ -166,28 +176,32 @@ static inline void _writeb(u8 b, volatile void __iomem *addr) | |||
166 | { | 176 | { |
167 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" | 177 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" |
168 | : /* no outputs */ | 178 | : /* no outputs */ |
169 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 179 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
180 | : "memory"); | ||
170 | } | 181 | } |
171 | 182 | ||
172 | static inline void _writew(u16 w, volatile void __iomem *addr) | 183 | static inline void _writew(u16 w, volatile void __iomem *addr) |
173 | { | 184 | { |
174 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" | 185 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" |
175 | : /* no outputs */ | 186 | : /* no outputs */ |
176 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 187 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
188 | : "memory"); | ||
177 | } | 189 | } |
178 | 190 | ||
179 | static inline void _writel(u32 l, volatile void __iomem *addr) | 191 | static inline void _writel(u32 l, volatile void __iomem *addr) |
180 | { | 192 | { |
181 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" | 193 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" |
182 | : /* no outputs */ | 194 | : /* no outputs */ |
183 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 195 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
196 | : "memory"); | ||
184 | } | 197 | } |
185 | 198 | ||
186 | static inline void _writeq(u64 q, volatile void __iomem *addr) | 199 | static inline void _writeq(u64 q, volatile void __iomem *addr) |
187 | { | 200 | { |
188 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" | 201 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" |
189 | : /* no outputs */ | 202 | : /* no outputs */ |
190 | : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); | 203 | : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) |
204 | : "memory"); | ||
191 | } | 205 | } |
192 | 206 | ||
193 | #define readb(__addr) _readb(__addr) | 207 | #define readb(__addr) _readb(__addr) |
@@ -299,7 +313,8 @@ static inline u8 _sbus_readb(const volatile void __iomem *addr) | |||
299 | 313 | ||
300 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */" | 314 | __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */" |
301 | : "=r" (ret) | 315 | : "=r" (ret) |
302 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 316 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
317 | : "memory"); | ||
303 | 318 | ||
304 | return ret; | 319 | return ret; |
305 | } | 320 | } |
@@ -310,7 +325,8 @@ static inline u16 _sbus_readw(const volatile void __iomem *addr) | |||
310 | 325 | ||
311 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */" | 326 | __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */" |
312 | : "=r" (ret) | 327 | : "=r" (ret) |
313 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 328 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
329 | : "memory"); | ||
314 | 330 | ||
315 | return ret; | 331 | return ret; |
316 | } | 332 | } |
@@ -321,7 +337,8 @@ static inline u32 _sbus_readl(const volatile void __iomem *addr) | |||
321 | 337 | ||
322 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */" | 338 | __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */" |
323 | : "=r" (ret) | 339 | : "=r" (ret) |
324 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 340 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
341 | : "memory"); | ||
325 | 342 | ||
326 | return ret; | 343 | return ret; |
327 | } | 344 | } |
@@ -332,7 +349,8 @@ static inline u64 _sbus_readq(const volatile void __iomem *addr) | |||
332 | 349 | ||
333 | __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */" | 350 | __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */" |
334 | : "=r" (ret) | 351 | : "=r" (ret) |
335 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 352 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
353 | : "memory"); | ||
336 | 354 | ||
337 | return ret; | 355 | return ret; |
338 | } | 356 | } |
@@ -341,28 +359,32 @@ static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) | |||
341 | { | 359 | { |
342 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" | 360 | __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" |
343 | : /* no outputs */ | 361 | : /* no outputs */ |
344 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 362 | : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
363 | : "memory"); | ||
345 | } | 364 | } |
346 | 365 | ||
347 | static inline void _sbus_writew(u16 w, volatile void __iomem *addr) | 366 | static inline void _sbus_writew(u16 w, volatile void __iomem *addr) |
348 | { | 367 | { |
349 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" | 368 | __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" |
350 | : /* no outputs */ | 369 | : /* no outputs */ |
351 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 370 | : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
371 | : "memory"); | ||
352 | } | 372 | } |
353 | 373 | ||
354 | static inline void _sbus_writel(u32 l, volatile void __iomem *addr) | 374 | static inline void _sbus_writel(u32 l, volatile void __iomem *addr) |
355 | { | 375 | { |
356 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" | 376 | __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" |
357 | : /* no outputs */ | 377 | : /* no outputs */ |
358 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 378 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
379 | : "memory"); | ||
359 | } | 380 | } |
360 | 381 | ||
361 | static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) | 382 | static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) |
362 | { | 383 | { |
363 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" | 384 | __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" |
364 | : /* no outputs */ | 385 | : /* no outputs */ |
365 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | 386 | : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) |
387 | : "memory"); | ||
366 | } | 388 | } |
367 | 389 | ||
368 | #define sbus_readb(__addr) _sbus_readb(__addr) | 390 | #define sbus_readb(__addr) _sbus_readb(__addr) |